JPH10135445A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the dv/dt resistance of a main thyristor and also di/dt resistance by preventing the rush current to a pilot thyristor. SOLUTION: Around a first and second pilot thyristors 11, 12, the cathode 30 of a main thyristor 13 is disposed around a second thyristor 11, 12, and the lateral equivalent resistances of the pilot thyristors 11, 12 and main thyristor 13 are set to decrease approaching from the first thyristor 11 to the main one 13. This permits displacement current s generated by the pilot thyristors 11, 12 to flow in the cathode 30, thereby improving the dv/dt resistance and di/dt resistance of the main thyristor 13.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device for power control, for example, and more particularly to a thyristor having an amplification gate.

[0002]

2. Description of the Related Art FIGS. 5 to 7 show a conventional thyristor having an amplification gate. In FIG. 5, the first stage pilot thyristor 4
1, the first stage pilot thyristor 4
For example, four second-stage pilot thyristors 42 are provided around 1. A main thyristor 43 is arranged around the pilot thyristor 42 of the second stage.

FIG. 6 shows a part of FIG. 5, and FIG.
FIG. On the back surface of the N ^- type semiconductor substrate 45, P ⁺
A type semiconductor layer 46 is formed, and the P ⁺ type semiconductor layer 46 is provided with an anode electrode 47 made of, for example, aluminum. On the surface of the N ⁻ type semiconductor substrate 45, a P type semiconductor layer 48 is formed. In the P-type semiconductor layer 48, an N ⁺ -type semiconductor region 49 forming the first-stage pilot thyristor 41, an N ⁺ -type semiconductor region 50 forming the second-stage pilot thyristor 42, and the main thyristor An N ⁺ -type semiconductor region 51 constituting the cathode K of 43 is formed. The N ⁺ type semiconductor region 4
Reference numerals 9 and 50 are ring-shaped. A depletion layer 52 is formed at the junction between the N ⁻ type semiconductor layer 46 and the P type semiconductor layer 48. The cathode K of the main thyristor 43
N ⁺ -type semiconductor region 51 constituting the, as shown in FIG. 6, are formed around the gate electrode of the main thyristor.

A plurality of shorted emitters 53 are formed in the N ⁺ -type semiconductor region 51 and are composed of the P-type semiconductor layer 48 and connected to the N ⁺ -type semiconductor region 51. That is, the P-type semiconductor layer 48 is exposed in a circular shape on the surface of the cathode electrode 51 to form a shorted emitter 53. These emitters 53 are connected to the N ⁺ type semiconductor region 51 by a cathode electrode described later.

As shown in FIG. 7, a first-stage pilot thyristor 41 made of aluminum is provided on a P-type semiconductor layer 48 located at the center of the N ⁺ -type semiconductor region 49.
Is formed, and the N ⁺ type semiconductor region 4 is formed.
An electrode 56 made of aluminum is formed on 9. A gate electrode 57 of the second-stage pilot thyristor 42 made of aluminum is formed on the P-type semiconductor layer 48 located at the center of the N ⁺ -type semiconductor region 50, and this gate electrode 57 is connected to the electrode 56. Have been. A current collecting electrode 58 made of aluminum is formed on the N ⁺ type semiconductor region 50. On the P-type semiconductor layer 48 adjacent to the N ⁺ -type semiconductor region 50, a gate electrode 59 of the main thyristor 43 made of aluminum is formed. The gate electrode 59 is connected to the collecting electrode 58. The N ⁺ type semiconductor region 51
On the entire surface of the shorted emitter 53, a cathode electrode 60 made of aluminum is formed.

In the above configuration, when a trigger current is supplied to the gate electrode 55 of the first-stage pilot thyristor 41, the first-stage pilot thyristor 41 is turned on. When the first-stage pilot thyristor 41 is turned on, a current flows through the gate electrode 57 of the second-stage pilot thyristor 42 via the electrode 56, and the second-stage pilot thyristor 42 is turned on. Subsequently, a current flows to the gate electrode 59 of the main thyristor 43 via the current collecting electrode 58, and the main thyristor 43 is turned on. That is, the thyristor 40 shown in FIG. 5 is sequentially turned on from the center to the periphery.

[0007]

The depletion layer 52 functions as a junction capacitance. When, for example, high-frequency noise is applied to the thyristor 40 while the thyristor 40 is in the non-conducting state, as shown in FIG. 7, the junction capacitance of the first and second stage pilot thyristors 41 and 42 and the main thyristor 43 is increased. And displacement currents i1, i2, i3
Occurs. Of these, the displacement currents i1 and i2 are
8 and flows to the gate electrode 59 of the main thyristor 43. For this reason, the displacement current is concentrated on the gate electrode 59, the dv / dt resistance of the main thyristor 43 may be reduced, and the main thyristor 43 may be turned on.

Therefore, for example, it is conceivable to reduce the value of the lateral equivalent resistance of the main thyristor 43 to increase the dv / dt resistance of the main thyristor 43. But,
When the lateral equivalent resistance of the main thyristor is reduced,
The sensitivity of the main thyristor 43 decreases. For this reason, in the normal turn-on operation, it takes time until the main thyristor 43 is turned on after the first and second stage pilot thyristors 41 and 42 are turned on, during which time the second stage pilot thyristor 42 is turned on. Inrush current is concentrated. Therefore, the di / dt resistance of the first and second stage pilot thyristors 41 and 42 is reduced,
Since a large amount of heat is generated in the second-stage pilot thyristors 41 and 42, these pilot thyristors 41 and 4
2 easily breaks.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object thereof is to provide a dv of a main thyristor.
It is an object of the present invention to provide a semiconductor device capable of improving the / dt resistance and preventing the inrush current to the pilot thyristor, thereby improving the di / dt resistance.

[0010]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides at least one pilot thyristor having a PNPN structure, a main thyristor having a PNPN structure disposed around these pilot thyristors, A cathode electrode formed of an N-type semiconductor layer of the main thyristor disposed all around the thyristor; and a wiring connecting the P-type semiconductor layer on which the cathode of the pilot thyristor is formed and the cathode electrode. .

That is, in the present invention, each pilot thyristor is arranged inside the cathode electrode of the main thyristor, and the P-type semiconductor layer on which the cathode of the pilot thyristor is formed is connected to the cathode electrode. Therefore, the displacement current generated at the junction capacitance of each pilot thyristor can be directly passed to the cathode electrode, so that the dv / dt resistance can be improved.

Further, the difference between the lateral equivalent resistances of the adjacent pilot thyristors is set to be larger than the lateral equivalent resistance of the main thyristor, and the difference between the lateral equivalent resistances is set larger as the distance from the main thyristor increases. Therefore, the dv / dt resistance can be reliably improved.

Further, at the time of turn-on, the inrush current to the pilot thyristor can be suppressed by reverse-biasing the pilot thyristor at the preceding stage by a voltage drop generated in the lateral resistance of the main thyristor at the time of turn-on. For this reason, the di / dt resistance can be improved.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. 1 to 3 show a semiconductor device according to an embodiment of the present invention.
In FIG. 1, a first-stage pilot thyristor 11 is provided at a central portion of the thyristor 10, and four second thyristors 11 are provided around the first-stage pilot thyristor 11, for example.
A pilot thyristor 12 at the stage is provided. A main thyristor 13 is arranged around the pilot thyristor 12 of the second stage. The first and second
The pilot thyristors 11 and 12 of the first stage are arranged in the cathode K as described later, and the pilot thyristors 11 and 12 of the first and second stages and the main thyristor 13 are separated by the cathode K.

FIG. 2 shows a part of FIG. 1, and FIG.
FIG. 2 and 3, a P ⁺ type semiconductor layer 16 is formed on the back surface of the N ⁻ type semiconductor substrate 15, and an anode electrode (A) 17 made of, for example, aluminum is provided on the P ⁺ type semiconductor layer 16. I have. On the surface of the N ⁻ type semiconductor substrate 15, a P type semiconductor layer 18 is formed. In this P-type semiconductor layer 18, an N ⁺ -type semiconductor region 19 constituting the cathode of the first-stage pilot thyristor 11 and the second-stage pilot thyristor 1
N ⁺ -type semiconductor region 20 constituting the second cathode, the N ⁺ -type semiconductor region 21 constituting the cathode of the main thyristor 13 are formed. The N ⁺ type semiconductor region 1
Reference numerals 9 and 20 are ring-shaped. A depletion layer 22 is formed at the junction between the N ⁻ type semiconductor layer 15 and the P type semiconductor layer 18.

In the N ⁺ type semiconductor region 21 constituting the cathode, a plurality of shorted emitters 23 composed of the P type semiconductor layer 18 and connected to the cathode are formed. That is, the P-type semiconductor layer 18 is circularly exposed on the surface of the N ⁺ -type semiconductor region 21 to form the emitter 23. These emitters 23 are connected to the N ⁺ type semiconductor region 21 by a cathode electrode described later.

As shown in FIG. 3, a first-stage pilot thyristor 1 made of aluminum or the like is provided on a P-type semiconductor layer 18 located at the center of the N ⁺ -type semiconductor region 19.
One gate electrode (G) 25 is formed. Also, LTT
In the case of (light trigger thyristor), a light receiving portion of an optical gate is formed in the P-type semiconductor layer and the N ⁺ -type semiconductor region 19. An electrode 26 made of aluminum is formed on the N ⁺ type semiconductor region 19. A gate electrode 27 of the second-stage pilot thyristor 12 made of aluminum is formed on the P-type semiconductor layer 18 located at the center of the N ⁺ -type semiconductor region 20, and this gate electrode 27 is
6 is connected. An electrode 28 made of aluminum is formed on the N ⁺ type semiconductor region 20. On the P-type semiconductor layer 18 adjacent to the N ⁺ -type semiconductor region 21 as the cathode, a gate electrode 29 of the main thyristor 13 made of aluminum is formed. The gate electrode 29 is connected to the electrode 28. On the entire surface of the N ⁺ type semiconductor region 21 and the shorted emitter 23, the first-stage pilot thyristor 1
On the P-type semiconductor layer 18 located between the first and second-stage pilot thyristors 12, and on the second-stage pilot thyristors 12 and the main thyristor 13,
A cathode electrode (K) 30 made of aluminum is formed. The electrodes are connected using, for example, a multilayer wiring technique.

As described above, the N ⁺ type semiconductor regions 19 and 20 constituting the first and second stage pilot thyristors 11 and 12 are formed by the cathode electrode (K) 30 constituting the cathode of the main thyristor 13. being surrounded. Further, the gate electrode 29 of the main thyristor 13 is also surrounded by the cathode electrode (K) 30 constituting the cathode.

Here, in the thyristor of the n-stage amplification,
When the lateral equivalent resistance expressed by the voltage and current density of the ith thyristor is R _Di and the lateral equivalent resistance of the main thyristor 13 is R _DM , these are set to satisfy the following relationship.

R _Di −RD _{(i + 1)} ≧ _{RD (i + 1)} −RD _{(i + 2)} ≧ R _DM (i = 1,2,... N) (1) or R _D1 −R _D2 > R _Di −RD _{(i + 1)} ≧ R _DM (i = 2,3... N) (2) As shown in the above equation, as the distance from the main thyristor 13 increases, the lateral direction of the adjacent pilot thyristor increases. The setting is made so that the difference in equivalent resistance becomes large. The resistance value is N ⁺
For example, it can be changed by changing any of the width, depth, and impurity concentration of the type semiconductor regions 19, 20, and 21. When the N ⁺ -type semiconductor regions 19, 20, 21 are formed by, for example, ion implantation, they can be set by changing the dose of the impurity to be implanted or the acceleration voltage.

FIG. 4 shows another example of the first stage pilot thyristor 11. In this case, for example, a concave portion 31 is formed on the surface of the P-type semiconductor layer 18 and the concave portion 31 is formed.
The N ⁺ type semiconductor region 19 is formed at the bottom of the substrate. With such a configuration, the N ⁺ type semiconductor region 19 is
It can be formed at a deeper position in the mold semiconductor layer 18. Therefore, since the thickness of the P-type semiconductor layer 18 located immediately below the N ⁺ -type semiconductor region 19 is reduced, the lateral equivalent resistance can be set large.

The operation of the above configuration will be described. First, the normal operation will be described. When a trigger current is supplied to the gate electrode 25 of the first-stage pilot thyristor 11 (in the case of LTT, the gate is irradiated with light)
The first-stage pilot thyristor 11 turns on. When the first-stage pilot thyristor 11 is turned on, a current flows from the anode electrode A to the gate electrode 27 of the second-stage pilot thyristor 12 via the electrode 26, and the second-stage pilot thyristor 12 is turned on. When the second stage pilot thyristor 12 is turned on, a current flows from the anode electrode A to the gate electrode 29 of the main thyristor 13 via the electrode 28, and the main thyristor 13 is turned on. That is, the thyristor 10 shown in FIG. 1 is sequentially turned on from the center to the periphery.

On the other hand, when, for example, high-frequency noise is applied to the thyristor 10 while the thyristor 10 is non-conductive, as shown in FIG. 3, the first and second stage pilot thyristors 11, 12 and the main thyristor 13 Displacement currents i1, i2, and i3 are generated at the junction capacitance of. However, since the displacement currents i1 and i2 generated by the pilot thyristors 11 and 12 flow into the cathode electrode 30 of the main thyristor 13, they do not flow through the gate electrode 29 of the main thyristor 13. Therefore, since the displacement currents i1 and i2 do not concentrate on the main thyristor 13, turning on can be suppressed.

According to the above embodiment, the cathode electrode 30 of the main thyristor 13 is arranged around the first and second pilot thyristors 11 and 12, and
The P-type semiconductor layers 18 of the second-stage pilot thyristors 11 and 12 are connected to the cathode electrode 30. Therefore, when the thyristor 10 is non-conductive, the displacement current generated in each of the pilot thyristors 11 and 12 can flow to the cathode electrode 30.
The dt resistance can be improved.

Further, the lateral equivalent resistances of the first and second stage pilot thyristors and the main thyristor are set as in the equations (1) and (2). Therefore, for example, when a turn-on current flows through the lateral equivalent resistance _RDM of the main thyristor 13 during a normal turn-on operation, a voltage drop generated in the lateral equivalent resistance _RDM reverses the voltage of the second stage pilot thyristor 12. Bias.
That is, the voltage drop generated in the lateral equivalent resistance _RDM is positive on the gate electrode 29 side and negative on the cathode electrode (K) 30 side. Therefore, the second-stage pilot thyristor 1
The N ⁺ semiconductor region 20 includes a gate electrode 29 and a current collecting electrode 2.
8, the N ⁺ semiconductor region 20 is positively biased.
The P-type semiconductor layer 18 located around the
To be negatively biased. For this reason, the inrush current to the second-stage pilot thyristor can be suppressed, and the di / dt resistance can be improved.

In general, when the dv / dt withstand capability is improved, the sensitivity of the gate is reduced, so that it is difficult to improve the di / dt withstand capability. However, according to this embodiment, since the value of the lateral equivalent resistance of the main thyristor 13 is not increased, dv / d is not caused without lowering the gate sensitivity.
The dt resistance can be improved. Furthermore, the first and second
By connecting the P-type semiconductor regions 18 of the pilot thyristors 11 and 12 of the stage to the cathode electrode 30, di
/ Dt resistance can also be improved.

Furthermore, if the lateral equivalent resistance of each pilot thyristor is set to a lateral equivalent resistance value that satisfies the formula (1) or (2), the first stage pilot thyristor can be used even when erroneous firing due to high frequency noise or the like. Since the thyristor is sequentially turned on from the thyristor to the main thyristor, destruction due to erroneous firing can be prevented. It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the invention.

[0028]

As described above in detail, according to the present invention, the dv / dt resistance of the main thyristor can be improved, and the inrush current to the pilot thyristor can be prevented to improve the di / dt resistance. A possible semiconductor device can be provided.

[Brief description of the drawings]

FIG. 1 is a plan view showing an embodiment of the present invention.

FIG. 2 is a plan view showing a part of FIG.

FIG. 3 is a sectional view taken along line 3-3 in FIG. 2;

FIG. 4 is a view showing another example of the pilot thyristor shown in FIG. 3;

FIG. 5 is a plan view showing a conventional semiconductor device.

FIG. 6 is a plan view showing a part of FIG. 5;

FIG. 7 is a sectional view taken along the line 7-7 in FIG. 6;

[Explanation of symbols]

10 ... thyristors, 11, 12 ... first, second stage pilot thyristor, 13 ... main thyristors, 15 ... N ^- -type semiconductor substrate, 16 ... P ⁺ -type semiconductor layer, 17 ... anode (A), 18 ... P-type semiconductor layers 18, 19, 20, 21... N ⁺ -type semiconductor layers, 21... N ⁺ -type semiconductor layers, 25, 27, 29 ... gate electrodes (G), 26, 28 ... current collecting electrodes 30 ... cathode electrodes ( K).

Claims (7)

[Claims] At least one pilot thyristor having a PNPN structure, a main thyristor having a PNPN structure disposed around the pilot thyristor, and an N-type semiconductor of the main thyristor disposed all around the pilot thyristor A semiconductor device comprising: a cathode electrode formed of a region; and a wiring connecting the P-type semiconductor layer disposed around the pilot thyristor and the cathode electrode. 2. a semiconductor substrate of a first conductivity type; a first semiconductor layer of a second conductivity type formed on a back surface of the semiconductor substrate; an anode electrode provided on the first semiconductor layer; A second conductive type second semiconductor layer provided on the surface of the semiconductor substrate; and a first conductive type first semiconductor forming a cathode of a first-stage pilot thyristor formed in the second semiconductor layer. A second conductivity type second semiconductor region forming a cathode of a second stage pilot thyristor formed in the second semiconductor layer near the first semiconductor region; A third semiconductor region of a first conductivity type forming a cathode of a main thyristor formed around the first and second stage pilot thyristors in the second semiconductor layer; The second located near the region A gate electrode of the first-stage pilot thyristor formed on a surface of the semiconductor layer; and a first semiconductor region formed on a surface of the second semiconductor layer located near the second semiconductor region. A gate electrode of the second-stage pilot thyristor connected to the second semiconductor layer formed on a surface of the second semiconductor layer located near the third semiconductor region, and connected to the second semiconductor region; A gate electrode of the main thyristor, the second semiconductor layer located between the first semiconductor region and the second semiconductor region, and the second semiconductor layer located between the second semiconductor region and the third semiconductor region. A semiconductor device comprising: a second semiconductor layer; and a wiring connecting a third semiconductor region forming a cathode of the main thyristor. 3. The first semiconductor region is formed in a ring shape, and a gate electrode of the first-stage pilot thyristor is exposed to the inside of the ring-shaped first semiconductor region in the second semiconductor layer. 3. The semiconductor device according to claim 2, wherein the semiconductor device is formed on the semiconductor device. 4. The second semiconductor region is formed in a ring shape, and a gate electrode of the second-stage pilot thyristor is exposed to the inside of the ring-shaped second semiconductor region in the second semiconductor layer. 3. The semiconductor device according to claim 2, wherein the semiconductor device is formed on the semiconductor device. 5. When the lateral equivalent resistance expressed by the voltage and current density of the i-th pilot thyristor of each pilot thyristor is R _Di, and the lateral equivalent resistance of the main thyristor is R _DM , these are R _Di −RD _{(i + 1)} ≧ _{RD (i + 1)} −RD _{(i + 2)} ≧ _RDM (i = 1,2,..., N−1, _{RD (n + 1)} = _RDM ) 3. The semiconductor device according to claim 1, wherein the following relationship is satisfied. 6. When the lateral equivalent resistance expressed by the voltage and current density of the i-th pilot thyristor of each pilot thyristor is R _Di and the lateral equivalent resistance of the main thyristor is R _DM , these are R _{D1 -R D2> R Di -R D (} i + 1) ≧ R DM claim 1, characterized by satisfying the relationship (i = 2,3 ... n, R D (n + 1) = R DM) Or the semiconductor device according to 2. 7. A plurality of pilot thyristors having a PNPN structure, a main thyristor having a PNPN structure arranged around these pilot thyristors, and an N-type semiconductor layer of the main thyristor arranged around the entire periphery of the pilot thyristors And a wiring connecting the P-type semiconductor layer on which the cathode of the pilot thyristor is formed and the cathode electrode. The difference in the lateral equivalent resistance of the adjacent pilot thyristor is determined by the main thyristor. A semiconductor device, wherein the difference in the lateral equivalent resistance is set to be larger than the lateral equivalent resistance, and the difference in the lateral equivalent resistance increases as the distance from the main thyristor increases.