JPH10116849A - Wire bonding method, assembling method using the bonding method, and assembled mcm - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of bonding semiconductor chips (multi-layer semiconductor chips) to a substrate in which the lateral integration degree of three or more semiconductor chips are enhanced in assembling an MCM (multi-chip module). SOLUTION: When assembling an MCM by bonding semiconductor ships to a substrate by using the wedge bonding method. The forward method is at least adopted as a method of bonding the second semiconductor chip to the substrate. A wire is bonded first to the bonding pad A on the semiconductor ship and is bonded secondly to the bonding pad B on the substrate. Further, in bonding the top semiconductor chip to the substrate, it is preferable to use the reverse method (a broken line) because each distance between multi-layer semiconductor chips can be narrowed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for bonding a multi-layer semiconductor chip used in manufacturing an MCM.

[0002]

2. Description of the Related Art High integration of semiconductor devices is progressing, for example, by increasing the number of pins of a lead frame and by realizing a so-called tape BGA using a TAB tape. However, the demand for miniaturization, that is, high integration, of current electronic components has become so severe that these semiconductor devices themselves cannot be satisfied with high integration. One of the ones that responds to such a demand is a multi-chip module (hereinafter, referred to as “MCM”).

In this method, a plurality of necessary semiconductor devices are mounted on one substrate, and the entire circuit is formed into one package. By doing so, the whole circuit can be reduced in size.

[0004] One example of this MCM is shown in FIG. The MCM of FIG. 1 has four memory ICs 1 stacked in two layers in one ceramic package, eight in total, and one of each of two types of logic ICs 2 and 3 mounted thereon.
Obviously, these chips are significantly smaller than the conventional circuit that simply mounts these chips in a planar manner.

[0005] The life of the MCM is how many semiconductor devices can be mounted in a small package.
As can be seen in the memory IC1 stacked in two stages in FIG.
Development of semiconductor chip stacking technology is also underway.

For example, by arranging electrode pads on the periphery of a semiconductor chip, and by limiting the adhesive used and the thickness used, the chip can be multilayered without hindering the bonding between the terminal portion of the semiconductor chip and the electrode pad. Has also been attempted.

Certainly, increasing the number of layers of the semiconductor chip leads to a reduction in the packaging of the entire circuit at a certain rate. However, when bonding the terminals of the second and higher chips to the electrode pads of the substrate, it is necessary to minimize the bonding head from contacting the previously bonded wires. Degree will be hindered.

[0008] To explain this point more specifically, MCM
At the time of assembling, an electrical connection is made between the semiconductor chip and the substrate using a wire bonding technique. At this time, the wedge bonding method is used because bonding can be performed at room temperature, reliability can be ensured because no heat history is given to the semiconductor chip, and the wire length can be shortened as compared with the ball bonding method.
The bonding head used in the wedge bonding method includes a wedge for applying ultrasonic waves to the wire to make it adhere to the wire, and a clamper for holding and feeding the wire.

An example of wire bonding a semiconductor chip and a substrate stacked in three layers using a wedge bonding method will be described with reference to FIG. 2. First, a bonding pad A for a first semiconductor chip (Chip 1) on the substrate is firstly provided. Bonding and then second bonding to the bonding pad on Chip1. Thus, an electrical connection between the Chip 1 and the substrate is formed. Although this bonding method is called a reverse method, when bonding is performed by the reverse method, the loop shape of the wire rises almost vertically from the pad on the substrate side, and reaches the bonding pad on Chip 1 in a so-called shouldered state. .

Next, a second-layer semiconductor chip (Ch) on the substrate
First bonding is performed to the bonding pad B for ip2), and then second bonding is performed to the bonding pad on Chip2. Thus Chip2
To form an electrical connection between the substrate and the substrate.

Next, a third-layer semiconductor chip (C
The first bonding is performed to the bonding pad C for the chip 3), and the bonding head moves according to the broken line to perform the second bonding to the bonding pad on the chip 3. At this time, the bonding head is
In order not to damage the bonding wires connecting p1 to the substrate and Chip2 to the substrate, the bonding pads A, B, and C must be separated by at least a distance that does not hinder the movement of the bonding head.

[0012]

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and can increase the degree of lateral integration of three or more stacked semiconductor chips (multilayer semiconductor chips) in an MCM or the like. It is an object of the present invention to provide a method for bonding a multilayer semiconductor chip and a substrate.

[0013]

According to a method of the present invention for solving the above-mentioned problems, in bonding a multilayer semiconductor chip and a substrate using a wedge bonding method, at least a semiconductor chip of a second layer and a substrate are bonded. As a method, a forward method, that is, a method in which a wire is first bonded to a bonding pad on a semiconductor chip and a second bonding is performed to a bonding pad on a substrate is employed.

When bonding the uppermost semiconductor chip and the substrate, a reverse method is preferable because the distance between the multilayer semiconductor chips can be reduced.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In bonding a first layer of a multilayer semiconductor to a substrate by the method of the present invention, a reverse method or a forward method may be used. But,
Normally, there is not much difference between the height of the bonding pad on the upper part of the semiconductor chip of the first layer and the substrate, and when the bonding is performed by the forward method, the wire near the bonding pad on the upper surface of the semiconductor chip is largely bent downward and the wire is easily damaged. . Therefore, in such a case, the reverse method is employed, and when the height of the first layer semiconductor chip is sufficient, and there is no such danger, the forward method may be employed.

The reason why the forward method is used for bonding the semiconductor chip of the second layer and the substrate is to make the loop shape of the bonded wire into an arc shape as shown in FIG. At this time, the wire bonding the semiconductor chip of the first layer and the substrate does not become an obstacle regardless of the loop shape. That is, the height of the semiconductor chip of the first layer is smaller than the height difference between the lower end of the wedge and the lower end of the clamper due to the positional relationship between the wedge forming the bonding head and the clamper for holding and feeding the wire.

At this time, since the clamper of the bonding head is at the opposite position across the semiconductor chip and the wedge, even if the distance between the semiconductor chip and the corresponding bonding pad on the substrate is reduced, the semiconductor chip is moved by the bonding head. There is no danger of being destroyed.

If the shape of the wire bonding to the second layer semiconductor chip and the substrate is arcuate, when the third layer semiconductor chip and the substrate are joined together, as shown by a broken line in FIG. It is possible to bring the position of the bonding pad on the corresponding substrate closer to the semiconductor chip side without the clamper hitting the wire even when bonding is performed using.

Of course, there is no problem even if the third layer semiconductor chip and the substrate are bonded by the forward method. However, when the number of stacked semiconductor chips increases and the difference between the upper surface of the substrate and the upper surface of the semiconductor chip becomes too large, when bonding is performed by the forward method, the wires near the bonding pads on the upper surface of the semiconductor chip are greatly lowered as described above. Bends and wires are susceptible to damage. Therefore, in such a case, it is preferable to employ the reverse method.

[0020]

Next, the present invention will be further described with reference to examples.

In the present embodiment, the conventional example, and the comparative example, it is assumed that two chips are stacked, and if one of them is defective, an additional chip is mounted on the third stage to perform wire bonding. went.

In this example, the bonding pad for the first-stage semiconductor chip on the substrate is A, the pad for the second-stage semiconductor chip is B, the pad for the third-stage semiconductor chip is C, and a spare for this is provided. The pad is called D. The size of the semiconductor chip used was 7 mm in width × 15 mm in length × 0.1 mm in thickness.
45 mm and the wire is an aluminum wire with a diameter of 25 microns. Further, as a substrate on which a semiconductor chip is mounted, a substrate in which a power supply, a ground layer, and two wiring layers are formed on a silicon substrate was used.

As a wire bonding apparatus, a rotary head wedge bonder manufactured by Delbotech, Germany was used.

(Embodiment 1) First, as shown in FIG. 4, the distance b between the bonding pads A and B is 30 microns, the distance c between the bonding pads B and C is 30 microns, and C
The pad d of the first-stage semiconductor chip and the pad A of the substrate were bonded by a reverse method with the distance d between D and D being 30 microns. Subsequently, a second-stage semiconductor chip was stacked, and a pad of this semiconductor chip and a pad B of the substrate were bonded by a forward method.

Next, based on the assumption of the present embodiment, the third-stage semiconductor chips were stacked, and the pads of the third-stage semiconductor chips and the pads C and D of the substrate were wire-bonded by a reverse method.

Through the above steps, wire bonding was performed without causing the bonding head to hit another wire or semiconductor chip during bonding.

The distance a is determined in consideration of the flow of the resin when the semiconductor chip is mounted, and is generally set to about 550 microns.

(Embodiment 2) The gaps b, c, and d are set to 5 μm, which is the minimum pad gap that does not cause electrical contact (short circuit) between the pads. Was wire-bonded to the pad.

As in the first embodiment, the bonding head did not hit other wires or semiconductor chips during wire bonding.

(Example 3) Example 1 is different from the conventional pad arrangement rule in which D is provided outside C, that is, on the side farther from the semiconductor chip, and D is arranged between B and C.
Bonding was performed in the same manner as described above.

In this embodiment, as in the first embodiment, the bonding head can perform wire bonding without hitting a chip or a wire. From this result, it was found that the pad arrangement area could be further reduced.

(Comparative Example 1, Examples 4 to 7) According to the conventional chip arrangement rules, the distance between one chip (a peak) and the adjacent chip (a peak) is determined by setting the outermost pad (D −
The chips were arranged such that the distance of D ') was at least 900 microns. In the present embodiment, when wire bonding is performed on the pad of D or D ', since the reverse method is used, the clamper of the bonding head is located in the direction opposite to the adjacent chip wire. Therefore, when this method is adopted, the minimum pad spacing at which the bonding head can perform wire bonding without hitting a wire or chip can be made smaller than 900 microns. Therefore, DD ′ is set to 150 (Comparative Example 1), 190 (Example 4), 230 (Example 5), 270 (Example 6), and 35.
The distance was set to 0 (Example 7) microns, and the distance at which wire bonding could be performed without any problem was determined. As a result, between DD ′ is 19
It was found that it could be reduced to 0 microns. (Conventional example) As in the conventional case, b was set to 178 microns, c was set to 97 microns, and d was set to 96 microns, and all wire bonding was performed by the reverse method.

There was no particular problem during wire bonding.

(Comparative Example 2) b was set to 160 μm, and the bonding pads of the first-stage semiconductor chip and A,
Second stage semiconductor chip bonding pad and substrate B
And were both wire-bonded by the reverse method.

At the time of wire bonding of the second-stage semiconductor chip, the bonding head hit the second-stage semiconductor chip, and the chip was damaged.

(Comparative Example 3) When c was set to 80 μm, the bonding pads of the second-stage semiconductor chip and the B,
Third stage semiconductor chip bonding pad and substrate C
And were both wire-bonded by the reverse method.

During the third-stage wire bonding, the second-stage wire and the bonding head collided, and the second-stage wire was deformed. From the above, by using the method of the present invention, it is possible to easily increase the degree of integration in the lateral direction during MCM assembly.

[0038]

According to the method of the present invention, wire bonding can be performed so that the clamper of the bonding head does not hit the wire or the semiconductor chip. Therefore, the spacing between the bonding pads provided on the substrate is reduced. it can. As a result, the chips can be arranged with a reduced spacing, that is, the area of the substrate can be reduced, so that the cost of the substrate can be reduced. For example, instead of taking only four substrates per wafer, six or more substrates can be taken. At this time, the unit cost per substrate is reduced from wafer unit price / 4 to wafer unit price / 6, which can be reduced to 2/3.

If the method of the present invention is used for assembling an MCM,
The production cost of CM can be significantly reduced.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating an MCM according to the present invention.

FIG. 2 is a diagram illustrating an example in which a semiconductor chip and a substrate stacked in three layers are wire-bonded using a wedge bonding method.

FIG. 3 is a diagram showing a loop shape of a wire when a forward method is used for bonding a semiconductor chip of a second layer and a substrate.

FIG. 4 is a diagram exemplifying an arrangement state of bonding pads on a substrate used in a present example, a conventional example, and a comparative example.

[Explanation of symbols]

 1 ---- Memory IC 2--Logic IC 3--Logic IC

Claims (4)

[Claims] When bonding a multilayer semiconductor chip and a substrate using a wedge bonding method, at least a forward method, that is, a method of bonding a wire to a bonding pad on a semiconductor chip, is used as a method of bonding at least a second layer semiconductor chip and a substrate. A wire bonding method for a multi-layer semiconductor chip, which employs a method of performing first bonding and second bonding to bonding pads on a substrate. 2. The wire bonding method according to claim 1, wherein a reverse method is used for bonding the uppermost semiconductor chip and the substrate. 3. A method for assembling an MCM, comprising using the method according to claim 1. 4. An MCM assembled using the method of claim 3.