JPH10112538A - Resonance tunnel element and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a resonance tunnel element which is excellent in element characteristics. SOLUTION: A resonance tunnel element has an etching mask 104 on a (110) SOI board 100 and a (111) surface as a side surface thereunder. An Si fine structure body 111 (quantum well) having small width so as to function as a quantum well and a double barrier structure 112 formed of a tunnel oxide film 105 are formed. A pair of single crystalline silicon electrodes 113 are formed to cover the tunnel oxide film 105. According to the above structure, a resonance tunnel element with a single crystalline silicon electrode can be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resonant tunneling device and a method for manufacturing the same, and more particularly to a method for manufacturing a resonant tunneling device having single-crystal silicon as an electrode and a single-crystal silicon electrode formed by epitaxial growth. About the method.

[0002]

2. Description of the Related Art In recent years, multi-valued logic elements have been developed in order to realize a multi-function circuit that exceeds the degree of integration of circuits using conventional ON / OFF binary elements. One of them is a resonance tunnel element. Until now, resonant tunneling devices have been mainly developed using compound-based materials.However, methods have been proposed for forming them based on silicon-based materials in order to ensure compatibility with widely used silicon ULSI. (JP-A-7-312419). It has the following configuration (FIG. 4).

First, an SOI (Silicon) having a plane orientation of (110) is used.
(Insulator) An etching mask 404 is formed on the SOI layer 403 of the substrate 400 (FIG. 4A). Next, the etching mask 404 is oriented parallel or perpendicular to the <211> crystal orientation of the (110) SOI substrate 400. Patterned into a rectangular shape 2
One etching window 4000 and a mask pattern 419 therebetween are formed (FIG. 4B).

[0004] Thereafter, crystal anisotropic etching is performed by using an etchant of a mixed solution of ethylenediamine, pyrocatechol and water to etch the SOI layer 403. Due to the anisotropy of the etching, the etching rate in the <111> direction is smaller than the other plane orientations. Therefore, by controlling the etching time, the side walls made of the silicon (111) plane are formed below the mask pattern 419. Thus, a silicon microstructure 411 having a width sufficiently thin enough to function as a quantum well can be formed (FIG. 4C).

Thereafter, a tunnel oxide film 405 is formed on both sides of the Si microstructure 411 (FIG. 4D).
Polysilicon layer 41 on (110) SOI substrate 400 including
7 is deposited, and then an impurity having the same conductivity type as that of the SOI substrate 400 is doped at a high concentration (FIG. 4E). Next, the polysilicon layer 417 is patterned to form a pair of polysilicon electrodes 4 sandwiching the pair of tunnel barriers from both sides.
18 are formed (FIG. 4F).

According to the above-described steps, the Si microstructure 411 having a very small width so as to function as a quantum well is used as a quantum well, and the tunnel oxide film 40 is formed on both sides thereof.
The resonant tunneling element having the double barrier structure 412 on which the element 5 is formed can be formed.

[0007]

However, the conventional semiconductor device manufacturing method has the following problems.

The basic principle of the operation of the resonant tunneling element is a phenomenon in which a tunnel current flows when the energy of the electrons of the electrode coincides with the quantum level inside the quantum well. In order to exhibit good device characteristics with a large P / V ratio (ratio of maximum current value / minimum current value), it is necessary to make the energy of electrons injected from the electrode into the quantum well within a certain range.

However, in the case of a polycrystalline or amorphous electrode, the effective mass is not uniform within the electrode, and
Inevitably distribution range of energy spread for such as electron scattering. For this reason, it is necessary to form the electrode with a single crystal semiconductor. However, in the conventional method of forming a resonant tunneling device, since the electrodes are formed of polycrystalline polysilicon, it is difficult to exhibit good device characteristics with a large P / V ratio.

The present invention has been made to solve the above problems, and an object of the present invention is to propose an element structure exhibiting good device characteristics in order to obtain a resonant tunneling device exhibiting good characteristics. And a method for forming an electrode of single crystal silicon for the formation thereof.

[0011]

In order to achieve the above object, the present invention proposes a structure of a resonance tunnel device using single crystal silicon as an electrode. In addition, a method for forming a single-crystal silicon electrode of a resonant tunneling device using epitaxial growth of single-crystal silicon using a seed crystal is proposed. As a specific method, the following means is used.

A first step of forming an etching mask on the surface of the SOI layer of the SOI substrate; and etching of the SOI layer by performing crystal anisotropic etching to form a first / second (111)
A second step of forming a third / fourth (111) plane near the silicon thin plate at the same time as forming a silicon thin plate having a surface as a quantum well of the resonant tunneling device; Forming a tunnel barrier on the second silicon (111) surface, forming a double barrier structure together with the silicon thin plate, and forming a tunnel barrier on the third / fourth (111) surface; Step 3, a fourth step of covering the double barrier structure with a wet etching resistant mask, and wet etching to form the third / fourth silicon (1).
11) a fifth step of removing a tunnel barrier on the surface, and a sixth step of removing the wet etching resistant mask;
The third / fourth (111) planes are formed on the third / fourth (111) planes by crystal anisotropic etching by a silicon epitaxial growth method.
A seventh step in which a silicon single crystal is grown from the fourth silicon (111) surface, and the grown crystal covers the tunnel barrier on the first / second surface, forming a structure in which the single crystal silicon is in close contact with the tunnel barrier. And a ninth step of introducing an impurity into the single-crystal silicon and an ninth step of patterning the single-crystal silicon and forming an electrode for the double barrier structure. An element is formed.

In the fifth step, dry etching is used instead of wet etching,
The tunnel barrier on the fourth silicon (111) surface may be removed.

The single crystal silicon electrode of the resonance tunnel element can be formed by using the above-mentioned means.

[0015]

Embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1) FIG. 1 is a diagram showing a resonance tunnel device according to a first embodiment of the present invention. (110) SOI
An etching mask 104 is formed on a substrate 100, and a 111 Si microstructure (quantum well) having a (111) plane as a side surface and having a very small width enough to function as a quantum well, and a tunnel oxide film 105 below the etching mask 104. Double barrier structure 1
12 are formed. A pair of single-crystal silicon electrodes 113 are formed so as to cover the surface of the tunnel oxide film 105.

With the above structure, a resonance tunnel device having a single crystal silicon electrode can be realized.

(Embodiment 2) FIG. 2 is a view showing a method of manufacturing a resonant tunneling device according to a second embodiment of the present invention. 200 is a (110) SOI substrate.

On the SOI layer 203, a 75 nm-thick etching mask 204 of a silicon oxide film is formed by pyro-oxidation at 900 ° C. (FIG. 2A).

Next, by the ordinary optical lithography technique,
An etching window 2000 parallel to the <211> direction is formed on the etching mask 204, and a mask pattern 219 is formed therebetween (FIG. 2B).

Next, when a crystal anisotropic etching is performed with a mixed solution of ethylenediamine, pyrocatechol and water,
Due to the anisotropy of the etching rate, the etching rate of the <111> crystal orientation is much smaller than other plane orientations.
Below the mask pattern 219, a Si microstructure 211 having a (111) plane perpendicular to the substrate surface as a side surface is formed. By controlling the amount of etching, the Si
The thickness of the microstructure 211 can be extremely thin enough to function as a quantum well. At this time, the (111) plane 210 can be simultaneously formed at a position facing the Si microstructure 211 (FIG. 2C).

Subsequently, pyro-oxidation is performed at 700 ° C.
Tunnel oxide films 205a and 205b having a thickness of 1.5 nm are formed on the (111) plane of the surface of the Si microstructure 211 and the plane region 210 (FIG. 2D).

A resist mask 206 is formed on the Si microstructure 211.
Is formed to cover the surface region 210 by hydrofluoric acid HF.
The tunnel oxide film 205b formed thereon is removed. At this time, the tunnel oxide film 205a formed on the (111) plane on the side surface of the Si microstructure 211 remains without being removed (FIG. 2).
(e)).

After removing the resist mask 206, the surface region 21 is removed.
Epitaxial growth is performed using the exposed Si (111) plane as a seed crystal to convert the single crystal silicon 207 to the Si microstructure 21.
1 until it covers the surface. Single crystal silicon 207
Inside, impurities are diffused by thermal diffusion or implantation. Thus, a single crystal silicon electrode 213 connected to the double barrier structure 212 including the Si microstructure (quantum well) 211 and the tunnel oxide film 205a can be formed (FIG. 2F).

As described above, by growing the single crystal silicon 207 using the plane region 210 as a seed crystal, the resonance tunnel element and the single crystal silicon electrode 213 can be formed.

(Embodiment 3) FIG. 3 is a view showing a method of manufacturing a resonant tunneling device according to a third embodiment of the present invention.

Reference numeral 300 denotes a (110) SOI substrate. A 75 nm-thick etching mask 304 made of a silicon oxide film is formed on the SOI layer 303 by pyro-oxidation at 900 ° C.
Next, an etching window 3 parallel to the <211> direction is formed on the etching mask 304 by a normal photolithography technique.
000, and a mask pattern 319 is formed between them.

Next, when a crystal anisotropic etching is performed with a mixed solution of ethylenediamine, pyrocatechol and water,
Due to the anisotropy of the etching rate, the etching rate of the <111> crystal orientation is much smaller than other plane orientations.
Below the mask pattern 319, a Si microstructure 311 having a side surface of a (111) plane perpendicular to the substrate surface is formed. At the same time, the (111) face 3
10 can be formed. By controlling the amount of etching, the thickness of the Si microstructure 311 can be made extremely thin enough to function as a quantum well.
Subsequently, pyro-oxidation at 700 ° C. is performed to obtain a Si microstructure 3.
Tunnel oxide films 305a and 305b having a thickness of 1.5 nm are formed on the surface 11 and the (111) plane 310 (FIG. 3A).

A resist mask 306 is formed on the Si microstructure 211.
Is formed so as to cover (FIG. 3 (b)), dry etching is performed so that the etching mask 304 and (1) are simultaneously formed.
11) The tunnel oxide film 305b formed on the surface 310 is removed (FIG. 3C). Thereby, Si seed crystal 320 is formed.

After removing the resist (FIG. 3D), the Si seed crystal 3
20 is grown by epitaxial growth to grow single crystal silicon 307 and cover the Si microstructure 311 (FIG. 3).
(e)). After diffusing impurities into the single crystal silicon 307 by thermal diffusion or ion implantation, the single crystal silicon is patterned by dry etching using the etching mask 304 as an etch stop to form a single crystal silicon electrode 313 (FIG. 3 (f)).

As described above, by growing single crystal silicon 307 using Si seed crystal 320, a resonance tunnel element and single crystal silicon electrode 313 can be formed.

[0032]

According to the resonant tunneling device and the method of manufacturing the same of the present invention, a single crystal electrode of the resonant tunneling device is formed by an epitaxial growth method using a part of the SOI layer as a seed crystal. As a result, a resonant tunneling device having a large P / V ratio and good characteristics can be formed.

[Brief description of the drawings]

FIG. 1 is a configuration sectional view of a resonance tunnel element according to a first embodiment of the present invention;

FIG. 2 is a process sectional view showing the method for manufacturing the resonant tunneling device of the present invention.

FIG. 3 is a process sectional view showing the method for manufacturing the resonant tunneling device of the present invention.

FIG. 4 is a cross-sectional view showing a method for manufacturing a conventional resonance tunnel element.

[Explanation of symbols]

 REFERENCE SIGNS LIST 100 (110) SOI substrate 101 Si (110) substrate 102 buried oxide film layer 104 etching mask 105 tunnel oxide film 111 Si microstructure 112 double barrier structure 113 single crystal silicon electrode 200 (110) SOI substrate 201 Si (110) Substrate 202 buried oxide film layer 203 SOI layer 204 etching mask 205 (a, b) tunnel oxide film 206 resist mask 207 single crystal silicon 208 implantation region 210 (111) plane 211 Si microstructure 212 double barrier structure 213 single crystal Si Electrode 219 mask pattern 2000 etching window 300 (110) SOI substrate 301 Si (110) substrate 302 buried oxide film layer 303 SOI layer 304 etching mask 305 (a, b) tunnel oxide film 306 resist mask 307 single crystal silicon 310 (111) Plane 311 Si microstructure 312 double barrier structure 313 single crystal Recon electrode 319 Mask pattern 320 Si seed crystal 3000 Etching window 400 (110) SOI substrate 401 Si (110) substrate 402 Embedded oxide film layer 403 SOI layer 404 Etching mask 405 Tunnel oxide film 411 Si microstructure 412 Double barrier structure 417 Polysilicon layer 418 polysilicon electrode 419 mask pattern 4000 etching window

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification symbol FI H01L 29/88 H01L 29/88 F (72) Inventor Seiji Araki 1006 Ojidoma, Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (4)

[Claims] A double-barrier structure comprising: an electrode / oxide film / silicon quantum well / oxide film / electrode; wherein said electrode is single crystal silicon; Is a single crystal silicon resonant tunneling device. 2. A method for manufacturing a resonant tunneling device, comprising the steps of: performing epitaxial growth of silicon using single crystal silicon as a seed crystal to form a single crystal silicon electrode. 3. A first step of forming an etching mask on the surface of the SOI layer, and the SOI layer is etched by performing crystal anisotropic etching to make the first / second (111) plane the surface. At the same time as forming a silicon thin plate as a quantum well of a resonant tunneling device, a third / fourth (1) is placed near the silicon thin plate.
11) a second step of forming a surface; forming a tunnel barrier on the first / second silicon (111) surface; forming a double barrier structure together with the silicon thin plate; A third step of forming a tunnel barrier on the fourth (111) plane; a fourth step of covering the double barrier structure with a wet-resistant etching mask; and a third / fourth step of wet etching. silicon
A fifth step of removing a tunnel barrier on the (111) plane, a sixth step of removing the wet etching resistant mask, and forming the third / fourth (111) plane by silicon by crystal anisotropic etching. The third /
A silicon single crystal is grown from the fourth silicon (111) plane, and the grown single crystal silicon covers the tunnel barriers on the first and second surfaces to form a structure in which the single crystal silicon is in close contact with the tunnel barrier. A seventh step, an eighth step of introducing impurities into the single crystal, and a step of patterning the grown single crystal silicon to form an electrode having the double barrier structure, the resonance tunnel device having a single crystal silicon electrode. And a ninth step of forming. 4. In the fifth step, the third / fourth step is performed by using dry etching instead of wet etching.
4. The method according to claim 3, wherein a tunnel barrier on the silicon (111) surface is removed.