JPH10112506A - Circuit design supporting method/device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To substantially shorten the processing time of simulation and to efficiently design a circuit. SOLUTION: At the time of designing the design circuit by changing only a circuit constant, without changing topology based on an existed circuit, an input part 2 inputs data D1-D5 such as a parameter and a setting value, and a circuit simulation part 4 simulates the design circuit. Thus, a circuit constant correction part 5 converges the gate width and the gate length of a transistor in the design circuit, judges whether or not the difference in the operation point characteristics of the transistors between the design circuit and the existed circuit is within the reference and displays the gate width and the gate length of the transistor in the design circuit within the reference for a display part 7. The transistor of the design circuit, which is out of reference, is also displayed on the display part 7.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit design support method and apparatus, and more particularly, to an ASIC (Application).
The present invention relates to a technology effective when applied to optimization of circuit constants in a MOS transistor for an ion specific IC.

[0002]

2. Description of the Related Art According to studies made by the present inventors, in a semiconductor device for a specific application, that is, an ASIC, when a manufacturing process is changed, a power supply voltage is changed, and a performance specification of a functional block is changed, a circuit is changed. Since a major change in the system is rare, a new design is not performed, an existing circuit is reused, and a CAD (Computer Aided Design) is used.
gn) and the like, the circuit is redesigned using a circuit constant optimization program.

[0003] As an example describing this type of semiconductor device in detail, see Nikkei P. May 10, 1996.
Published by Company B, Shinichi Jimbo (author), “Latest Microprocessor Technology”, P187.
And its architecture.

[0004]

However, the inventor of the present invention has found that the above-described ASIC redesign has the following problems.

That is, in the redesign of the MOS transistor of the ASIC, even if only the manufacturing process is changed, the design for the circuit performance and the circuit performance is performed in the same manner as when all the changes such as the power supply voltage and the performance specification are made. Since the optimization method using the difference from the specification value as the evaluation function is employed, there is a problem that the processing time increases.

Another problem is that it is difficult to select circuit performance to be included in an evaluation function in circuit constant optimization and to take measures when an optimum solution cannot be obtained.

SUMMARY OF THE INVENTION An object of the present invention is to provide a circuit design support method and apparatus which can greatly reduce the simulation processing time and can efficiently design a circuit.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0009]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, the circuit design support method of the present invention
Based on the input circuit design data, set the operating point characteristics, gate width, and gate length of the MOS transistor in the existing circuit, which is the basis of the design circuit to be newly designed, for each corresponding MOS transistor in the design circuit. Based on the step of performing a circuit operation simulation of the circuit and the result of the circuit operation simulation,
Determining whether or not the gate length and gate width of the MOS transistor in the design circuit are equal to or smaller than a minimum processing size; and determining that the gate length and gate width of the MOS transistor in the design circuit are equal to or larger than the minimum processing size. Correcting the gate length and gate width of the MOS transistor of the circuit to be equal to or less than the minimum processing size, and whether the difference between the operating point characteristic of the MOS transistor in the design circuit and the operating point characteristic of the MOS transistor in the existing circuit is within the set range Determining whether or not the MO
Operating point characteristics of S transistors and MOS in existing circuits
A step of displaying a circuit diagram of the design circuit and a gate length and a gate width of the MOS transistor in the design circuit when it is determined that the difference from the operating point characteristic of the transistor is within the set range.

Further, the circuit design support method according to the present invention, when it is determined that the difference between the operating point characteristic of the MOS transistor in the design circuit and the operating point characteristic of the MOS transistor in the existing circuit is out of the setting range, The step of displaying the MOS transistor of the design circuit determined to be outside is provided.

Further, in the circuit design support method according to the present invention, the operating point characteristics of the MOS transistor of the existing circuit and the MOS transistor of the design circuit may be determined by determining whether the operating point
It consists of a source-to-source bias voltage and transconductance.

A circuit design support apparatus according to the present invention further comprises an input unit for inputting various circuit design data, and a gate-source connection of a MOS transistor in an existing circuit based on the circuit design data input by the input unit. An extraction setting unit that extracts a bias voltage, a drain-source bias voltage, a mutual conductance, a gate width, and a gate length, and sets the corresponding MOS transistor in the design circuit, and a circuit design data and an extraction setting unit. A circuit simulation unit for simulating a circuit operation of the design circuit; and, based on a simulation result by the circuit simulation unit, determining whether a gate length and a gate width of the MOS transistor in the design circuit are equal to or smaller than a minimum processing dimension. If it is larger than the processing dimension, Circuit constant correction unit that corrects the gate length and gate width of the MOS transistor in the path to be equal to or less than the minimum processing size, and the gate-source bias voltage, drain-source bias voltage and the mutual conductance of the MOS transistor in the design circuit and the existing circuit. A match judging unit for judging whether or not a difference between a gate-source bias voltage, a drain-source bias voltage, and a mutual conductance of the MOS transistor is within a set range; And a display unit for displaying a gate length and a gate width of the MOS transistor in the design circuit determined to be and a circuit diagram of the design circuit.

As described above, the design time for an ASIC design circuit that changes the circuit constants alone without changing the topology of the existing circuit on which the new design circuit is based is significantly reduced. be able to.

[0015]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram of a circuit design support apparatus according to one embodiment of the present invention, FIG. 2 is an operation flowchart of the circuit design support apparatus according to one embodiment of the present invention,
FIG. 3 is a circuit diagram showing circuit constants of an existing circuit according to one embodiment of the present invention, and FIG. 4 is a design circuit showing circuit constants designed by a circuit design support apparatus according to one embodiment of the present invention. FIG. 5 is an explanatory diagram showing a display example of a circuit diagram of a transistor whose circuit constant is not optimized according to an embodiment of the present invention. FIG. 6 is a block diagram of a circuit design support device studied by the present inventors, and FIG. 7 is an operation flowchart of the circuit design support device studied by the present inventors.

In this embodiment, a circuit design support apparatus 1 for supporting design of an ASIC is provided with an input unit 2 for inputting various data such as circuit data and parameters of an existing circuit on which a design circuit is based. I have.

The circuit design support apparatus 1 extracts operating point characteristics including a drain-source bias voltage and a mutual conductance of a MOS transistor in an existing circuit, and extracts a corresponding MOS of a newly designed circuit.
An extraction setting unit 3 for setting a transistor and a circuit simulation unit 4 for performing a circuit simulation for operating point analysis of a MOS transistor are provided.

The circuit simulator uses a circuit simulator. SPI developed at the University of California, Berkeley on what is known as a circuit simulator
There is CE. This is to calculate node potential and element current in a circuit by solving equations based on Kirchhoff's law and Ohm's law from circuit data.

Further, the circuit design support device 1 includes a circuit constant correction unit 5 for correcting the gate width and gate length of the MOS transistor, a coincidence determination unit 6 for determining the coincidence of the operating point characteristics of the MOS transistors, and a circuit diagram. A display unit 7 for displaying characters and figures is provided.

The circuit design support apparatus 1 is provided with a control unit 8 that controls all the operations of the circuit design support apparatus 1. Further, the control unit 8 is provided with a storage unit for storing predetermined data input from the input unit 2.

Next, the operation of the present embodiment will be described with reference to the operation flowchart of the circuit design support apparatus 1 shown in FIGS. 1 and 2, the circuit diagram of an existing circuit on which the design shown in FIG. 3 is based, and the design shown in FIG. This will be described with reference to the circuit diagram of the design circuit.

First, in FIG. 3, the existing circuit is a circuit diagram of an operational amplifier. This circuit includes transistors T1 to T14 which are MOS transistors, capacitors C1 and C2, and resistors R1 and R2. FIG.
, Each of the transistors T1 to T14 has a gate width W1 to W14 and a gate length L1 to L1.
4 and each transistor T1
ＴT14.

A case will be described in which only the circuit constants are changed without changing the topology based on the existing circuit and the design is performed.

First, data (circuit design data) D1, which is a parameter of a manufacturing process in a transistor of an existing circuit, such as a threshold voltage, an impurity concentration, and a fitting parameter, and a threshold voltage, Data (circuit design data) D2, which is a parameter of a manufacturing process in a transistor of a newly designed design circuit such as an impurity concentration and a fitting parameter, and the above-described operating point characteristics of the transistor, that is, a drain-source bias voltage and a mutual conductance (Circuit design data) D consisting of the allowable error of
3 and data as a convergence determination reference value for the gate width and gate length of the MOS transistor (circuit design data)
D4 is input (step S101).

Here, data D4, which is a convergence judgment reference value for the gate width and gate length of the MOS transistor, is shown.
Is input by the user, and the method of determining this value is as follows.

In general, in the case of arranging MOS transistors, design rules are determined based on the processing accuracy of the LSI manufacturing apparatus, and the minimum values of the MOS transistor dimensions are included in the design rules. Therefore, as a criterion for determining the convergence of the gate width and the gate length of the MOS transistor size, a value sufficiently smaller than the minimum value of the MOS transistor size in the design rule is used.
A value of 1/10 of the minimum value of the transistor size is used.

Next, similarly, data (circuit design data) D5 including circuit constants such as operating point characteristics of transistors in the existing circuit and topology of the existing circuit is input from the input unit 2 (step S102).

Here, the gate widths W1 to W14 and the gate lengths L of the transistors T1 to T14 in the existing circuit are shown.
1 to L14 are the transistor gate width and the gate length of the corresponding design circuit, and are set as initial values for optimization.

Then, based on the data D1 to D5, the circuit simulation unit 4 performs a circuit operation simulation of operating point analysis in the design circuit (step S5).
103).

Next, based on the result of the circuit operation simulation, the circuit constant correction unit 5 determines whether the gate width and the gate length of each transistor in the design circuit have converged (step S104).

The convergence determination method is as follows. With respect to the gate width and gate length Wg1 to Wg14 and Lg1 to Lg14 of each MOS transistor of the design circuit shown in FIG.
The values in the current iteration are represented by Wg1 ′ to Wg14, Lg1 ′
~ Lg14 'and the value in the previous iteration Wg1 "~
Wg14 ″, Lg1 ″ to Lg14 ″.

The data D4, which is a convergence criterion for the gate width and gate length of the MOS transistor, is set to δ.
And At this time, the convergence determination condition is | Wg1 ″ −Wg
1 ′ | <δ to | Wg14 ″ −Wg14 ′ | <δ, | Lg
1 ″ −Lg1 ′ | <δ to | Lg14 ″ −Lg14 ′ | <
δ.

Δ is the MOS in the design rule as described above.
Since the value is sufficiently small with respect to the minimum value of the size of the transistor, even if the gate width and the gate length of the MOS transistor are corrected by an amount smaller than these values, there is no effect and the convergence judgment is a sufficient value.

If it is determined in step S104 that the gate width and gate length of the transistors in the design circuit have converged, the operating point characteristics of the transistors in the design circuit are changed based on the data D3 input in step S101. (Step S105).

In this determination, the reference value is used, and it is determined that the difference between the operating point characteristic of the transistor of the design circuit and the operating point characteristic of the existing circuit is the same when the sum of squares is smaller than the reference value. In other words, the reference value is ε, the mutual conductance of the MOS transistor of the circuit design and the existing circuit and the MOS transistor of the design circuit of Ti is gmgi, and the mutual conductance of the MOS transistor Tri of the design circuit and the MOS transistor Ti of the existing circuit are respectively gmgi, gmi, and similarly, when the respective drain-source bias voltages are vdsi (where i is 1 to 14), the convergence determination conditions are as follows.

Here, the setting of the reference value needs to be a sufficiently small value, but the user decides, for example, each of the values of the operating point characteristics of the MOS transistor of the existing circuit to 1/100.

In the existing circuit, the transistor T1
A circuit simulation using the Monte Carlo method with respect to manufacturing variations and changes in the use environment from T14 to T14 may be performed, and the amount of change in operating point characteristics may be set to a reference value.

Next, if it is determined in step S104 that the convergence has not been achieved, the circuit constant correcting unit 5 sets the MOS transistor of the design circuit so that the operating point characteristics of the transistors of the designed circuit approach those of the existing circuit. All MOs in a design circuit are calculated using a nonlinear minimization method that uses the sum of squares of the difference between the operating point characteristics and the operating point characteristics of the existing circuit as an evaluation function.
The gate width and the gate length of the S transistor are corrected (Step S106).

The non-linear minimization method is a method in which the direction in which the value of the evaluation function becomes smaller is determined using the differential coefficient of the evaluation function, and the minimum point of the evaluation function is sequentially searched in the direction. Representative examples include the steepest descent method, the quasi-Newton method, and the sequential quadratic programming method. Examples of this type of algorithm are described in detail in 1990, published by Nisshin Gijutsu, Hiroshi Konno, Hiroshi Yamashita (Author) ) "Nonlinear programming" and 199
One year, published by Nikkan Kogyo Shimbun, ASNOP Study Group (author)
It is described in “Nonlinear Optimization Programming”.

If it is determined in step S105 that the operating point characteristics of the transistors of the designed circuit and the operating points of the transistors T1 to T14 of the existing circuit are the same, the circuit is designed as shown in FIG. Transistor T
The data and circuit diagrams of the gate widths Wg1 to Wg14 and the gate lengths Lg1 to Lg14 of r1 to Tr14 are output as circuit data D6 of the design circuit shown in FIG.
Is displayed (step S107). The circuit diagram displayed on the display unit 7, that is, the topology in FIG. 4 is the same as the existing circuit in FIG.

If it is determined in step S105 that the operating point characteristics of the transistors in the design circuit are not identical to the operating point characteristics of the existing circuit,
As shown in (5), the unmatched transistor is displayed on the display unit 7 by, for example, color inversion display (step S108).

For example, FIG. 5 shows an example in which in the designed circuit, the transistors Tr2 and Tr9 having the same operating point characteristics of the existing circuit are displayed in color inversion on the display unit 7. This display allows the user to know that the variation in the transconductance of the transistors Tr2 and Tr9 is larger than that of the existing circuit.

FIG. 6 shows a conventional circuit design support apparatus 30 studied by the present inventors.

First, the circuit design support apparatus 30 has an input section 31 for inputting arbitrary data and the like, an initial setting section 32 for initial setting of circuit constant optimization, and performs a circuit simulation based on the input predetermined data. A circuit simulation unit 33 and a change circuit constant correction unit 34 for performing convergence determination on changes in gate width and gate length of a transistor
Is provided.

The control unit 35 is provided in the circuit design support device 30 and controls all the control in the circuit design support device 30.

Next, this circuit design support device 30 is
This will be described with reference to the operation flowchart of FIG.

First, the specification data D30 of the existing circuit, such as the transistor gain, the frequency band, and the input voltage range,
Data D31, which is a parameter of a manufacturing process in the transistor of the design circuit, and circuit constants such as the operating point characteristics of the transistor in the existing circuit and data D32 including the topology of the existing circuit are input through the input unit 31 (step S301). Initial values of circuit constants are set to perform optimization (step S302).

Here, the values of the gate width and gate length of the corresponding transistor in the existing circuit are set as initial values for optimization.

Then, in order to optimize the circuit constants, a circuit simulation for measuring the gain of the design circuit is performed by the circuit simulation section 33 (step S).
303).

Next, a circuit simulation for measuring the frequency band of the design circuit is also performed by the circuit simulation section 33 (step S304). Thereafter, a circuit simulation for measuring the input voltage range of the design circuit is performed by the circuit simulation section. 33 (step S305).

Then, convergence judgment is performed by the change circuit constant correction unit 34 for the change of the gate width and the gate length of all the transistors (step S306). In this convergence determination, a criterion is set for the amount of change, and if the change is less than the criterion, convergence is determined.

If it is determined in step S306 that the convergence is not achieved, the changing circuit constant correcting unit 34 corrects the gate width and the gate length of the transistor so that the gain, band, and input voltage range of the design circuit are close to the specifications ( Step S307). Here, a nonlinear optimization method such as a sequential quadratic programming method is used for the correction.

If it is determined in step S306 that convergence has occurred, the process exits the optimization loop and outputs the optimized gate width and gate length data D31 of the transistor as circuit data D33 of the design circuit. (Step S308).

Here, from FIGS. 6 and 7, in the circuit design support device 30 examined by the present inventor, in steps S303 to S305, a plurality of simulations must be performed, and the user needs to perform these simulations. Since various kinds of data must be set each time, the processing time becomes longer.

However, the circuit design support apparatus 1 according to the present embodiment not only reuses the circuit topology but also reuses the circuit topology.
By reusing the operating point characteristics of the transistors T1 to T14 of the existing circuit, the circuit simulation, which requires only the types of performance to be considered as specifications in the optimization of the circuit constants, can be changed to only the operating point analysis in step S103 (FIG. 2). can do.

Thus, in this embodiment, the operating point characteristics of the transistors T1 to T14 can be obtained by operating point analysis of one circuit simulation, so that the processing time for optimizing the circuit constant can be greatly reduced. .

Further, since the transistors for which the optimum dimensions have not been obtained are displayed, locations having problems in optimizing the circuit constants can be grasped, countermeasures can be easily taken, and the work can be made more efficient.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

[0060]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1) According to the present invention, the processing time for circuit constant optimization can be greatly reduced.

(2) In the present invention, since the evaluation function in the circuit operation simulation is only the operating point characteristic, selection by the designer is unnecessary, and the work by the simulation can be easily performed.

(3) Further, in the present invention, circuit design in an ASIC without changing the topology can be performed in a short period of time, and the design cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram of a circuit design support device according to an embodiment of the present invention.

FIG. 2 is an operation flowchart of the circuit design support apparatus according to the embodiment of the present invention;

FIG. 3 is a circuit diagram showing circuit constants of an existing circuit according to one embodiment of the present invention.

FIG. 4 is a circuit diagram of a design circuit showing circuit constants designed by the circuit design support apparatus according to one embodiment of the present invention.

FIG. 5 is an explanatory diagram showing a display example of a circuit diagram of a transistor whose circuit constant is not optimized according to an embodiment of the present invention.

FIG. 6 is a block diagram of a circuit design support device studied by the present inventors.

FIG. 7 is an operation flowchart of the circuit design support apparatus studied by the present inventors.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Circuit design support apparatus 2 Input part 3 Extraction setting part 4 Circuit simulation part 5 Circuit constant correction part 6 Matching determination part 7 Display part 8 Control part T1-T14 Transistor C1, C2 Capacitor R1, R2 Resistance W1-W14 Gate width L1- L14 Gate length D1 to D5 Data (circuit design data) D6 Data Tr1 to Tr14 Transistors Wg1 to Wg14 Gate width Lg1 to Lg14 Gate length 30 Circuit design support device 31 Input unit 32 Initial setting unit 33 Circuit simulation unit 34 Change circuit constant correction unit 35 Control unit D30 Specification data D31 data D32 data D33 Circuit data

Claims (4)

[Claims] 1. A circuit design support method for designing a design circuit by changing only circuit constants without changing the topology of an existing circuit on which a new design circuit is based, comprising: Setting an operating point characteristic, a gate width, and a gate length of a MOS transistor in the existing circuit for each corresponding MOS transistor in the design circuit based on the design data, and performing a circuit operation simulation of the design circuit; Judging whether or not the gate length and the gate width of the MOS transistor in the design circuit are equal to or smaller than a minimum processing size based on the result of the circuit operation simulation; If it is determined that the minimum processing dimension is exceeded, the MOS transistor of the design circuit Correcting the gate length and the gate width to be equal to or smaller than the minimum processing size in the above-mentioned process; and determining whether the difference between the operating point characteristics of the MOS transistor in the design circuit and the operating point characteristics of the MOS transistor in the existing circuit is within a set range. Determining that the difference between the operating point characteristic of the MOS transistor in the design circuit and the operating point characteristic of the MOS transistor in the existing circuit is within a set range; and Displaying a gate length and a gate width of a MOS transistor in a design circuit. 2. The circuit design support method according to claim 1, wherein a difference between an operating point characteristic of the MOS transistor in the design circuit and an operating point characteristic of the MOS transistor in the existing circuit is determined to be out of a set range. Displaying a MOS transistor of the design circuit determined to be out of the setting range. 3. The circuit design support method according to claim 1, wherein the operating point characteristics of the MOS transistor of the existing circuit and the MOS transistor of the design circuit are a drain-source bias voltage and a mutual conductance. Characteristic circuit design support method. 4. A circuit design supporting apparatus for designing a design circuit by changing only circuit constants without changing the topology of an existing circuit on which a new design circuit is based, comprising: An input unit for inputting data, and a gate-source bias voltage, a drain-source bias voltage, a mutual conductance and a gate width, a gate width of the MOS transistor in the existing circuit, based on the circuit design data input by the input unit. Length and extract the corresponding M in the design circuit.
An extraction setting unit for setting the OS transistor; a circuit simulation unit for performing a circuit operation simulation of the design circuit set by the circuit design data and the extraction setting unit; and a circuit simulation unit based on a simulation result by the circuit simulation unit. It is determined whether or not the gate length and gate width of the MOS transistor are smaller than the minimum processing size. If the gate length and gate width are larger than the minimum processing size, the gate length and gate width of the MOS transistor of the design circuit are corrected to the processing size setting values. A circuit constant correction unit that performs a bias voltage between a gate and a source, a bias voltage between a drain and a source, and a mutual conductance of a MOS transistor in the design circuit;
A match determining unit that determines whether a difference between the gate-source bias voltage, the drain-source bias voltage, and the transconductance of the OS transistor is within a set range; And a display unit for displaying a gate length and a gate width of a MOS transistor and a circuit diagram of the design circuit in the design circuit determined to be: