JPH10104574A - Liquid crystal display device - Google Patents

Liquid crystal display device

Info

Publication number
JPH10104574A
JPH10104574A JP25962696A JP25962696A JPH10104574A JP H10104574 A JPH10104574 A JP H10104574A JP 25962696 A JP25962696 A JP 25962696A JP 25962696 A JP25962696 A JP 25962696A JP H10104574 A JPH10104574 A JP H10104574A
Authority
JP
Japan
Prior art keywords
voltage
circuit
signal
liquid crystal
scanning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP25962696A
Other languages
Japanese (ja)
Other versions
JP3475025B2 (en
Inventor
Toshihiko Tanaka
俊彦 田中
Koji Maeda
耕志 前田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Tottori Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Tottori Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP25962696A priority Critical patent/JP3475025B2/en
Publication of JPH10104574A publication Critical patent/JPH10104574A/en
Application granted granted Critical
Publication of JP3475025B2 publication Critical patent/JP3475025B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

PROBLEM TO BE SOLVED: To solve a problem that a voltage fluctuation is intensively generated on a specific bias potential or a waveform accent is generated in driving a simple matrix with a very large display capacity, by involvement in a power source circuit supplying a prescribed voltage (bias voltage). SOLUTION: This liquid crystal display device is provided with a liquid crystal cell 1 with groups of electrodes orthogonal to each other, scanning circuits 2 which select either of positive and negative selection voltages and supply it as a scanning voltage, signal circuits 3 which selectively supply a signal voltage near a median of the positive and negative selected voltages, a power source circuit 4 to supply a prescribed voltage value, and a data circuit 5 to supply necessary timing signal. The liquid crystal cell 1 is split into plural areas, and alternates an applied voltage with an alternating signal for each split area. The power source circuit 4 supplies a bias voltage through an operational amplifier circuit with a push-pull circuit at an output stage, and is provided with a capacitor connected across the outputs of the intermediate voltage and signal voltage.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はいわゆる単純マトリ
クス駆動に好適な液晶表示装置に関する。
The present invention relates to a liquid crystal display device suitable for so-called simple matrix driving.

【0002】[0002]

【従来の技術】従来より、互いに直交する電極群を有す
る液晶セルの駆動、いわゆる単純マトリクス駆動に於て
は、一方の電極群の電極に順次電圧レベルの高い電圧を
与え、その電圧レベルの高い電圧を印加しているときに
他方の電極群に画信号に応じた電圧を与える線順次走査
を行っており、さらに液晶に直流を印加しないために特
公昭57−57718号公報に示されるように、交流化
信号で印加電圧の交流化をはかる目的で極性反転をさせ
ていた。
2. Description of the Related Art Conventionally, in driving a liquid crystal cell having electrode groups orthogonal to each other, that is, a so-called simple matrix drive, a voltage of a high voltage level is sequentially applied to the electrodes of one of the electrode groups, and the voltage of the high voltage level is increased. As shown in Japanese Patent Publication No. 57-57718, line-sequential scanning is performed in which a voltage corresponding to an image signal is applied to the other electrode group while a voltage is being applied. However, the polarity is inverted for the purpose of converting the applied voltage with the AC signal.

【0003】例えば、フレーム毎に極性反転する交流化
信号Mを与えることで交流駆動することを例に取ると、
最初のフレームの走査の時間に走査電極にV0を与え、
他方の信号電極には表示したいとき(選択画素)はV1
を与え、そして次のフレームにおいて、走査電極にV1
を与え、信号電極にはV0を与える。
For example, taking an example of AC driving by supplying an AC signal M whose polarity is inverted for each frame,
V0 is applied to the scan electrode at the time of the scan of the first frame,
When it is desired to display on the other signal electrode (selected pixel), V1
And in the next frame, V1
And V0 is applied to the signal electrode.

【0004】このような方法は、交流化信号の切替え時
に液晶に起因する大きな容量性負荷電流が流れ、消費電
力が多くなる。また最近の液晶表示装置は、640×4
80画素(VGA)から1024RGB×768画素
(カラーXGA)(信号側1ライン画素数3072)に
まで発展しようとしており、そのためにはデータ転送時
間その他の動作が高速化するので高速高耐圧集積回路が
必要になってきた。しかし集積回路にとって、高速化と
高耐圧化は相反する仕様であり、実現が困難となってい
た。
[0004] In such a method, a large capacitive load current due to the liquid crystal flows when the AC signal is switched, and the power consumption increases. A recent liquid crystal display device is 640 × 4
It is about to evolve from 80 pixels (VGA) to 1024 RGB × 768 pixels (color XGA) (the number of pixels per line on the signal side is 3072). For this purpose, the data transfer time and other operations become faster, so that a high-speed and high-voltage integrated circuit is required. It has become necessary. However, for an integrated circuit, high speed and high withstand voltage are conflicting specifications, making it difficult to realize.

【0005】[0005]

【発明が解決しようとする課題】ところが容量性の負荷
である液晶セルの表示面が大きくなると、特に表示パタ
ーンによって特定のバイアス電位に集中することが認め
られた。例えば交流化信号の反転によるバイアス回路の
負荷が大きくなり、特に走査のデューティ比を確保する
ため画面を複数の領域に分割する場合などには、お互い
の領域の表示パターンが干渉するかのような印加電圧変
動が観察された。また横縞模様を描かせた場合にその縞
パターンの延長に淡い陰が表示されており、この様子を
バイアス電位で観察すると明らかな波形なまりが観察さ
れた。
However, it has been found that when the display surface of the liquid crystal cell, which is a capacitive load, becomes large, a particular bias potential is concentrated depending on the display pattern. For example, the load on the bias circuit due to the inversion of the AC signal increases, especially when the screen is divided into a plurality of areas in order to secure the scanning duty ratio, as if the display patterns of the respective areas interfere with each other. Variation in applied voltage was observed. When a horizontal stripe pattern was drawn, a faint shade was displayed as an extension of the stripe pattern. When this state was observed with a bias potential, a clear waveform rounding was observed.

【0006】[0006]

【課題を解決するための手段】本発明は上述の点を考慮
して、互いに直交する電極群を有する液晶セルの走査回
路・信号回路に所定の値の電圧(バイアス電圧)を供給
する電源回路に係り、成されたものである。
SUMMARY OF THE INVENTION In view of the above, the present invention provides a power supply circuit for supplying a predetermined voltage (bias voltage) to a scanning circuit / signal circuit of a liquid crystal cell having mutually orthogonal electrode groups. It was made in connection with.

【0007】まず本発明は、複数の領域に分割され、分
割された領域毎に互いに直交する電極群を有する液晶セ
ルの領域毎に一方の電極群の電極を順次走査して走査電
圧として供給する走査回路と他方の電極群に画信号に応
じた信号電圧を与える信号回路とに所定の値の電圧を供
給する電源回路と、走査回路と信号回路に必要なタイミ
ング信号などを供給するデータ回路とを有し、そのデー
タ回路は液晶セルに印加する電圧を交流化させるさせる
交流化信号を出力し、走査回路は領域毎に異なる交流化
信号で印加電圧を交流化させるもので、いいかえると画
面を分割するに当って領域毎に交流化のタイミングを異
ならせるものである。
First, according to the present invention, the electrodes of one electrode group are sequentially scanned and supplied as a scanning voltage for each area of a liquid crystal cell which is divided into a plurality of areas and each of which has a group of electrodes orthogonal to each other. A power supply circuit for supplying a voltage of a predetermined value to the scanning circuit and a signal circuit for applying a signal voltage corresponding to an image signal to the other electrode group; a data circuit for supplying timing signals and the like necessary for the scanning circuit and the signal circuit; The data circuit outputs an AC signal for alternating the voltage applied to the liquid crystal cell, and the scanning circuit alternates the applied voltage with a different AC signal for each region. In the division, the timing of AC conversion differs for each area.

【0008】また本発明は、正負の選択電圧のいずれか
を選択して走査電圧として供給する走査回路と、正の選
択電圧と負の選択電圧の中間値近傍の信号電圧を画信号
に応じて選択的に与える信号回路と、それら走査回路と
信号回路に所定の値の電圧を供給する電源回路を有し、
その電源回路は、少なくとも信号電圧の出力に当って出
力段にプッシュプル回路を有する演算増幅回路を介して
バイアス電圧を供給するものである。
Further, according to the present invention, there is provided a scanning circuit for selecting one of the positive and negative selection voltages and supplying it as a scanning voltage, and a signal voltage near an intermediate value between the positive and negative selection voltages in accordance with the image signal. A signal circuit for selectively providing, a power supply circuit for supplying a voltage of a predetermined value to the scanning circuit and the signal circuit,
The power supply circuit supplies a bias voltage via an operational amplifier circuit having a push-pull circuit to an output stage at least for outputting a signal voltage.

【0009】又本発明は、正負の選択電圧のいずれかを
選択して走査電圧として供給し、走査電圧を供給しない
電極には正負の選択電圧の略中間値の中間電圧を供給す
る走査回路と、液晶セルの他方の電極群に走査回路の正
の選択電圧と負の選択電圧の中間値近傍の信号電圧を画
信号に応じて選択的に与える信号回路と、走査回路と信
号回路に所定の値の電圧を供給する電源回路を有し、電
源回路の、中間値電圧と信号電圧の出力間に互いにコン
デンサを接続したものである。
Also, the present invention provides a scanning circuit for selecting any of the positive and negative selection voltages and supplying the selected voltage as a scanning voltage, and supplying an intermediate voltage having a substantially intermediate value between the positive and negative selection voltages to an electrode to which no scanning voltage is supplied. A signal circuit for selectively applying a signal voltage near an intermediate value between a positive selection voltage and a negative selection voltage of the scanning circuit to the other electrode group of the liquid crystal cell in accordance with an image signal; It has a power supply circuit for supplying a voltage of a value, and a capacitor is connected between the intermediate value voltage and the output of the signal voltage of the power supply circuit.

【0010】[0010]

【発明の実施の形態】図1は本発明実施例の液晶表示装
置の回路図で、大表示容量の液晶セルを駆動するため、
走査信号を大きい正負の電圧とし、信号電圧を正の選択
電圧と負の選択電圧の中間値近傍の電圧とすることによ
り、走査側は大きな電圧を用いる代わりに低速で、信号
側は小さい電圧を用いて高速駆動ができるようにした液
晶表示装置を例にとって説明する。
FIG. 1 is a circuit diagram of a liquid crystal display device according to an embodiment of the present invention. In order to drive a liquid crystal cell having a large display capacity, FIG.
By setting the scanning signal to a large positive / negative voltage and setting the signal voltage to a voltage near an intermediate value between the positive selection voltage and the negative selection voltage, the scanning side uses a low voltage instead of using a large voltage, and the signal side uses a small voltage. A liquid crystal display device which can be driven at high speed by using the same will be described as an example.

【0011】1は、互いに直交する電極群を有する液晶
セルで、例えばスーパーツイストネマティック液晶表示
器などの電界効果型液晶が利用できる。これらの液晶セ
ル1の電極は、いわゆる単純マトリクスを構成し、画素
交点に能動素子を持たないものである。この液晶セル1
は複数の領域に分割され、分割された領域毎に互いに直
交する電極群を有する。具体的には、例えば1024R
GB×768画素(カラーXGA)の表示面であれば、
3072(信号側)×384(走査側)の上下2画面構
成の画素をもっており、中央で分離された3072本の
信号電極と、それらと交わる768本の走査電極を有す
る。
Reference numeral 1 denotes a liquid crystal cell having electrode groups orthogonal to each other. For example, a field effect liquid crystal such as a super twisted nematic liquid crystal display can be used. The electrodes of these liquid crystal cells 1 constitute a so-called simple matrix, and have no active elements at pixel intersections. This liquid crystal cell 1
Is divided into a plurality of regions, and each of the divided regions has an electrode group orthogonal to each other. Specifically, for example, 1024R
If it is a display surface of GB × 768 pixels (color XGA),
It has pixels of 3072 (signal side) × 384 (scanning side) upper and lower two-screen configuration, and has 3072 signal electrodes separated at the center and 768 scanning electrodes intersecting with them.

【0012】2は、その液晶セル1の領域毎に、一方の
電極群に走査電圧を与える走査回路で、上述の画面の例
で説明すると、384本の出力を持つ2組の回路からな
る。この走査回路2は、正負の電圧−VL、+VHと中
間電圧Vmのいずれかを選択して所定の電極に供給する
ものであり、このうち−VL、+VHは選択電圧であ
る。ここでは線順次駆動を例にとっているが、複数の電
極を同時に走査する場合でも本発明は適用でき、この場
合関数に応じて印加電圧が選択されるので、電圧の絶対
値と、同時に選択電圧を与える電極の本数が異なるだけ
である。
Reference numeral 2 denotes a scanning circuit for applying a scanning voltage to one of the electrode groups for each area of the liquid crystal cell 1, which comprises two sets of circuits having 384 outputs in the above-described screen example. The scanning circuit 2 selects one of the positive and negative voltages -VL and + VH and the intermediate voltage Vm and supplies it to a predetermined electrode. Among them, -VL and + VH are selection voltages. Here, line-sequential driving is taken as an example. However, the present invention can be applied to a case where a plurality of electrodes are simultaneously scanned. In this case, the applied voltage is selected according to a function. The only difference is the number of electrodes provided.

【0013】3は、液晶セル1の他方の電極群に画信号
に応じた電圧を与える信号回路で、特には走査回路2の
正の選択電圧+VHと負の選択電圧−VLの中間値近傍
の2種類の信号電圧−Vb、+Vbを画信号に応じて選
択的に電極に供給するものである。これら選択電圧+V
H、−VLや信号電圧±Vbの大きさは、電圧平均化法
に準じて求められるもので、例えばXGA画面2分割の
とき走査線数は384本であり、1/384デューティ
の駆動の場合最適バイアス値は1:20.6であり、中
間電圧VmとGNDレベルを一致させた時、選択電圧±
30ボルト、信号電圧±Vbは±1.53ボルトであ
る。尚この場合、走査電圧は一定の周期で正負いずれか
の選択電圧が選択されるもので、いずれが選択されるか
は交流化信号Mに従って選択され、信号回路3から出力
される信号電圧は画信号と極性反転に伴って2つの値の
うちどちらを選択されるのか変化する。また、複数行を
同時に走査する場合は電圧値が関数によって演算される
だけで、電圧平均化法の適用に変わりはない。
Reference numeral 3 denotes a signal circuit for applying a voltage corresponding to an image signal to the other electrode group of the liquid crystal cell 1. In particular, a signal circuit 3 is provided near the intermediate value between the positive selection voltage + VH and the negative selection voltage -VL of the scanning circuit 2. Two kinds of signal voltages -Vb and + Vb are selectively supplied to the electrodes according to the image signal. These selection voltages + V
The magnitudes of H, -VL and the signal voltage ± Vb are obtained according to the voltage averaging method. For example, when the XGA screen is divided into two, the number of scanning lines is 384, and when driving at 1/384 duty, The optimum bias value is 1: 20.6. When the intermediate voltage Vm and the GND level are matched, the selection voltage ±
30 volts and the signal voltage ± Vb is ± 1.53 volts. In this case, as the scanning voltage, one of the positive and negative selection voltages is selected at a constant cycle, which is selected according to the AC signal M, and the signal voltage output from the signal circuit 3 is the image voltage. Which of the two values is selected changes with the signal and the polarity inversion. When a plurality of rows are simultaneously scanned, only the voltage value is calculated by a function, and there is no change in the application of the voltage averaging method.

【0014】4は、走査回路2と信号回路3に所定の値
の電圧を供給する電源回路で、少なくとも正負の選択電
圧−VL、+VHと信号電圧−Vb、+Vbと中間電圧
Vmといったバイアス電圧を出力し、より好ましくは、
走査回路2や信号回路3、さらには、データ回路5やバ
ッファ45の駆動電圧等をも供給する。この電源回路4
は、例えばこの表示装置が組み込まれるパーソナルコン
ピュータから供給される電圧VEE−VDDを電圧発生
回路(DC/DCコンバータ)41に入力し、正負の電
圧−VL、+VHを生成させる。ここに正負というの
は、何かの絶対電位、たとえばこの表示装置が組み込ま
れるパーソナルコンピュータの電源に対して規定された
電位のことではなく、非走査時の走査電圧(中間電圧)
Vmに対する電位で表現している。選択電圧に基づいて
これを抵抗分割回路42で所定のバイアス値の電圧を
得、これをバッファ回路43を介することによって信号
電圧+Vb、−Vbと中間電圧Vmを得る。この結果信
号電圧の中心と選択電圧の中心がいずれも略中間電圧V
mとなるように設定するのが好ましい。走査回路2の駆
動電圧や信号回路3の駆動電圧は、この表示装置が組み
込まれるパーソナルコンピュータから供給される電圧V
EE−VDDを直接用いてもよいし、電圧発生回路(D
C/DCコンバータ)41で改めて生成してもよい。
Reference numeral 4 denotes a power supply circuit for supplying a voltage of a predetermined value to the scanning circuit 2 and the signal circuit 3, and supplies a bias voltage such as at least a positive / negative selection voltage -VL, + VH, a signal voltage -Vb, + Vb, and an intermediate voltage Vm. Output, more preferably,
The scanning circuit 2 and the signal circuit 3, as well as the driving voltage of the data circuit 5 and the buffer 45 are also supplied. This power supply circuit 4
Inputs, for example, a voltage VEE-VDD supplied from a personal computer in which the display device is incorporated to a voltage generation circuit (DC / DC converter) 41 to generate positive and negative voltages -VL and + VH. Here, “positive” or “negative” is not an absolute potential, for example, a potential specified for a power supply of a personal computer in which this display device is incorporated, but a scanning voltage (intermediate voltage) during non-scanning.
It is expressed by a potential with respect to Vm. Based on the selected voltage, a voltage having a predetermined bias value is obtained by a resistance dividing circuit 42, and the voltage is passed through a buffer circuit 43 to obtain signal voltages + Vb and -Vb and an intermediate voltage Vm. As a result, both the center of the signal voltage and the center of the selection voltage are substantially the intermediate voltage V
It is preferable to set m. The driving voltage of the scanning circuit 2 and the driving voltage of the signal circuit 3 are equal to the voltage V supplied from a personal computer in which the display device is incorporated.
EE-VDD may be used directly, or the voltage generation circuit (D
(C / DC converter) 41.

【0015】5は、走査回路2と信号回路3、電源回路
4に必要なタイミング信号などを供給するデータ回路
で、この表示装置が組み込まれるパーソナルコンピュー
タ等の信号を受け、この液晶表示装置に必要な信号を出
力する、バッファ、タイミングゲートなどからなる。こ
のデータ回路5は、パーソナルコンピュータなどから得
られる制御信号をバッファを介して、もしくは制御信号
を受けて自ら生成して、液晶セルに印加する電圧を交流
化させるさせる交流化信号Mを出力し、画信号を受信し
て、バッファを介して出力する。又このデータ回路5
は、必要に応じて、信号回路3に供給される各種タイミ
ング信号や画信号に応じた信号をバッファを介して伝送
する時必要に応じて駆動伝達レベルを供給電源レベルに
レベルシフトを行い、初期化信号を付加するなどの動作
を行う。複数行を同時に走査する場合はこのデータ回路
5で演算を行うことになる。またデータ回路5はメモリ
を管理してもよい。
Reference numeral 5 denotes a data circuit for supplying timing signals and the like necessary for the scanning circuit 2, the signal circuit 3, and the power supply circuit 4. The data circuit 5 receives signals from a personal computer or the like in which the display device is incorporated, and It consists of a buffer, a timing gate, etc., which output various signals. The data circuit 5 generates a control signal obtained from a personal computer or the like via a buffer or by receiving the control signal and outputs an AC signal M for causing a voltage applied to the liquid crystal cell to be AC. An image signal is received and output via a buffer. This data circuit 5
When necessary, when a signal corresponding to various timing signals and image signals supplied to the signal circuit 3 is transmitted via a buffer, the drive transmission level is level-shifted to a supply power level as necessary, An operation such as adding a conversion signal is performed. When scanning a plurality of rows at the same time, the data circuit 5 performs an operation. The data circuit 5 may manage a memory.

【0016】いろいろな単純マトリクス駆動法を説明に
加えているが、走査電圧に正負の大きな電圧を用い、信
号電圧を中間値近傍の小さな電圧値にすることで、走査
回路2の集積回路の出力段は従来の略倍の耐電圧を必要
とするが、走査線数に応じた低速処理であり、出力段で
3つの電位のうち一つを選択するので交流化信号の切り
替え時の大きな電流は発生せず、また従来見られがちだ
ったクロストーク発生の基になる波形崩れもきわめて生
じ難い。一方信号回路3は上述の例でわずか5ボルト以
内という低電圧しか扱わず、高速駆動に適しているばか
りか、集積回路の面積も小さくできるので、ミリメート
ル単位で液晶周辺の幅(通称額縁)を短くするのに凌ぎ
を削っていることに対しても幅の狭い駆動素子が利用・
配置できるので好ましい。
Although various simple matrix driving methods have been added to the description, the output of the integrated circuit of the scanning circuit 2 is obtained by using a large positive and negative scanning voltage and setting the signal voltage to a small voltage value near an intermediate value. The stage requires a withstand voltage approximately double that of the conventional one, but is a low-speed process according to the number of scanning lines. Since one of three potentials is selected at the output stage, a large current when switching the AC signal is required. It does not occur, and it is extremely unlikely that the waveform collapse, which is the cause of the occurrence of crosstalk, which has often been seen in the past, will occur. On the other hand, the signal circuit 3 handles only a low voltage of less than 5 volts in the above-described example, and is suitable not only for high-speed driving but also for reducing the area of the integrated circuit. Drive elements with a narrow width are used even for cutting down on shortening
It is preferable because it can be arranged.

【0017】このような構成において、まず駆動領域毎
に交流化のタイミングを異ならせている。具体的には走
査回路2の間にインバータ回路を有していて、走査回路
2信号回路3の組毎に反転した交流化信号を受けてい
る。これにより、走査回路は領域毎に異なる交流化信号
で印加電圧を交流化させることとなる。これは互いの領
域の画信号が交流化の切り替え時点で干渉してバイアス
電位を変動させているものと推測されるとの検討結果に
基ずくものである。図2は横縞模様を表示しているとき
のクロックと走査回路出力と信号回路出力をそれぞれ一
つずつモニターしたものである。図2aは上下画面領域
とも同じ交流化信号を用いたとき波形図であり、走査回
路出力が反転しているがその切り替え時点に波形なまり
のほかに鋭いヒゲ状の電位変化が現れており、直線であ
るべき信号回路出力がその電位変化に応じて大きくキッ
クされている。画面を観察した時には縞模様のそばに淡
い陰が比較的明瞭に観察される。一方、図2bは上下画
面領域で反転した交流化信号を用いたとき波形図であ
り、走査回路出力の反転時は波形なまりがみられるもの
の鋭いヒゲ状の電位変化が消えており、直線であるべき
信号回路出力のキックは小さくなっている。画面を観察
した時には縞模様のそばに淡い陰はほとんど目立たな
い。
In such a configuration, first, the timing of AC conversion is made different for each drive area. Specifically, an inverter circuit is provided between the scanning circuits 2, and receives an inverted AC signal for each set of the scanning circuit 2 signal circuits 3. As a result, the scanning circuit alternates the applied voltage with an alternating signal different for each region. This is based on the result of the study that it is presumed that the image signals in the respective regions interfere with each other at the time of switching of the alternating current and fluctuate the bias potential. FIG. 2 is a diagram in which a clock, a scanning circuit output, and a signal circuit output are monitored one by one when a horizontal stripe pattern is displayed. FIG. 2A is a waveform diagram when the same alternating signal is used for both the upper and lower screen areas. The output of the scanning circuit is inverted, but at the time of the switching, a sharp beard-like potential change appears in addition to the waveform rounding. The signal circuit output, which should be, is greatly kicked in accordance with the potential change. When observing the screen, pale shades are relatively clearly observed near the stripes. On the other hand, FIG. 2B is a waveform diagram when an alternating signal inverted in the upper and lower screen areas is used. When the output of the scanning circuit is inverted, although the waveform is rounded, a sharp mustache-like potential change disappears and is a straight line. The kick at the output of the power signal circuit is small. When observing the screen, the pale shade near the stripes is almost inconspicuous.

【0018】ついで上述した電源回路4のバッファ回路
43においては、少なくとも信号電圧の出力に当って、
出力段にプッシュプル回路を有する演算増幅回路を介し
てバイアスを供給しており、さらに中間値電圧と信号電
圧の出力間に互いにコンデンサを接続している。これを
更に詳細に説明すると、淡い表示が観察される対策を詳
細に検討するうち、例えば横縞模様において、その縞の
延長が淡く着色して観察される場合と、淡く白抜きにな
って観察される場合の両方に共通して波形なまりがある
ことが分かった。バイアス電圧の出力に当っては演算増
幅器を介することによって十分な電力供給能力を付与し
ているつもりであったが、その過渡特性や瞬間応答特性
については十分に解明されていない。
Next, in the buffer circuit 43 of the power supply circuit 4 described above, at least the output of the signal voltage
A bias is supplied to the output stage via an operational amplifier circuit having a push-pull circuit, and capacitors are connected to each other between the output of the intermediate voltage and the output of the signal voltage. To explain this in more detail, while considering measures for observing pale display in detail, for example, in a horizontal stripe pattern, the extension of the stripe is observed to be lightly colored, In both cases, it was found that there was a waveform rounding in both cases. The bias voltage output was intended to provide sufficient power supply capability through an operational amplifier, but its transient characteristics and instantaneous response characteristics have not been sufficiently elucidated.

【0019】そこで図3、4に示すようないくつかのパ
ワーブースト回路を用いて波形なまりの検討をし、プッ
シュプル回路を用いることで淡い陰を目立たなくするこ
とができた。これを図5を参照して説明すると、例えば
横縞模様を表示している時、図5aに示すように、矩形
であるはずの出力がなだらかな変化となって略三角形状
の面積分の実効値が欠落することになる。この大きさ
は、例えば先の表示装置では、信号側(+Vb)で−
0.6〜−0.8ボルト、走査側(Vm)で+0.3〜
+0.5ボルトもの変化になる。そこで図3のようなプ
ッシュプルか色を設けて抵抗値を種々変化させると、特
に信号側の電圧変化が1/4から1/8程度に減少し、
走査側の電圧変化も減少傾向にあった。更に図4のよう
に電源から直接電力供給できるようなプッシュプル回路
とした場合には、信号側(+Vb)で−0.00〜−
0.03ボルト、走査側(Vm)で−0.04〜+0.
01ボルトと変化量が著しく低下し、表示を観察した時
も淡い色は観察されなかった。
Therefore, waveform rounding was examined by using several power boost circuits as shown in FIGS. 3 and 4, and by using a push-pull circuit, light shades could be made inconspicuous. This will be described with reference to FIG. 5. For example, when a horizontal stripe pattern is displayed, as shown in FIG. 5A, the output supposed to be rectangular changes gradually and the effective value of the area of a substantially triangular shape is obtained. Will be missing. This magnitude is, for example, −− on the signal side (+ Vb) in the above display device.
0.6 to -0.8 volt, +0.3 to scanning side (Vm)
+0.5 volt change. Therefore, when the resistance value is variously changed by providing a push-pull or a color as shown in FIG. 3, the voltage change on the signal side is particularly reduced from 1 / to 1 /,
The voltage change on the scanning side also tended to decrease. Further, in the case of a push-pull circuit in which power can be supplied directly from the power supply as shown in FIG. 4, -0.00 to-on the signal side (+ Vb).
0.03 volts, -0.04 to +0.05 on the scanning side (Vm).
The change amount was remarkably reduced to 01 volt, and no pale color was observed when the display was observed.

【0020】また電源回路4のバッファ回路43におい
ては、通常、図6aの左側に示すようにグランドと各バ
イアス出力端子間にコンデンサを接続している。図6a
の右側は液晶セルにおいて画素の選択が行われている様
子を示し、図6bはその等価回路である。この例のよう
に、走査信号を大きい正負の電圧とし、信号電圧を正の
選択電圧と負の選択電圧の中間値近傍の電圧とすること
により、交流化信号の切り替え時の大きな電流は発生せ
ず、また従来見られがちだったクロストーク発生の基に
なる波形崩れが生じ難い等の長所を持つが、このような
コンデンサの接続は単に電源回路側に対する見方であっ
て、負荷側に対しては容量性負荷の容量を増大するもの
と思われる。そこで、図7aに示すように中間値電圧と
信号電圧の出力間に互いにコンデンサを接続している。
なお図7も図6と同様に等価回路も図示している。この
ような接続により、波形なまりが改善された。
In the buffer circuit 43 of the power supply circuit 4, a capacitor is usually connected between the ground and each bias output terminal as shown on the left side of FIG. 6A. FIG.
The right side of FIG. 6 shows a state in which a pixel is selected in the liquid crystal cell, and FIG. 6B is an equivalent circuit thereof. As in this example, by setting the scanning signal to a large positive / negative voltage and setting the signal voltage to a voltage near an intermediate value between the positive selection voltage and the negative selection voltage, a large current is generated when the AC signal is switched. It also has the advantage that the waveform collapse that is the basis of the occurrence of crosstalk, which is often seen in the past, is unlikely to occur.However, such connection of the capacitor is merely a perspective on the power supply circuit side, Seems to increase the capacity of the capacitive load. Therefore, as shown in FIG. 7A, capacitors are connected to each other between the output of the intermediate voltage and the output of the signal voltage.
FIG. 7 also shows an equivalent circuit as in FIG. With such a connection, waveform rounding was improved.

【0021】このようにそれぞれ単独でも波形なまりは
減少したが、出力段にプッシュプル回路を有する演算増
幅回路を用い中間値電圧と信号電圧の出力間に互いにコ
ンデンサを接続することで、市松模様、横縞、カラーバ
ーに対する淡い表示は目視でほとんど観察されないよう
になった。
As described above, although the waveform rounding is reduced even when each of them is used alone, the use of an operational amplifier circuit having a push-pull circuit at the output stage and the connection of capacitors between the output of the intermediate value voltage and the output of the signal voltage allows a checkerboard pattern to be formed. Light display on horizontal stripes and color bars was hardly visually observed.

【0022】[0022]

【発明の効果】本発明は上述のように、バイアス電圧に
対する負担を軽減しあるいは対応力を強化したので、液
晶セルの表示面が大きくなっても表示品位を高く維持す
ることができた。
As described above, according to the present invention, the burden on the bias voltage is reduced or the responsiveness is enhanced, so that the display quality can be maintained high even when the display surface of the liquid crystal cell becomes large.

【0023】また、走査回路は正負の選択電圧を走査電
圧として用い、画信号に応じて選択電圧の中間値近傍の
2種類の信号電圧を用いる場合などの波形歪みも軽減す
ることができ、表示の延長上の淡い陰も観察者に不快感
を与えないようにすることができた。
Further, the scanning circuit uses positive and negative selection voltages as scanning voltages, and can reduce waveform distortion when two kinds of signal voltages near an intermediate value of the selection voltages are used in accordance with an image signal. It was possible to prevent the light shade on the elongation from causing discomfort to the observer.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明実施例の液晶表示装置のブロック図であ
る。
FIG. 1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention.

【図2】従来の駆動回路の波形図aと、本発明実施例に
おける駆動回路の波形図bである。
FIG. 2 is a waveform diagram a of a conventional driving circuit and a waveform diagram b of a driving circuit in an embodiment of the present invention.

【図3】本発明実施例に係るバッファ回路の回路図であ
る。
FIG. 3 is a circuit diagram of a buffer circuit according to an embodiment of the present invention.

【図4】本発明実施例に係るバッファ回路の回路図であ
る。
FIG. 4 is a circuit diagram of a buffer circuit according to an embodiment of the present invention.

【図5】従来の駆動回路の波形図aと、本発明実施例に
おける駆動回路の波形図bである。
FIG. 5 is a waveform diagram a of the conventional driving circuit and a waveform diagram b of the driving circuit in the embodiment of the present invention.

【図6】従来のバッファ回路のコンデンサ接続図aとそ
の等価回路図bである。
FIG. 6 shows a capacitor connection diagram a of a conventional buffer circuit and an equivalent circuit diagram b thereof.

【図7】本発明実施例のバッファ回路のコンデンサ接続
図aと、その等価回路図bである。
FIG. 7 shows a capacitor connection diagram a of the buffer circuit of the embodiment of the present invention and an equivalent circuit diagram b thereof.

【符号の説明】[Explanation of symbols]

1 液晶セル 2 走査回路 3 信号回路 4 電源回路 5 データ回路 Reference Signs List 1 liquid crystal cell 2 scanning circuit 3 signal circuit 4 power supply circuit 5 data circuit

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 複数の領域に分割され、分割された領域
毎に互いに直交する電極群を有する液晶セルと、該液晶
セルの領域毎に一方の電極群の電極を順次走査して走査
電圧として供給する走査回路と、他方の電極群に画信号
に応じた信号電圧を与える信号回路と、前記走査回路と
前記信号回路に所定の値の電圧を供給する電源回路と、
前記走査回路と前記信号回路に必要なタイミング信号な
どを供給するデータ回路とを有した液晶表示装置におい
て、前記データ回路は、液晶セルに印加する電圧を交流
化させるさせる交流化信号を出力し、前記走査回路は前
記領域毎に異なる交流化信号で印加電圧を交流化させる
ことを特徴とする液晶表示装置。
1. A liquid crystal cell which is divided into a plurality of regions and has electrode groups orthogonal to each other in each of the divided regions, and sequentially scans electrodes of one of the electrode groups for each region of the liquid crystal cell to generate a scanning voltage. A scanning circuit for supplying, a signal circuit for applying a signal voltage corresponding to an image signal to the other electrode group, a power supply circuit for supplying a voltage of a predetermined value to the scanning circuit and the signal circuit,
In a liquid crystal display device having a data circuit that supplies a timing signal and the like necessary for the scanning circuit and the signal circuit, the data circuit outputs an alternating signal that causes an alternating voltage to be applied to a liquid crystal cell, 2. The liquid crystal display device according to claim 1, wherein the scanning circuit converts an applied voltage into an alternating voltage using a different alternating signal for each of the regions.
【請求項2】 互いに直交する電極群を有する液晶セル
と、該液晶セルの一方の電極群の所定の電極に正負の選
択電圧のいずれかを選択して走査電圧として供給する走
査回路と、前記液晶セルの他方の電極群に前記走査回路
の正の選択電圧と負の選択電圧の中間値近傍の信号電圧
を画信号に応じて選択的に与える信号回路と、前記走査
回路と前記信号回路に所定の値の電圧を供給する電源回
路とを具備した液晶表示装置において、前記電源回路
は、少なくとも信号電圧の出力に当って、出力段にプッ
シュプル回路を有する演算増幅回路を介してバイアスを
供給することを特徴とする液晶表示装置。
2. A liquid crystal cell having electrode groups orthogonal to each other, a scanning circuit for selecting one of positive and negative selection voltages to a predetermined electrode of one electrode group of the liquid crystal cell and supplying the selected voltage as a scanning voltage, A signal circuit that selectively supplies a signal voltage near an intermediate value between a positive selection voltage and a negative selection voltage of the scanning circuit to the other electrode group of the liquid crystal cell in accordance with an image signal; and the scanning circuit and the signal circuit. A power supply circuit for supplying a voltage of a predetermined value, wherein the power supply circuit supplies a bias via an operational amplifier circuit having a push-pull circuit at an output stage at least for outputting a signal voltage. A liquid crystal display device comprising:
【請求項3】 互いに直交する電極群を有する液晶セル
と、該液晶セルの一方の電極群の所定の電極に正負の選
択電圧のいずれかを選択して走査電圧として供給し、走
査電圧を供給しない電極には前記正負の選択電圧の略中
間値の中間電圧を供給する走査回路と、前記液晶セルの
他方の電極群に前記走査回路の正の選択電圧と負の選択
電圧の中間値近傍の信号電圧を画信号に応じて選択的に
与える信号回路と、前記走査回路と前記信号回路に所定
の値の電圧を供給する電源回路とを具備した液晶表示装
置において、前記電源回路の、中間値電圧と信号電圧の
出力間に互いにコンデンサを接続したことを特徴とする
液晶表示装置。
3. A liquid crystal cell having an electrode group orthogonal to each other, and a positive or negative selection voltage is selected and supplied as a scanning voltage to a predetermined electrode of one of the electrode groups of the liquid crystal cell, and the scanning voltage is supplied. A scanning circuit that supplies an intermediate voltage having a substantially intermediate value between the positive and negative selection voltages to the non-electrodes, and a scanning circuit that supplies the other electrode group of the liquid crystal cell with a voltage near the intermediate value between the positive selection voltage and the negative selection voltage of the scanning circuit. A liquid crystal display device comprising: a signal circuit for selectively applying a signal voltage according to an image signal; and a power supply circuit for supplying a voltage of a predetermined value to the scanning circuit and the signal circuit. A liquid crystal display device comprising a capacitor connected between a voltage and a signal voltage output.
JP25962696A 1996-09-30 1996-09-30 Liquid crystal display Expired - Fee Related JP3475025B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25962696A JP3475025B2 (en) 1996-09-30 1996-09-30 Liquid crystal display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25962696A JP3475025B2 (en) 1996-09-30 1996-09-30 Liquid crystal display

Publications (2)

Publication Number Publication Date
JPH10104574A true JPH10104574A (en) 1998-04-24
JP3475025B2 JP3475025B2 (en) 2003-12-08

Family

ID=17336698

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25962696A Expired - Fee Related JP3475025B2 (en) 1996-09-30 1996-09-30 Liquid crystal display

Country Status (1)

Country Link
JP (1) JP3475025B2 (en)

Also Published As

Publication number Publication date
JP3475025B2 (en) 2003-12-08

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