JPH0997829A - Wafer carrier and manufacturing device for semiconductor element provided with it - Google Patents
Wafer carrier and manufacturing device for semiconductor element provided with itInfo
- Publication number
- JPH0997829A JPH0997829A JP15721696A JP15721696A JPH0997829A JP H0997829 A JPH0997829 A JP H0997829A JP 15721696 A JP15721696 A JP 15721696A JP 15721696 A JP15721696 A JP 15721696A JP H0997829 A JPH0997829 A JP H0997829A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- wafer carrier
- control means
- temperature control
- temperature
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B49/00—Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation
- B24B49/14—Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation taking regard of the temperature during grinding
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明はウェーハキャリヤ及
びこれを具備した半導体素子の製造装置に係り、特に化
学−機械的ポリシング（Chemical Mechanical Polishin
g ）工程でウェーハを固定させるために使用されるウェ
ーハキャリヤ及びこれを具備した製造装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wafer carrier and a semiconductor device manufacturing apparatus equipped with the same, and more particularly to a chemical-mechanical polishing apparatus.
g) A wafer carrier used for fixing a wafer in the step and a manufacturing apparatus equipped with the same.
【０００２】[0002]
【従来の技術】半導体素子の集積度が増加することによ
り素子の臨界寸法（critical demension）が減り、写真
蝕刻工程での解像力が増加すると共に焦点深度（ＤＯ
Ｆ）も減少する。従って、写真蝕刻工程時マスクパター
ンを適用しうる表面の段差がＤＯＦ範囲を外れると範囲
外の表面は焦点が合わなくて構造物のアウトラインを限
定しにくくなる。よって、アウトラインの明確な構造物
を得ようとすればウェーハ表面の段差を減少させる平坦
化工程が必要である。2. Description of the Related Art As the degree of integration of semiconductor devices increases, the critical dimension of the devices decreases, the resolution in the photolithography process increases, and the depth of focus (DO) increases.
F) also decreases. Therefore, if the step of the surface to which the mask pattern can be applied during the photoetching process is out of the DOF range, the surface outside the range is out of focus and it is difficult to limit the outline of the structure. Therefore, in order to obtain a structure having a clear outline, it is necessary to perform a flattening process for reducing the step difference on the wafer surface.
【０００３】平坦化工程の中で多数のウェーハを同時に
効率よく平坦化させうる方法として化学機械的ポリシン
グ（以下、ＣＭＰと称する）工程がある。A chemical mechanical polishing (hereinafter referred to as CMP) process is a method of efficiently planarizing a large number of wafers in the planarization process.
【０００４】図１はＣＭＰ工程を説明するための従来の
装置の断面図である。FIG. 1 is a sectional view of a conventional apparatus for explaining a CMP process.
【０００５】図１を参照すれば、図面符号１はウェーハ
が装着されるプラテンを、３はポリシングパッドを、５
はウェーハを、７は前記ウェーハを固定させるキャリヤ
を各々示す。Referring to FIG. 1, reference numeral 1 is a platen on which a wafer is mounted, 3 is a polishing pad, and 5 is a polishing pad.
Is a wafer, and 7 is a carrier for fixing the wafer.
【０００６】前記ウェーハ５はポリシングされる面が下
側、即ちポリシングパッド３と接するように装着する。The wafer 5 is mounted so that the surface to be polished is on the lower side, that is, in contact with the polishing pad 3.
【０００７】ＣＭＰ工程は、前記プラテン１を回転さ
せ、ウェーハ５とポリシングパッド３の間にスラリーを
投入することにより前記ウェーハ５を研磨することであ
る。前記スラリーは機械的ポリシングの役割をする研磨
剤、例えばアルミナ或はシリカに化学的ポリシングの役
割をする化学薬剤や純水を混合して作られたものであっ
て、この際前記純水には酸性度（ｐＨ）の調節のため、
例えば水酸化カリウム（ＫＯＨ）、或は水酸化ナトリウ
ム（ＮａＯＨ）を添加することになる。The CMP process is to polish the wafer 5 by rotating the platen 1 and introducing a slurry between the wafer 5 and the polishing pad 3. The slurry is made by mixing a polishing agent such as mechanical polishing, such as alumina or silica, with a chemical agent serving as a chemical polishing and pure water. To adjust the acidity (pH),
For example, potassium hydroxide (KOH) or sodium hydroxide (NaOH) will be added.
【０００８】前記ＣＭＰ工程の研磨率、即ち除去率はス
ラリーの酸性度、前記プラテン１の回転速度、ポリシン
グ表面の温度及び複数のパラメーター等の影響を受ける
が，この中でも特にポリシング表面の温度は化学的研磨
率の増減に大きな影響を与える。The polishing rate, that is, the removal rate in the CMP process is influenced by the acidity of the slurry, the rotation speed of the platen 1, the temperature of the polishing surface, and a plurality of parameters. Has a great influence on the increase or decrease of the polishing rate.
【０００９】従って、従来には化学的研磨率を変化させ
るために前記プラテン１を一定温度で加熱及び冷却する
方法を使用した。Therefore, conventionally, a method of heating and cooling the platen 1 at a constant temperature is used to change the chemical polishing rate.
【００１０】一方、ウェーハ内の特定部位に構造物が存
在して段差が形成されている場合、ＣＭＰ工程による平
坦化効率を高めるためにはウェーハの領域別に前記化学
的研磨率を変化させる必要がある。ところが、従来の装
置を使用すれば、プラテンを直接加熱または冷却するの
で段差を有しているウェーハに対して除去比率を部分的
に調節できない問題点がある。On the other hand, when a structure exists at a specific portion in the wafer and a step is formed, it is necessary to change the chemical polishing rate for each wafer region in order to improve the planarization efficiency by the CMP process. is there. However, if the conventional apparatus is used, the platen is directly heated or cooled, so that there is a problem that the removal ratio cannot be partially adjusted for a wafer having a step.
【００１１】[0011]
【発明が解決しようとする課題】従って、本発明の目的
は前記のような従来技術の問題点を解決するため、ウェ
ーハキャリヤの表面に加熱手段と温度制御手段を配設す
ることによりウェーハ特定部分の温度を調節しうるウェ
ーハキャリヤを提供することにある。Therefore, in order to solve the above-mentioned problems of the prior art, the object of the present invention is to provide a heating means and a temperature control means on the surface of a wafer carrier so that a specific portion of a wafer can be obtained. The purpose of the present invention is to provide a wafer carrier whose temperature can be adjusted.
【００１２】本発明の他の目的は前記ウェーハキャリヤ
を具備した半導体素子の製造装置を提供することにあ
る。Another object of the present invention is to provide an apparatus for manufacturing a semiconductor device having the wafer carrier.
【００１３】[0013]
【発明を解決するための手段】前記目的を達成するため
の本発明は、ウェーハをホールディングするに使用され
る半導体素子製造用ウェーハキャリヤにおいて、前記ウ
ェーハキャリヤはその表面に前記ウェーハの温度を局部
的に調節するための温度制御手段を具備することを特徴
とするウェーハキャリヤである。SUMMARY OF THE INVENTION To achieve the above object, the present invention provides a wafer carrier for manufacturing a semiconductor device, which is used for holding a wafer, wherein the wafer carrier locally has a temperature of the wafer on its surface. The wafer carrier is provided with a temperature control means for adjusting the temperature.
【００１４】前記他の目的を達成するための本発明は、
化学−機械的研磨のためにウェーハが装着されるプラテ
ンと、前記プラテン上に位置し、前記ウェーハをホール
ディングするウェーハキャリヤを具備する半導体素子の
製造装置において、前記ウェーハキャリヤはその表面に
前記ウェーハの温度を局部的に調節するための温度制御
手段を具備することを特徴とする半導体素子の製造装置
である。The present invention for attaining the above-mentioned other object comprises:
In a semiconductor device manufacturing apparatus comprising a platen on which a wafer is mounted for chemical-mechanical polishing and a wafer carrier that is located on the platen and holds the wafer, the wafer carrier has a wafer carrier on its surface. An apparatus for manufacturing a semiconductor device, comprising a temperature control means for locally adjusting the temperature.
【００１５】[0015]
【発明の実施の形態】以下、添付した図２乃至図４に基
づき本発明の一実施の形態を説明する。BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below with reference to the attached FIGS.
【００１６】図２は本発明によるウェーハキャリヤを示
した平面図である。FIG. 2 is a plan view showing a wafer carrier according to the present invention.
【００１７】前記ウェーハキャリヤ１００は例えば真空
チャック（図示せず）等を具備してウェーハをホールデ
ィングする役割をするものであって、ステンレススチー
ルよりなる。前記図２では１つのウェーハキャリヤのみ
を示したが実際のＣＭＰ工程を行う装置では前記ウェー
ハキャリヤが多数個設置され作動される。The wafer carrier 100 is equipped with a vacuum chuck (not shown) or the like and serves to hold a wafer, and is made of stainless steel. Although only one wafer carrier is shown in FIG. 2, a large number of the wafer carriers are installed and operated in an apparatus for performing an actual CMP process.
【００１８】図２を参照すれば、前記ウェーハキャリヤ
１００の背面、即ちウェーハと接触されない面の特定部
位、例えば上部Ｔ、中心部Ｃ、底部Ｂ、左側部Ｌまたは
右側部Ｒに必要に応じて温度制御手段、例えば加熱装置
（図示せず）或は冷却装置（図示せず）等を配設する
（ウェーハキャリヤ全体面にも配設しうる）。前記加熱
装置は加熱コイルや、ランプ及びレーザー等で構成で
き、前記冷却装置は従来の冷却液を使用する冷却法、例
えば冷却水が通れる銅管を利用した冷却方法を使用して
構成しうる。前記加熱装置及び冷却装置は各々コントロ
ールパンネルを通した調節が可能であり、よって、加熱
装置及び冷却装置の温度変化比率が調節されうる。Referring to FIG. 2, a rear surface of the wafer carrier 100, that is, a specific portion of a surface not in contact with the wafer, for example, a top portion T, a center portion C, a bottom portion B, a left side portion L or a right side portion R may be used as needed. Temperature control means, such as a heating device (not shown) or a cooling device (not shown), is provided (which may be provided on the entire surface of the wafer carrier). The heating device may include a heating coil, a lamp, a laser, and the like, and the cooling device may be configured using a conventional cooling method using a cooling liquid, for example, a cooling method using a copper pipe through which cooling water can pass. Each of the heating device and the cooling device can be adjusted through a control panel, so that the temperature change ratio of the heating device and the cooling device can be adjusted.
【００１９】また、前記上部、中心部、底部、左側部、
右側部の温度をそれぞれ測れる装置をウェーハに配設
し、温度測定器としては熱電センサー或は赤外線センサ
ー等を使用しうる。The upper part, the central part, the bottom part, the left part,
A device for measuring the temperature of each of the right side portions may be arranged on the wafer, and a thermoelectric sensor or an infrared sensor may be used as the temperature measuring device.
【００２０】図３は本発明によるウェーハキャリヤを使
用してウェーハをポリシングする時ウェーハの回転を防
止するパッドを示した図面である。FIG. 3 is a view showing a pad for preventing the rotation of the wafer when polishing the wafer using the wafer carrier according to the present invention.
【００２１】図３を参照すれば、ウェーハのポリシング
中ウェーハが回転することを防ぐため、ウェーハフラッ
トゾーン（オリエンテーションフラットとも称する）１
０に対応するウェーハキャリヤに支持リング（図示せ
ず）と同じ厚さの堅固なパッド２０を示されたように付
着する。この半月形のパッド２０はポリシング中ウェー
ハの上部Ｔ、中心部Ｃ、底部Ｂ、左側部Ｌ、右側部Ｒと
加熱装置及び冷却装置との相対的な位置を常に一定に保
つ役割をする。Referring to FIG. 3, a wafer flat zone (also referred to as orientation flat) 1 to prevent the wafer from rotating during polishing of the wafer.
A solid pad 20 of the same thickness as the support ring (not shown) is attached to the wafer carrier corresponding to 0 as shown. The half-moon shaped pad 20 serves to keep the relative positions of the upper part T, the center part C, the bottom part B, the left part L, the right part R and the heating device and the cooling device of the wafer constant during polishing.
【００２２】図４は加熱装置３０の実例を示した図面で
ある。FIG. 4 is a view showing an example of the heating device 30.
【００２３】図４を参照すれば、ウェーハポリシング時
にこのウェーハが回転することになり、例えば前記加熱
装置としてコイルヒータを用いる場合電線が捩じれる恐
れがあるが、このような問題点を防ぐため示されたよう
に円形よりなるレール式電気コンタクト（各ヒータ当り
２つのリングが必要である）を形成しうる。Referring to FIG. 4, when the wafer is polished, the wafer is rotated. For example, when a coil heater is used as the heating device, the wire may be twisted. Rail-shaped electrical contacts consisting of circles as required (two rings required for each heater) may be formed.
【００２４】[0024]
【発明の効果】前記のように本発明はウェーハキャリヤ
に温度制御手段を配設してウェーハの希望する部分の温
度を調節しうるようにしたので、ウェーハ特定部分の温
度を上げたり下げたりすることによりその部分の化学的
研磨率を増加または減少させる。従って、ウェーハ上に
形成された構造物による段差に因してウェーハの特定部
分が多く或は少なくポリシングされることが防げ、安定
した工程と適切な温度調節により平坦性を向上させう
る。As described above, according to the present invention, the temperature control means is provided on the wafer carrier so that the temperature of the desired portion of the wafer can be adjusted, so that the temperature of the specific portion of the wafer can be raised or lowered. This increases or decreases the chemical polishing rate of that portion. Therefore, it is possible to prevent the specific portion of the wafer from being polished in a large amount or in a small amount due to the step due to the structure formed on the wafer, and it is possible to improve the flatness by a stable process and appropriate temperature control.
【００２５】また本発明は、半導体素子製造装置におい
て、ウェーハをホールディングするウェーハキャリヤに
温度制御手段を有することとしたので、ウェーハ特定部
分の温度を上げたり下げたりすることによりその部分の
化学的研磨率を増加または減少させる。従って、ウェー
ハ上に形成された構造物による段差に因してウェーハの
特定部分が多く或は少なくポリシングされることが防
げ、安定した工程と適切な温度調節により平坦性を向上
させうる。Further, according to the present invention, in the semiconductor device manufacturing apparatus, the wafer carrier for holding the wafer has the temperature control means. Increase or decrease the rate. Therefore, it is possible to prevent the specific portion of the wafer from being polished in a large amount or in a small amount due to the step due to the structure formed on the wafer, and it is possible to improve the flatness by a stable process and appropriate temperature control.
【００２６】本発明は前記実施例に限定されなく、本発
明の技術的思想内で当分野の通常の知識を有する者によ
り多くの変形が可能であることは明白である。It is obvious that the present invention is not limited to the above-described embodiment, and that many modifications can be made by those skilled in the art within the technical idea of the present invention.
【図１】 ＣＭＰ工程を説明するための従来の装置を概
略的に示した図面である。FIG. 1 is a view schematically showing a conventional apparatus for explaining a CMP process.
【図２】 温度制御手段を配設した本発明によるウェー
ハキャリヤを示した図面である。FIG. 2 is a view showing a wafer carrier according to the present invention provided with temperature control means.
【図３】 本発明によるウェーハキャリヤを使用してウ
ェーハをポリシングする時ウェーハの回転を防ぐパッド
を示した図面である。FIG. 3 is a view showing a pad for preventing rotation of a wafer when polishing the wafer using the wafer carrier according to the present invention.
【図４】 温度制御手段の実例を示した図面である。FIG. 4 is a view showing an example of temperature control means.
１０…ウェーハフラットゾーン、 ２０…パッド２０、 ３０…加熱装置、 １００…ウェーハキャリヤ。 10 ... Wafer flat zone, 20 ... Pad 20, 30 ... Heating device, 100 ... Wafer carrier.
Claims (9)
れる半導体素子製造用ウェーハキャリヤにおいて、 前記ウェーハキャリヤはその表面に前記ウェーハの温度
を局部的に調節するための温度制御手段を具備すること
を特徴とするウェーハキャリヤ。1. A wafer carrier for manufacturing a semiconductor device used for holding a wafer, wherein the wafer carrier comprises temperature control means for locally adjusting the temperature of the wafer on its surface. Wafer carrier.
ヤ表面の所定部位に付着されたことを特徴とする請求項
１に記載のウェーハキャリヤ。2. The wafer carrier according to claim 1, wherein the temperature control means is attached to a predetermined portion of the surface of the wafer carrier.
いウェーハキャリヤの表面に設けられたことを特徴とす
る請求項１に記載のウェーハキャリヤ。3. The wafer carrier according to claim 1, wherein the temperature control means is provided on a surface of the wafer carrier which is not in contact with the wafer.
手段として加熱コイル、ランプ、及びレーザーの中選択
された何れか１つを使用することを特徴とする請求項１
に記載のウェーハキャリヤ。4. A heating coil, a lamp, or a laser selected from the group consisting of heating coils is used as a temperature control means for heating the wafer.
The wafer carrier according to.
手段の温度が測れる温度測定器をさらに具備することを
特徴とする請求項１に記載のウェーハキャリヤ。5. The wafer carrier according to claim 1, further comprising a temperature measuring device for measuring a temperature of a temperature control means on a surface of the wafer carrier.
手段として冷却水の循環方式を利用する銅管を使用する
ことを特徴とする請求項１に記載のウェーハキャリヤ。6. The wafer carrier according to claim 1, wherein a copper tube utilizing a circulation system of cooling water is used as a temperature control means for cooling the wafer.
れるウェーハキャリヤに付着される支持リングと同じ厚
さのハードパッドをさらに具備することを特徴とする請
求項１に記載のウェーハキャリヤ。7. The wafer carrier of claim 1, further comprising a hard pad having the same thickness as a support ring attached to the wafer carrier corresponding to the flat zone of the wafer.
着されるプラテンと、 前記プラテン上に位置し、前記ウェーハをホールディン
グするウェーハキャリヤを具備する半導体素子の製造装
置において、 前記ウェーハキャリヤはその表面に前記ウェーハの温度
を局部的に調節するための温度制御手段を具備すること
を特徴とする半導体素子の製造装置。8. A semiconductor device manufacturing apparatus comprising: a platen on which a wafer is mounted for chemical-mechanical polishing; and a wafer carrier which is located on the platen and holds the wafer. An apparatus for manufacturing a semiconductor device, comprising temperature control means for locally adjusting the temperature of the wafer on the surface.
ヤ表面の所定部位に付着されたことを特徴とする請求項
８に記載の半導体素子の製造装置。9. The apparatus for manufacturing a semiconductor device according to claim 8, wherein the temperature control means is attached to a predetermined portion of the surface of the wafer carrier.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950031660A KR970018333A (en) | 1995-09-25 | 1995-09-25 | Wafer carrier |
| KR95P31660 | 1995-09-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0997829A true JPH0997829A (en) | 1997-04-08 |
Family
ID=19427751
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15721696A Withdrawn JPH0997829A (en) | 1995-09-25 | 1996-06-18 | Wafer carrier and manufacturing device for semiconductor element provided with it |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPH0997829A (en) |
| KR (1) | KR970018333A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003057406A1 (en) * | 2001-12-26 | 2003-07-17 | Lam Research Corporation | Apparatus and methods for controlling wafer temperature in chemical mechanical polishing |
| CN100350812C (en) * | 2002-09-06 | 2007-11-21 | 三菱电机株式会社 | Radio communication system time slot allocation method |
| KR20180107974A (en) * | 2017-03-23 | 2018-10-04 | 주식회사 케이씨텍 | Substrate support unit and cmp system comprising the same, substrate cmp method |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100417644B1 (en) * | 1996-12-28 | 2004-04-13 | 주식회사 하이닉스반도체 | Method for preserving cmp apparatus |
| KR100510453B1 (en) * | 1998-02-02 | 2005-10-21 | 삼성전자주식회사 | Method and plate for mounting carrier film of chemical mechanical polishing process |
| US6020262A (en) * | 1998-03-06 | 2000-02-01 | Siemens Aktiengesellschaft | Methods and apparatus for chemical mechanical planarization (CMP) of a semiconductor wafer |
-
1995
- 1995-09-25 KR KR1019950031660A patent/KR970018333A/en not_active Application Discontinuation
-
1996
- 1996-06-18 JP JP15721696A patent/JPH0997829A/en not_active Withdrawn
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003057406A1 (en) * | 2001-12-26 | 2003-07-17 | Lam Research Corporation | Apparatus and methods for controlling wafer temperature in chemical mechanical polishing |
| US6984162B2 (en) | 2001-12-26 | 2006-01-10 | Lam Research Corporation | Apparatus methods for controlling wafer temperature in chemical mechanical polishing |
| US7029368B2 (en) | 2001-12-26 | 2006-04-18 | Lam Research Corporation | Apparatus for controlling wafer temperature in chemical mechanical polishing |
| CN100350812C (en) * | 2002-09-06 | 2007-11-21 | 三菱电机株式会社 | Radio communication system time slot allocation method |
| KR20180107974A (en) * | 2017-03-23 | 2018-10-04 | 주식회사 케이씨텍 | Substrate support unit and cmp system comprising the same, substrate cmp method |
Also Published As
| Publication number | Publication date |
|---|---|
| KR970018333A (en) | 1997-04-30 |
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