JPH0983791A - Error diffusing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To generate a switching signal for switching a plurality of error filters at random with simple constitution. SOLUTION: An adder 1 adds a multi-valued image signal and a quantization error signal together and a comparator 2 compares the result with a threshold level to generate a binary image signal. The difference between the output of the adder 1 and the output of the comparator 2 is regarded as a quantization error, which is dispersed by error filters 5 and 6 to pixels at the periphery of a processed pixel. The number of the error filters 5 and 6 is two and they are switched by a selector 7; and a bit selecting means 10 selects the LSB bit of the output signal of the adder 1 and outputs it as their switching signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an error diffusion device used as a pseudo halftone expression means in a facsimile, a scanner device or the like.

[0002]

2. Description of the Related Art In a facsimile or a scanner, a multivalued image picked up by image processing is binarized. FIG. 5 is a diagram showing an example of such binarization processing. An image picked up by a CCD image sensor or the like is output as an analog signal, and is converted by the A / D converter 20 into a digital image in which the gray level is represented by 8 bits per pixel. Next, a shading correction process for correcting the variation of the image sensor and an edge enhancement filter process 21 for enhancing the edge of the image are performed, and an error diffusion process 22 is performed to obtain a binary image represented by 1 bit per pixel. ing.

The error diffusion processing in this processing step is shown in, for example, Japanese Patent Laid-Open No. 4-27688, which will be described with reference to FIG. The digital image signal to be subjected to error diffusion processing is represented by 8 bits per pixel. This digital image signal is added to a quantization error signal, which will be described later, in an adder 1 and compared with a threshold value in a comparator 2. Threshold is 8
128 as the middle of the gray value 0-255 represented by bits
Is set to. When the image signal is larger than the threshold value, the output of the comparator 1 is 255, and in the opposite case, 0 is output. Based on this value, the binarizer 3 outputs a binarized image signal. The difference between the output of the comparator 1 and the input of the comparator 1 is the quantization error, which is output from the differentiator 4. This quantization error is distributed to the peripheral pixels of the processed pixel by the error filters 5 and 6, and added to the corresponding pixel by the adder 1. The variance value of this quantization error is the quantization error signal.

FIG. 7 is an explanatory diagram of the error filters 5 and 6. As shown in the figure, the diffusion direction of the quantization error is 1 pixel in the main scanning direction and 3 pixels in the sub scanning direction of the processed pixel. The dispersion coefficients for each pixel are e1, e2, e3, and e4. The error filter will be represented by this combination (e1, e2, e3, e4). For example (0.5, 0.12,
0.25, 0.13) and the quantization error of the processed pixel is 1
If 00 is set, 50 is spread to the right, 12 is spread to the lower left, 25 is spread to the bottom, and 13 is spread to the lower right.

The above processing is the basic configuration of the error diffusion processing. However, with such a structure, a texture peculiar to the error diffusion process appears, so that a plurality of error filters are switched by two-dimensional random numbers in order to prevent it. The error filters 5 and 6 shown in FIG. 6 are filters having different characteristics.
The two-dimensional pseudo random number generator 8 randomly generates 0 or 1 as a random number for each pixel arranged two-dimensionally. With this random number, the selector 7 provides the error filter 5,
Switch 6 The error memory 9 stores the output of the error filters 5 and 6 and inputs the image signal (processed pixel) to the adder 1.
The quantized error signal corresponding to is output.

FIG. 8 shows the state of the output signal of the two-dimensional pseudo random number generator 8. Random numbers are generated corresponding to the pixels arranged two-dimensionally in the main scanning direction and the sub scanning direction. The random number randomly generates 0 or 1 corresponding to each pixel. The higher the randomness of the random numbers, the more the generation of texture is suppressed.

[0007]

In the error diffusion device configured as described above, when the two-dimensional pseudo random number generation is realized by hardware such as wired logic, the circuit scale of the two-dimensional pseudo random number circuit is large and the device is large. This will increase the overall cost. In addition, DSP (digital signal
Processor) or a general-purpose microprocessor, etc., using software requires a considerable number of steps to generate random numbers, which is a bottleneck for high-speed processing.

The present invention has been made in view of the above problems, and an object thereof is to provide an error diffusion device that generates a switching signal for randomly switching a plurality of error filters with a simple configuration.

[0009]

In order to achieve the above object, in the invention described in claim 1, an adder for adding a multi-valued image signal and a quantization error signal and an output from this adder are provided. A comparator for generating a binarized signal by comparing with a threshold value; a plurality of error filters for dispersing a density difference between the output of the adder and the binarized signal to peripheral pixels of the multi-valued image signal;
And a selector for selecting the error filter, the quantized error signal is the output of the selected error filter,
The selector switches using a part of the multi-valued image signal.

According to a second aspect of the invention, an adder for adding the multi-valued image signal and the quantization error signal and a comparator for comparing the output from the adder with a threshold value to generate a binarized signal. And a plurality of error filters for dispersing the density difference between the output of the adder and the binarized signal to the peripheral pixels of the multi-valued image signal, and a selector for selecting the error filter.
The quantized error signal is the output of the selected error filter and the selector switches using a portion of the output signal of the adder.

According to the invention of claim 3, an adder for adding the multi-valued image signal and the quantization error signal and a comparator for comparing the output from the adder with a threshold value to generate a binarized signal. A plurality of error filters for distributing the density difference between the output of the adder and the binarized signal to the peripheral pixels of the multi-valued image signal, a selector for selecting the error filter, and a switching signal for the selector. A two-dimensional pseudo-random number generator for outputting, the quantized error signal is an output of the selected error filter, the two-dimensional pseudo-random number generator includes a one-dimensional pseudo-random number generation circuit and the one-dimensional pseudo-random number. It is composed of an EOR for logically operating the output of the generation circuit and a part of the multi-valued image signal or an EOR of a negative logic output.

According to the invention of claim 4, an adder for adding the multi-valued image signal and the quantization error signal and a comparator for comparing the output from the adder with a threshold value to generate a binarized signal. A plurality of error filters for distributing the density difference between the output of the adder and the binarized signal to the peripheral pixels of the multi-valued image signal, a selector for selecting the error filter, and a switching signal for the selector. A two-dimensional pseudo-random number generator for outputting, the quantized error signal is an output of the selected error filter, the two-dimensional pseudo-random number generator includes a one-dimensional pseudo-random number generation circuit and the one-dimensional pseudo-random number. It is composed of an EOR for logically operating the output of the generating circuit and a part of the output signal of the adder or an EOR of a negative logic output.

According to the fifth aspect of the invention, the lower bits of the bits representing the density of the multi-valued image signal are used as a part of the multi-valued image signal.

According to a sixth aspect of the present invention, the least significant bit of the bits representing the density of the output signal is used as a part of the output signal of the adder.

[0015]

According to the present invention, a multi-valued image represented by n bits per pixel can be displayed as n 1-bit images. An image of each bit is called a bit plane, and a k-bit image is called a k-bit plane. FIG. 2 is a diagram showing each bit plane of a multi-valued image represented by 8 bits.
Represents the most significant bit plane (MSB) and 0 represents the least significant bit plane (LSB). In the upper bit plane (for example, 7, 6, 5 bit plane), each pixel represents the original image (multi-valued image) quite faithfully, and there is a correlation between each pixel. However, the lower bit plane (eg 2,
When it becomes a 1,0 bit plane), the image becomes almost unrelated to the original image, and the pixels are random. This randomness increases as it goes to the lower order, and each pixel of the LSB bit plane is represented by 0 or 1. Therefore, for the multi-valued image input to the adder, the value of the pixel bit of the lower order bit plane is random. Is large and there is almost no correlation between surrounding pixels, so that it can be used as a random number. When the number of error filters to be selected is two, it is sufficient to take one bit of the lower bit, but when there are four error filters, two bits of the lower bit are taken, and 0 to 3 represented by two bits makes any one of the four. Select one. As described above, a random number can be easily obtained by using a part of the multi-valued image signal.

According to the present invention, 1 of the output signal of the adder is used as a random number.
Parts. The output of the adder is the sum of the multivalued image and the quantization error signal. Since the quantization error signal is essentially a signal in which the difference between a multi-valued image and its binary image is dispersed in surrounding pixels, it has the same property as that of the multi-valued image. For this reason, the value of the bit that represents each pixel in the lower bit plane of the sum of the multi-valued image and the quantization error signal has randomness, and the effect of arithmetic error is added and the randomness increases as compared to the multi-valued image alone. are doing. Thus, a random number can be easily obtained by using a part of the output of the adder.

Although the one-dimensional pseudo random number generator has a simple structure, it generates random numbers of the same pattern in a relatively short period.
Therefore, the EOR of a part of the multi-valued image having a strong randomness and the output of the one-dimensional pseudo random number generator or the EOR of the negative logic output
By taking the above, a two-dimensional pseudo-random number generator having large randomness can be easily constructed.

Further, the EOR of the output of the one-dimensional pseudo random number generator and a part of the output of the adder or the EOR of the negative logic output
By taking the above, it is possible to easily construct a two-dimensional pseudo random number generator having a greater randomness than the invention of claim 3. This is because, as described in the invention of claim 2, data having a larger randomness is output from a part of the output of the adder than from a part of the multi-valued image signal.

Further, since the lower the lower bits of the n bits forming the multi-valued image signal, the greater the randomness, the lower bits can be used as the input of the random number or the random number generator.

When the output signal of the adder, which is the sum of the multi-valued image signal and the quantization error signal, is represented by n bits,
The lower the bits, the greater the randomness. The output signal of the adder has higher randomness of lower bits than the multi-valued image signal, and the lower bits can be used as an input / output of a random number or a random number generator.

[0021]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the first embodiment. The same reference numerals as those in the conventional example of FIG. 6 indicate those having the same function. The first embodiment shown in FIG. 1 is different from the conventional example shown in FIG. 6 in that the two-dimensional pseudo random number generator 8 is replaced by an adder 1
Bit selecting means 1 for extracting the lower bit from the output signal of
0 is provided and the selector 7 is operated. The bit selection means 10 can be easily configured by software, and the conventional two-dimensional pseudo random number generator 8 is unnecessary. In addition, the number of steps is greatly reduced compared to the number of steps when generating random numbers with conventional software.
The least significant bit (LSB) of the output signal of the adder 1 is preferable as the output of the bit selection means 10, but randomness can be obtained even with the bits near this.

The digital image signal is a multi-valued image, as shown in FIG.
As described above, when examining the 8-bit bit planes representing the shading for each pixel, the MSB bit plane of the original image (multivalued image) is close to the original image, and there is a correlation between each pixel. The bit value of a pixel has little randomness. On the other hand, as it goes to the lower bit plane, the correlation of the bit value of each pixel disappears and becomes random,
In the LSB bit plane, the bit value of each pixel is almost random.

Next, a second embodiment will be described.
FIG. 3 shows a block diagram of the second embodiment. In comparison with the first embodiment shown in FIG. 1, a two-dimensional pseudo random number generator 11 that generates a random number by the output of the bit selector 10 is provided. The conventional example described with reference to FIG. 6 is also provided with the two-dimensional pseudo random number generator 8, but is different from the conventional one in that the structure is simple.

FIG. 4 is a two-dimensional pseudo random number according to the second embodiment.
The structure of the generator 11 is shown. Two-dimensional pseudo random number generator 11
Is a simple one-dimensional pseudo random number generation circuit 12 and
Exclusive of the output of the circuit 12 and the output of the bit selection means 10.
It is composed of an EOR gate 13 for calculating a logical sum.
You. Primitive polynomial known as one-dimensional pseudo-random number generator 12
X ^Three+ X²Use M sequence (maximum long period sequence) by +1
I do. The period of the M sequence is 2 where n is the degree of the primitive polynomial.ⁿ
-1 (in this case, n = 3, so 2^Three-1 = 7
It is known that (Miyakawa et al., "Code theory" Akira
Kyodo Publishing April 20, 1978 4th edition, 128-12
Page 9). The one-dimensional pseudo random number generation circuit 12 is connected in series.
Three 1-bit delay circuits 12a, 12b, 12c,
Exclusive output of delay circuit 12a and output of delay circuit 12c
EOR gate which logically ORs and inputs to the delay circuit 12a
12d. Increase the degree n of the primitive polynomial
If you ask, the value generated by the one-dimensional pseudo-random number generator 12
Randomness increases, but circuit scale also increases. For this reason
In this embodiment, the configuration is simple because the cycle is relatively short.
One-dimensional pseudo that outputs a single value with low randomness
Output from the random number generation circuit 12 and from the bit selection means 10.
EOR the exclusive OR with a highly random value
Take it at gate 13 to increase the randomness
ing. Exclusive theory of negative logic output instead of exclusive OR
The same effect can be obtained by using a Riwa gate.

In the first and second embodiments, the bit selecting means 10 outputs the value of the LSB bit as a random number. However, in the vicinity of the LSB, for example, when a multi-valued image is represented by 8 bits, As shown in FIG. 2, even if 1 or 2 bits have a considerable randomness, these bits may be output. Further, the case of two error filters is shown, but in the case of four error filters, one of four can be selected at random by combining two lower bits. Further, although the output of the adder 1 is used as the input of the bit selection means 10, a multivalued image which is the input of the adder 1 may be used.

[0026]

As is apparent from the above description, according to the present invention, the value represented by the lower bit of the bits representing the multi-valued image signal and the addition signal of the multi-valued image signal and the quantization error signal is used as the random number. When the generation circuit is implemented by hardware, the configuration can be made extremely simple.
Further, when it is realized by software, the number of steps of the program can be extremely reduced. Further, the random number generated in this manner is passed through the exclusive OR gate of the output of the one-dimensional pseudo random number generating circuit having a simple structure but a simple structure and the EOR or the negative logic output The circuit can be obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a first embodiment.

FIG. 2 is a diagram showing each bit plane of a multi-valued image displayed by 8 bits.

FIG. 3 is a block diagram showing a second embodiment;

FIG. 4 is a diagram showing a two-dimensional pseudo random number generation circuit according to a second embodiment.

FIG. 5 is a block diagram showing a process of digitizing an analog image signal into a binary image.

FIG. 6 is a block diagram showing a conventional error diffusion device.

FIG. 7 is an explanatory diagram of an error filter.

FIG. 8 is a diagram showing an output signal of a two-dimensional pseudo random number generator.

[Explanation of symbols]

 1 adder 2 comparator 3 binarizer 4 differencer 5, 6 error filter 7 selector 8 two-dimensional pseudo random number generator 9 error memory 10 bit selection means 11 two-dimensional pseudo random number generator 12 one-dimensional pseudo random number generator 12a , 12b, 12c Delay circuit 12d, 13 EOR gate

Claims (6)

[Claims] 1. An adder for adding a multi-valued image signal and a quantization error signal, a comparator for comparing an output from the adder with a threshold value to generate a binarized signal, and the adder. Of a plurality of error filters that disperse the density difference between the output of the multi-valued image signal and the binarized signal to the peripheral pixels of the multi-valued image signal, and a selector that selects the error filter. The quantized error signal is selected. The output of the error filter, wherein the selector performs switching using a part of the multi-valued image signal. 2. An adder for adding a multi-valued image signal and a quantization error signal, a comparator for comparing an output from the adder with a threshold value to generate a binarized signal, and the adder. Of a plurality of error filters that disperse the density difference between the output of the multi-valued image signal and the binarized signal to the peripheral pixels of the multi-valued image signal, and a selector that selects the error filter. The quantized error signal is selected. The output of the error filter, and the selector switches using a part of the output signal of the adder. 3. An adder for adding a multi-valued image signal and a quantization error signal, a comparator for comparing an output from this adder with a threshold value to generate a binarized signal, and the adder. Error filter that disperses the density difference between the output of the image signal and the binarized signal in the peripheral pixels of the multi-valued image signal, a selector that selects this error filter, and a two-dimensional pseudo that outputs a switching signal to this selector. A random number generator, the quantized error signal is the output of the selected error filter, the two-dimensional pseudo-random number generator is a one-dimensional pseudo-random number generator, and
An error diffusion device comprising an EOR for theoretically calculating an output of a dimensional pseudo random number generation circuit and a part of the multi-valued image signal or an EOR having a negative logic output. 4. An adder for adding a multi-valued image signal and a quantization error signal, a comparator for comparing an output from this adder with a threshold value to generate a binarized signal, and the adder. Error filter that disperses the density difference between the output of the image signal and the binarized signal in the peripheral pixels of the multi-valued image signal, a selector that selects this error filter, and a two-dimensional pseudo that outputs a switching signal to this selector. A random number generator, the quantized error signal is the output of the selected error filter, the two-dimensional pseudo-random number generator is a one-dimensional pseudo-random number generator, and
An error diffusion device comprising an EOR for logically operating an output of a dimensional pseudo random number generation circuit and a part of an output signal of the adder or an EOR having a negative logic output. 5. The error diffusion device according to claim 1, wherein lower bits of the bits representing the density of the multi-valued image signal are used as a part of the multi-valued image signal. 6. The error diffusion device according to claim 2, wherein lower bits of the bits representing the density of the output signal are used as a part of the output signal of the adder.