JPH098021A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE: To provide a method for manufacturing a semiconductor device which can improve etching processibility on the upper substrate face having an element separation film. CONSTITUTION: An anti-oxidation pattern 14 formed on a substrate 11 is used to oxidize the substrate 11, and an element separation film 15 comprising an oxide film is formed on a surface of the substrate 11. The anti-oxidation pattern 14 is used as a mask to sputter-etch the element separation film 15 to make a slope 15a of the element separation film 15 gentle. The anti-oxidation pattern 14 is removed, and pattern forming layer 19 is formed on the substrate 11 including the element separation film 15. The pattern forming layer 19 is etched, thereby forming a pattern 21 comprising the pattern forming layer 19 on the substrate 11. The pattern forming layer 19 whose vertical thickness has been more uniform is formed on the substrate 11 having the element separation film 15 with the slope 15a gentle, thereby assuring etching processibility of the pattern forming layer 19.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having an element isolation film on the surface of a substrate.

[0002]

2. Description of the Related Art In a semiconductor device manufacturing process, selective oxidation (Loca oxidation) is performed by using an antioxidation pattern formed on a substrate as a mask.
By the oxidation of silicon (hereinafter referred to as LOCOS) method, an element isolation film made of an oxide film is formed on the surface portion of the substrate exposed from the oxidation prevention pattern. The LOCOS method is classified into a general LOCOS method, that is, a Conventional LOCOS method and a PPL (Poly Pad LOCOS) method, depending on the configuration of the oxidation prevention pattern. Co
The nventional LOCOS method is a method using an oxidation prevention pattern having a two-layer structure of a pad oxide film and a silicon nitride film as an upper layer. The PPL method is a method of using an anti-oxidation pattern having a three-layer structure in which a pad oxide film / polysilicon film / silicon nitride film are sequentially stacked from the lower layer.

The above-mentioned Conventional LOCOS method uses the PPL
Compared with the method, the oxide film formed under the silicon nitride film, that is, the bird's beak is large, but there is an advantage that the number of steps is small because the oxidation prevention pattern has a two-layer structure. This Co
In the nventional LOCOS method, in order to suppress the bird's beak, the film thickness of the silicon nitride film with respect to the pad oxide film may be increased. In this case, stress is concentrated on the element isolation film portion under the edge portion of the oxidation prevention pattern. As a result, the leak current increases and the element characteristics of the semiconductor device deteriorate.

Therefore, in the conventional LOCOS method, the film thickness ratio of the silicon nitride film to the pad oxide film is increased, and the oxidation treatment is performed at a high temperature of 1000 ° C. or higher to reduce bird's beak and reduce stress by viscous oxidation. Improved Conventional LOC
OS) method is practiced.

[0005]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
Method of manufacturing semiconductor device in which element isolation film is formed by S method
The law had the following problems. That is, shown in FIG.
As described above, the surface of the substrate 41 is prevented from being oxidized during the oxidation treatment.
The element isolation film 4 is selectively formed in the portion exposed from the pattern 42.
As the oxide film which becomes 3 grows, the oxidation prevention pattern 42
Of the element isolation film 43 exposed from the substrate 41 surface
The slope becomes steeper. Especially by the ICL method
When 43 is formed, this inclination becomes remarkable. others
Therefore, as shown in FIG. 4B, the device isolation film 43 is provided.
For forming, for example, a gate electrode on the upper surface of the substrate 41
The thickness of the polycide film 44 is t₁When the film is formed by
The surface of the separation film 43 has a large inclination with respect to the surface of the substrate 41.
In the inclined portion 43a, the vertical direction of the polycide film 44 is
Thickness t ₂Becomes thicker. This film thickness ratio t₁: T₂Is on
The steeper the inclination of the inclined portion 43a, the larger the inclination.

Then, as shown in FIG. 4C, when the polycide film 44 is etched using the resist pattern 45 as a mask, an etching residue 45 is formed on the inclined portion 43a. Therefore, as shown in FIG.
When overetching is performed to remove the etching residue (45), side etching occurs in the first-layer polysilicon 44a forming the polycide film 44, and the gate length is shortened.

Therefore, an object of the present invention is to provide a method of manufacturing a semiconductor device capable of improving the workability of the upper surface of a substrate having an element isolation film.

[0008]

In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention comprises a step of oxidizing a substrate by using an antioxidation pattern formed on the substrate as a mask, After forming the element isolation film made of an oxide film, the element isolation film is etched. Then, a pattern formation layer is formed on the substrate including the element isolation film, and the pattern formation layer is etched to form a pattern.

[0009]

In the method of manufacturing a semiconductor device described above, since the inclined portion of the element isolation film is etched, the inclination of the inclined portion with respect to the substrate surface becomes gentle. Therefore, the pattern formation layer formed on this substrate has a uniform film thickness in the vertical direction. Therefore, the workability in etching the pattern forming layer is improved. Further, when the etching is performed by sputter etching, the etching of the inclined portion inclined with respect to the surface of the substrate progresses rapidly due to the relationship between the incident angle of the etching species and the etching rate during the sputter etching. For this reason, the inclination of the inclined portion with respect to the substrate surface becomes gentle while the effective film thickness of the element isolation film is secured.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. Here, FIGS. 1 (1) to 1 (4) are views for explaining a method of manufacturing a semiconductor device according to claims 1 and 2 of the present invention, and the above manufacturing method is used with these figures. An embodiment when applied to the manufacturing process of a MOS transistor will be described.

First, in the first step shown in FIG. 1A, a substrate 11 made of, for example, silicon is prepared. And 9
A pad oxide film 12 made of a silicon oxide film is formed to a thickness of 10 nm on the upper surface of the substrate 11 by a dry thermal oxidation method at 50 ° C. Next, low pressure vapor phase growth method so-called LPCV
A silicon nitride film 13 having a film thickness of 100 nm is formed on the pad oxide film 12 by the D (Low Pressure Chemical Vapor Deposition) method. An example of film forming conditions for the silicon nitride film 13 by the LPCVD method is shown below. Film forming apparatus; LPCVD apparatus Film forming gas and flow rate; SiH ₂ Cl ₂ (dichlorosilane) = 50 sccm NH ₃ (ammonia) = 200 sccm N ₂ (nitrogen) = 2000 sccm sccm = standard cubic centimeter / minute Film forming atmosphere pressure; 70 Pa Deposition temperature: 760 ° C

Next, a resist pattern not shown here is formed on the silicon nitride film 13 by the lithography method. After that, the silicon nitride film 13 is etched using the resist pattern as a mask to form an oxidation prevention pattern 14 formed by stacking the patterned silicon nitride film 13 on the pad oxide film 12. An example of etching conditions for the silicon nitride film 13 is as follows. Etching device: Single-wafer type magnetron RIE device Reaction gas and flow rate; C ₄ F ₈ (cyclobutane octafluoride) = 5 sccm O ₂ (oxygen) = 4 sccm Ar (argon) = 100 sccm Etching atmosphere pressure; 2.7 Pa RF power ; 1000W

Next, after removing the resist pattern, the exposed surface of the substrate 11 is selectively oxidized by a wet oxidation method at 1050.degree. As a result, the element isolation film 15 made of silicon oxide is formed on the surface portion of the substrate 11.
In the element isolation film 15 formed as described above, the inclined portion 15 that is the end of the portion exposed from the silicon nitride film 13 is formed.
a has a steep inclination with respect to the surface of the substrate 11. Further, the bird's beak 15b, which is the element isolation film 15 portion grown below the silicon nitride film 13, is
It becomes shorter than the element isolation film formed by the Conventional LOCOS method.

Next, in the second step shown in FIG. 1B, the slope 15a of the element isolation film 15 is etched to smooth the slope of the slope 15a with respect to the surface of the substrate 11. This etching is performed by, for example, sputter etching using the oxidation prevention pattern 14 as a mask. An example of this sputter etching condition is shown below. Etching device: Single-wafer parallel plate RIE (Reactive Ion Etching) device Sputtering gas and flow rate; Ar (argon) = 500 sccm Etching atmosphere pressure; 1.0 Pa RF power; 1200 W

FIG. 2 is a graph showing the relationship between the incident angle θ of sputtered particles and the etching rate during the sputter etching. As shown in this graph, in the sputter etching, the peak of the etching rate is near the incident angle θ = 60 ° C. Therefore, in the sputter etching of the element isolation film 15, the sputtered particles are substantially perpendicular to the surface of the substrate 11, that is, the incident angle θ = 0 °.
Therefore, the etching of the inclined portion 15a tilted with respect to the surface of the substrate 11 proceeds faster than that of the portion parallel to the surface of the substrate 11. Therefore, the element isolation film 1
With the effective film thickness of 5 being ensured, the inclination of the inclined portion 15a with respect to the surface of the substrate 11 becomes gentle. The incident angle θ is an angle formed by the normal 32 of the surface 31 to be etched and the incident direction of the sputtered particles 33, as shown in FIG. The etching is not limited to sputter etching and may be isotropic etching. Also in this case,
The inclination of the inclined portion 15a with respect to the surface of the substrate 11 becomes gentle.

Next, in the third step shown in FIG. 1C, the silicon nitride film 13 is removed by wet etching using hot phosphoric acid. After that, H ₂ O: HF = 1
The pad oxide film (1
2) is removed, and the antioxidant pattern (1
4) is removed. Next, the gate oxide film 16 is formed on the surface of the substrate 11 by the dry oxidation method.

After the above, a polysilicon film 17 having a film thickness of 70 nm is formed on the substrate 11 on which the gate oxide film 16 has been formed. An example of this film forming condition is shown below. Film forming apparatus; LPCVD apparatus Film forming gas and flow rate; SiH ₄ (monosilane) = 100 sccm He (helium) = 400 sccm Film forming atmosphere pressure; 70 Pa Film forming temperature; 610 ° C.

Next, a tungsten silicide film (WSix) 18 having a film thickness of 70 nm is formed on the polysilicon film 17. An example of this film forming condition is shown below. Film forming apparatus; LPCVD apparatus Film forming gas and flow rate; SiH ₄ (monosilane) = 1000 sccm WF ₆ (tungsten hexafluoride) = 10 sccm He (helium) = 360 sccm Film forming atmosphere pressure; 27 Pa Film forming temperature; 360 ° C.

As described above, the pattern forming layer 19 made of, for example, a polycide film including the polysilicon film 17 and the tungsten silicide film 18 is formed on the substrate 11. Since the pattern formation layer 19 is formed on the substrate 11 having the element isolation film 15 in which the inclination of the inclined portion 15a is smoothed by the etching in the second step, the film thickness in the vertical direction is averaged. It will be a good thing.

Next, in a fourth step shown in FIG. 1 (4), a resist pattern 20 is formed on the pattern forming layer 19 by a lithography method. Then, the pattern forming layer 19 is etched by using the resist pattern 20 as a mask to form a pattern 21 including the pattern forming layer 19. An example of the etching conditions for the pattern forming layer 19 is as follows. Etching device: Single-wafer parallel plate RIE device Reaction gas and flow rate; Cl ₂ (chlorine) = 50 sccm O ₂ (oxygen) = 5 sccm Etching atmosphere pressure; 3 Pa RF power; 800 W

As described above, the element isolation film 15 is formed on the surface portion.
A gate electrode made of a polycide film is formed as a pattern 21 on the substrate 11 having the. Here, since the pattern forming layer 19 having a uniform film thickness in the vertical direction, that is, the polycide film is etched, the pattern forming layer 1
The pattern 21 is formed without unnecessarily overetching 9 and without causing etching residue on the inclined portion 15a of the element isolation film 15. Therefore, the gate electrode is formed without side etching in the polysilicon film of the polycide film. Therefore, a gate electrode having good dimensional accuracy with respect to the design value can be obtained.

Further, in the above embodiment, since the element isolation film 15 formed by the ICL method is included, the Convention
The bird's beak 15b of the element isolation film 15 becomes smaller than that in the case where the element isolation film 15 is formed by the alLOCOS method. Therefore, the area of the active region 11a of the substrate 11 separated by the element isolation film 15 is secured, the narrow channel effect can be prevented, and the characteristics of the semiconductor device can be secured. Further, as compared with the case where the element isolation film 15 is formed by the PPL method, the oxidation prevention pattern 14
Since it has a two-layer structure, the manufacturing cost of the semiconductor device can be reduced and the TAT (Turn Around Time) can be shortened.

The method for forming the element isolation film 15 is not limited to the ILC method described above as long as it is a selective oxidation method.
The national LOCOS method or the PPL method may be used. Furthermore, the present invention can be widely applied to the step of forming a pattern forming layer on a substrate on which an element isolation film is formed and performing a step of etching the pattern forming layer, other than the step of manufacturing a MOS transistor.

[0024]

As described above, according to the method of manufacturing a semiconductor device of the present invention, the element isolation film is etched to make the slope of the sloped portion of the element isolation film gentle with respect to the substrate surface. It becomes possible to form a pattern formation layer having a more uniform film thickness in the vertical direction on a substrate having an element isolation film. Therefore, it becomes possible to improve the workability of the pattern forming layer formed on the upper surface of the substrate having the element isolation film.

[Brief description of drawings]

FIG. 1 is a sectional process diagram illustrating an example.

FIG. 2 is a graph showing a relationship between an incident angle of sputtered particles and an etching rate.

FIG. 3 is a diagram illustrating an incident angle of sputtered particles.

FIG. 4 is a cross-sectional process diagram illustrating a problem.

[Explanation of symbols]

 11 Substrate 14 Oxidation Prevention Pattern 15 Element Separation Film 15a Inclined Part 19 Pattern Forming Layer 21 Pattern

Claims (2)

[Claims] 1. A first step of performing oxidation treatment on the substrate by using the oxidation prevention pattern formed on the substrate as a mask to form an element isolation film made of an oxide film on the surface of the substrate, and the oxidation prevention pattern. A second step of etching the surface layer of the element isolation film by using the mask as a mask, and a third step of removing the oxidation prevention pattern and then forming a pattern formation layer on the substrate including the element isolation film. And a fourth step of forming a pattern made of the pattern forming layer on the substrate by etching the pattern forming layer. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the etching performed in the second step is sputter etching.