JPH098004A - Method of manufacturing semiconductor device - Google Patents

Abstract

PURPOSE: To prevent the lowering of an etching rate near a clamping in the etching of an SiO2 film formed on an Si wafer using a dry etching device equipped with a mechanical clamping mechanism. CONSTITUTION: An inert gas, that contains He gas, is supplied. The quantity of the gas is 10 times or more of that of a carbon halide gas and the proportion of the rate of flow of the He gas contained in the inert gas is 20% or more of it. With this, the etching of even the peripheral part of the wafer is performed uniformly and the yield of the wafer is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for etching a silicon oxide film using a dry etching apparatus having a wafer clamp mechanism.

[0002]

2. Description of the Related Art In the process of forming a semiconductor integrated circuit, when a silicon oxide (SiO ₂ ) film on a silicon wafer (hereinafter simply referred to as a wafer) is dry-etched, a parallel plate type dry etching apparatus or a magnetic field is applied to it. In addition, a magnetron RIE system device, an ECR system device utilizing the resonance action of a magnetic field and a microwave, and a dry etching device utilizing inductive RF plasma are used. When dry etching is performed using these devices, the wafer is often cooled during etching in order to prevent thermal deterioration of the photoresist and reduction of the selection ratio during etching.

For example, when a contact hole is formed in a SiO ₂ film, since the etching is performed with a high bias, the temperature of the wafer is likely to rise and it is necessary to cool the wafer. In addition, LDD (Lightly Doped Dr
When the sidewall is formed on the side surface of the gate electrode of the MOS device having the ain structure, it is necessary to cool the wafer in order to secure the selection ratio with the underlying Si substrate. In order to cool the wafer efficiently, the wafer is placed on the cooled stage, He gas is flown between the back surface of the wafer and the stage, and the periphery of the wafer is mechanically fixed so that the wafer is not displaced. A mechanical clamp method is used. This will be described below with reference to the drawings.

FIG. 5 is a sectional view of the inside of a processing chamber of a generally used parallel plate type dry etching apparatus. The main parts are a processing chamber 1 surrounded by an outer wall 8 and maintained at a predetermined degree of vacuum, a lower electrode 2 also serving as a wafer stage, and an upper electrode 3 having a reaction gas outlet.
The clamp ring 5 holds the wafer 4, and the insulating ring 6 protects the periphery of the electrode. As the material of the clamp ring 5, an insulator such as ceramic, vespel, or aluminum alumite is used in order to focus the plasma inside the processing chamber 1 and prevent consumption.

Next, the operation will be described. Wafer 4
Is placed on the lower electrode 2 whose temperature is controlled by an external temperature controller 7 via a robot arm (not shown) or the like, and then the lower electrode 2 or the clamp ring 5 is moved up or down to move the wafer 4 The entire circumference or several places around it are mechanically pressed and held by the clamp ring 5 with a width of several mm. Next, on the back surface of the wafer 4, the lower electrode 2
He gas is flowed from the wafer to efficiently cool the wafer 4.
Then, after introducing an etching gas from the upper electrode 3,
RF is applied to the lower electrode 2 to perform etching.

SiO₂Etch for etching the film
CF as the gas_Four+ CHF_ThreeSystem gas or Ar or H
CF with e gas added_Four+ CHF_Three+ Ar gas and C
F_Four + CHF_Three+ He gas (Japanese Patent Laid-Open No. 62-73724)
No.), or CF to which Ar and He gas are added at the same time._Four
+ CHF_Three+ Ar + He system gas (JP-A-1-23812)
No. gazette) is used.

[0007]

Since the number of shots per wafer decreases as the chip size increases with the increase in density and integration of semiconductor integrated circuits, chips are manufactured up to the outermost periphery of the wafer. Is required.
However, as shown in FIG. 5, when a clamp mechanism for cooling the wafer is provided, C as an etching gas.
When F ₄ + CHF ₃ based gas or CF ₄ + CHF ₃ + Ar based gas is used, the plasma generated in the processing chamber 1 is focused inside the processing chamber by the clamp ring 5 and the insulating ring 6, and the vicinity of the clamp ring 5 is used. However, there is a problem that the etching rate for the SiO ₂ film is extremely lowered because the plasma density is rapidly reduced. CH ₄ + CHF ₃ + He-based gas or Ar as etching gas
And he was added He simultaneously _{CF 4 + CHF 3 + Ar +} He
The same problem occurred in the case of system gas.

An object of the present invention is to provide a method of manufacturing a semiconductor device capable of uniformly etching a silicon oxide film up to the wafer edge even if an etching device having a clamp mechanism is used.

[0009]

A method of manufacturing a semiconductor device according to the present invention uses a dry etching apparatus equipped with a wafer clamping mechanism to process a SiO ₂ film formed on a silicon wafer, An inert gas containing a small amount of He gas is supplied at a flow rate of 10 times or more of the carbon halide gas, and in particular, the ratio of He gas contained in the inert gas is set to at least 20%. To do.

[0010]

[Function] When a large amount of an inert gas having a small molecular weight is added to a carbon halide gas as an etching gas, the inert gas becomes a carrier gas and the plasma which exerts an etching action spreads from the center to the outside.
The etching rate of the O ₂ film is uniform up to the edge of the wafer.

[0011]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 4 is a sectional view of a semiconductor chip for explaining one embodiment of the present invention.

As shown in FIG. 4, a SiO ₂ film 11 is formed by thermal oxidation or the like on a Si wafer 10 on which predetermined elements are formed by diffusion or the like, and then a photoresist film 12 is formed thereon. Then, the opening 13 is formed by patterning. Next, this Si wafer 10 is placed on the lower electrode 2 of the parallel plate type dry etching apparatus shown in FIG. 5, and a mixed gas obtained by adding CHF ₃ + CF ₄ as an etching gas to Ar + He as an inert gas is supplied from the upper electrode 3. Then, a high frequency voltage was applied between the electrodes to generate plasma, and the SiO ₂ film 11 was etched to form contact holes. The flow rate of the mixed gas at this time is CHF ₃ = 20.
SCCM, CF ₄ = 20 SCCM, inert gas containing 75% He = 400 SCCM.

The SiO ₂ film 1 is formed by using this etching gas.
As a result of etching No. 1, 3m around the Si wafer 10
The uniformity of in-plane etching rate up to m is ± 10
% To ± 2.2%. In addition, CH
The proportion of the inert gas added to the halogenated carbon-based gas such as F ₃ is preferably 10 times or more, and the proportion of He in the inert gas is preferably 20%. The reason will be described below.

In FIG. 1, the parallel plate type dry etching apparatus shown in FIG. 5 is used, and the entire circumference of the wafer 4 is clamped with a width of 2 mm by a clamp ring 5, and an inert gas (CHF ₃ + CF _{4) is used as} an etching gas. It shows the etching rate of the SiO ₂ film in the wafer surface when the SiO ₂ film formed on the silicon wafer is etched by adding Ar + 20% He). It can be seen from FIG. 1 that when the inert gas is 5 times as much as the etching gas (CHF ₃ + CF ₄ ), the etching rate shows a convex distribution and its variation is large. As the amount of the inert gas added increases, the inert gas, especially He having a small molecular weight, becomes a carrier gas and spreads the plasma to the outside, so that the distribution of the etching rate changes to a convex downward, and the ratio of the inert gas becomes About 1
At 0 times, the etching rate becomes uniform up to the peripheral portion of the wafer. FIG. 2 shows the relationship between the distance from the wafer outer periphery (end portion) and the in-plane uniformity (variation) of the etching rate at this time. As shown in FIG. 2, when the ratio of the inert gas is 5 times, the etching rate of the peripheral portion of the wafer is reduced due to the influence of the clamp ring, so that the peripheral portion of the wafer is 3 m.
While the variation up to m is ± 10% or more, when the ratio of the inert gas is 10 times, the variation is ± 2.2%.

Since the development in which the etching rate distribution in the wafer surface becomes flat as described above is related to the pressure in the etching process, the amount of the inert gas added and the amount of the inert gas added to the processing pressure according to the etching purpose of the SiO ₂ film. It is necessary to determine the ratio of He. FIG. 3 shows the ratio of the inert gas and the H in the inert gas for maintaining the in-plane uniformity (variation) of the etching rate within ± 2.2% within 3 mm around the wafer.
The relationship between the ratio of e and the pressure is shown. For example, when the SiO ₂ film is etched back to form the side wall on the side surface of the gate electrode of the LDD structure MOS element, the pressure is set to 1000 in order to secure the selection ratio with the Si substrate.
When etching as mTorr, it can be seen from FIG. 3 that the proportion of the inert gas must be set to 20 times or more and the proportion of He in the inert gas must be set to 70% or more. Furthermore, ₂₀ mTo used for usual etching of SiO ₂ film
It can be seen that in the pressure region of rr or higher, the ratio of the inert gas needs to be 10 times or more and the ratio of He in the inert gas needs to be 20% or more. When the ratio of the inert gas or He is less than this, the distribution of the etching rate is not flat, and the variation of the etching rate in the peripheral portion becomes large.

[0016]

As described above, according to the present invention, when etching a SiO ₂ film formed on a Si wafer, H 2
By supplying an inert gas containing e-gas 10 times or more of the carbon halide gas as an etching gas, and setting the ratio of He gas contained in the inert gas to 20% or more, plasma is generated in the peripheral portion. Therefore, even if a dry etching apparatus that mechanically clamps the entire circumference of the wafer with a width of 2 mm is used, the uniformity of the etching rate up to 3 mm around the wafer can be improved. Therefore, the yield of wafers can be increased by 4% or more.

[Brief description of drawings]

FIG. 1 is a diagram showing a relationship between a ratio of an inert gas and an etching rate within a wafer surface.

FIG. 2 is a diagram showing a relationship between an inert gas ratio and an etching rate in an outer peripheral portion within a wafer surface.

FIG. 3 is a diagram showing a relationship between a ratio of an inert gas, a ratio of He, and a pressure for maintaining a constant etching rate.

FIG. 4 is a cross-sectional view of a Si wafer for explaining one embodiment of the present invention.

FIG. 5 is a sectional view of a parallel plate type dry etching apparatus.

[Explanation of symbols]

1 Processing Chamber 2 Lower Electrode 3 Upper Electrode 4 Wafer 5 Clamp Ring 6 Insulation Ring 7 Temperature Controller 8 Outer Wall 10 Si Wafer 11 SiO ₂ Film 12 Photoresist Film 13 Opening

Claims (4)

[Claims] 1. A method of manufacturing a semiconductor device in which a silicon oxide film formed on a silicon wafer is etched by using a dry etching apparatus having a wafer clamping mechanism, wherein a halogenated carbon-based gas and this halogenated gas are used as etching gas. A method for manufacturing a semiconductor device, which uses a mixed gas of an inert gas which is 10 times or more the amount of a carbon-based gas. 2. The inert gas is at least helium (He)
The method for manufacturing a semiconductor device according to claim 1, further comprising: 3. The proportion of helium in the inert gas is 20%
The above is the method for manufacturing a semiconductor device according to claim 2. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the dry etching apparatus is a parallel plate type.