JPH0962378A - Constant current circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a power supply current from increasing abnormally before initialization, etc. SOLUTION: A reference voltage Vr is supplied to the non-inversion input terminal of an operational amplifier 2, and the output terminal of the operational amplifier is connected to the base of an output transistor 3, and whose emitter is connected to the inversion input terminal. and also, connected to a common potential point via a resistor 4. Also, the base of the operational amplifier is connected to the common potential point via a Zener diode 5, and its collector to a power source via a load impedance 6. In this invention, especially, a diode 11 is inserted between the output terminal of the operational amplifier 2 and the base in a direction opposite to the running direction of a base current. In this way, the polarity of the reference voltage Vr is inverted from the one in a normal operation when abnormality occurs, and when the transistor is cut off, a large current flowing from the common potential point to a negative power source(-Vp) or from a positive power source(+Vp) to the common potential point via the Zener diode 5 is blocked by the diode 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant current circuit used in IC testers and the like.

[0002]

2. Description of the Related Art A conventional constant current circuit 1 will be described with reference to FIG. A reference voltage Vr corresponding to a constant output current Io is supplied to the constant current circuit 1 from the reference voltage generation circuit 2 to the non-inverting input terminal of the operational amplifier 2. The output of the operational amplifier 2 is connected to the base of the transistor 3, and its emitter is connected to the inverting input terminal of the operational amplifier 2 and the common potential point via the resistor 4. The base is connected to a common potential point via a Zener diode (generally a constant voltage threshold element) 5 and the collector is connected to a power supply (power supply voltage + V) via a load impedance 6.

Since the base current Ib of the transistor 3 is smaller than the collector current Ic and the emitter current Ie, the emitter voltage Ve is neglected for simplification. If the resistance value of the resistor 4 is set as R, Ie≈Ic = Since Io, Ve ≈ RIo (1) If the gain of the operational amplifier 2 is A, its output voltage is (V
r-Ve) A. On the other hand, the base voltage is Vbe + Ve
From the above, the following equation is obtained.

(Vr-Ve) A = Vbe + Ve (2) If the equation (1) is substituted, (Vr-RIo) A≈Vbe + RIo VrA-Vbe≈RIo (A + 1) ∴Io ≈ (VrA−Vbe) / R (A + 1) = (Vr−Vbe / A) R (1 + 1 / A) Since the gain A is extremely large, Io≈Vr / R ……………… (3) and the output current Io Is a constant current proportional to the reference voltage Vr. Further, according to the equation (3), the two input voltages Vr and Ve (≈RIo) of the operational amplifier 2 are equal to each other.

The Zener voltage of the Zener diode 5 is set to V
If z, Vz ≧ Vbe + Ve = Vbe + RIo∴Io ≦ (Vz−Vbe) / R (4) Therefore, the output current Io is limited by the Zener voltage Vz. The voltage applied to the base is the Zener voltage Vz.
Never exceeds. Thus, the Zener diode 5 is used to protect the transistor 3.

Next, the reference voltage generating circuit 2 will be described.
The digital value Ir (D) of the reference current corresponding to the output current Io of the constant current circuit 1 and the digital value I ₁ (D) of the first offset current are input to the digital adder circuit 7. Reference current I
r (D) takes a value of 0 to Irmax (D). The first offset current I ₁ (D) ranges from 0 to a value slightly larger than Irmax (D) / 2. Output of digital adder circuit 7 I ₇ = I
r (D) + I ₁ (D) is input to the D / A converter 8, converted into an analog value I ₈ = Ir + I ₁ and input to the analog subtraction circuit 9, and the second offset current value (analog value) I Only _{2 is} subtracted and the current value I ₉ is output.

I ₉ = Ir + I ₁ −I ₂ (5) The second offset current value I ₂ is set to I ₂ ≈Ir max / 2 (6). As will be described later, since I ₁ is initially set to I ₁ ≈I ₂ (7) in the steady state, I ₉ ≈Ir (8).

The output I ₉ ≉Ir of the analog subtraction circuit 9 is input to the gain adjuster 10 and multiplied by k≅R to obtain Vr = KI ₉ ≉kIr ≉RIr ............ The reference voltage Vr represented by (9) is obtained. Equation (9) and (3)
As is clear by comparing the equations, Ir ≈ Io (10).

In a constant current circuit such as an IC tester, the reference current is
If Ir is set to 0mA, the output current Io will also be 0mA.
Zero point adjustment (offset adjustment or initialization
It is also called). Next, the method will be described.
The reference current Ir is set to 0. Second offset current I₂
Is expressed by the equation (6), I₂Set to a fixed value of ≈ Ir max / 2
Is defined. First offset current I₁Is shown in Figure 3.
Io gradually increases from 0 to point P, Io = 0
Then I from point P₁If Io increases according to
1 offset current I₁Is the value I at point P _1PDefault to
I do. At the point P, the output current Io is as close to zero as possible
If it flows out, the operational amplifier 2 and the transistor 3 are used.
Due to the negative feedback control, Vr = Ve≈0, and thus V
r = kI₉≈0. Therefore, I₉= I_1P-I₂≒ 0 ∴I_1P≒ I₂ …………… (11)

[0010]

In normal operation, Io
Since ≈Ir ≧ 0 is set and the voltage at the output terminal of the operational amplifier 2 is always zero or a positive value, the power source on the negative side of the operational amplifier 2 should have a small capacity enough to bias the operational amplifier 2. It is enough. Next, consider a case where the IC tester or the like has just been powered on and the zero point adjustment has not yet been performed in the initialization. It is assumed that Ir = 0 is set. The second offset current I ₂ is I ₂ ≈Ir
It is fixed at max / 2. Since the zero point adjustment has not been performed yet on the first offset current I _1, it is not known what the value is, but it is a value smaller than I _{2 with} a probability of about ½. Thus the reference voltage _{Vr = kI 9 = k (I} 1 -I 2)
Is negative with a probability of about 1/2. Therefore, the output voltage (Vr-Ve) A of the operational amplifier 2 also becomes negative and the transistor is cut off. As a result, since the negative feedback control is not performed, the operational amplifier 2 saturates and tries to output the maximum negative voltage approximately equal to the power supply voltage -Vp. Then
A forward voltage is applied to the Zener diode 5, and a large current flows through the path of the common potential point → Zener diode 5 → Operational amplifier 2 → Negative power supply (−Vp). Therefore, a large capacity negative power supply is required.

An object of the present invention is to prevent an abnormally large current from flowing in the positive and negative power supplies of the operational amplifier even when the polarity of the reference voltage Vr is reversed from that in the normal state before offset adjustment (initialization). In this way, the power supply capacity is reduced.

[0012]

A reference voltage is applied to a non-inverting input terminal of an operational amplifier, an output terminal of the operational amplifier is connected to a base of an output transistor, and an emitter of the transistor is connected to an inverting input terminal of the operational amplifier. A constant current circuit that is connected and connected to a common potential point via a resistor, the base is connected to the common potential point via a constant voltage threshold element, and the collector is connected to the power supply via a load impedance. In the present invention, the diode is inserted between the output terminal of the operational amplifier and the base of the transistor in the direction in which the base current flows.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention is shown in FIG. 1A with the same reference numerals attached to the portions corresponding to those in FIG. In this invention, before initialization,
The reference voltage V _r becomes negative in the opposite state to the normal state, and the voltage at the output terminal of the operational amplifier 2 becomes negative due to this. In order to prevent the current from flowing, the diode 11 is inserted between the output terminal of the operational amplifier 2 and the base of the transistor 3 in the direction in which the base current flows. The diode 11 has no adverse effect during normal operation in which the reference voltage Vr is positive.

In the above description, the transistor 3 is np.
Although the n type is used to absorb the output current Io from the collector, the present invention is not limited to this case, and it is obvious that the present invention can be applied to the case where the transistor 3 discharges the output current Io as shown in FIG. 1B. However, in that case, the transistor 3 is of a pnp type and is connected to the negative power source (-V) via the load impedance 6. The reference voltage Vr and the emitter voltage Ve are negative. Since the diode 11 is inserted in the direction in which the base current flows,
The direction is opposite to A. The direction of the Zener diode 5 is also reversed.

In the case of FIG. 1B, when the reference voltage Vr, that is, the voltage of the output terminal of the operational amplifier 2 becomes positive before the initialization, the transistor 3 is cut off, and the positive power supply (+ V _P ) → the operational amplifier. 2 → Zener diode 5 → The large power source flowing to the common potential point is blocked by the diode 11.

[0016]

EFFECTS OF THE INVENTION When the polarity of the reference voltage Vr is opposite to the polarity during normal operation before initialization and a voltage of a polarity that cuts off the transistor 3 is generated at the output of the operational amplifier 2, a common potential point → Zener diode 5 → operational amplifier 2 → path or positive supply of the negative power source _{(-V P) (+ V P} ) → operational amplifier 2 → the zener diode 5 → common potential point diodes a large current flows through a path added in the present invention 11 Can be stopped by. Therefore, the negative or positive power source of the operational amplifier can be miniaturized and made economical so as to have a small capacity to give a bias current to the operational amplifier.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a conventional constant current circuit together with a reference voltage generation circuit.

FIG. 3 is a graph showing a relationship between an output current Io and a first offset current I _{1 at} the time of zero point adjustment shown in FIG.

Claims (1)

[Claims] 1. A reference voltage is applied to a non-inverting input terminal of an operational amplifier, an output terminal of the operational amplifier is connected to a base of an output transistor, and an emitter of the transistor is connected to an inverting input terminal of the operational amplifier. A constant current circuit connected to a common potential point via a resistor, a base connected to a common potential point via a constant voltage threshold element, and a collector connected to a power source via a load impedance, A constant current circuit in which a diode is inserted between an output terminal of the operational amplifier and the base of the transistor in a direction in which a base current flows.