JPH0950419A - Information processor for discriminating connection equipment of expanded slot - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an automatic connection equipment discrimination device capable of minimizing the increase of the number of control signal lines and being easily made into LSI at a low cost in the case of automatically discriminating an inserted board and performing a processing corresponding to the board in an information processor in which the plural boards are inserted to a slot. SOLUTION: On the board, a storage part 11 for storing identification information, an output part 12 for wired-OR-outputting the discriminating information on a data bus in response to discriminating information request signals from a central processing part 16, a comparison part 14 for comparing the discriminating information stored by the storage part 11 with the discriminating information turned valid on the data bus and a control part 15 for inhibiting the output of the information at the time of next and succeeding discriminating information output requests when the two pieces of the discriminating information match with each other as the result of comparison are added. Thus, the number of discrimination information request signal lines are turned to one and a circuit scale is suppressed to a small scale.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus for identifying the type of a board or a card (hereinafter, simply referred to as a board without distinguishing the board and the card) inserted in an expansion slot or a card slot of the information processing apparatus. Regarding

[0002]

2. Description of the Related Art In recent years, with the expansion of the field of use of computers, there are increasing usage patterns in which memory boards, communication boards, interface boards for connecting external devices, etc. are mounted in expansion slots. In this case, the information processing device needs to perform processing according to the board mounted in the slot.

In an information processing apparatus such as a conventional personal computer, a user sets driver software that supports a board in a slot to perform processing according to various boards inserted in an expansion slot (expansion slot). It was This driver software setting is
It is difficult for general users because it is necessary to describe that in a file that represents the environmental information of the information processing device.
Therefore, it has been desired to automatically identify the board type.

In the conventional personal computer, since the same signal line (expansion slot bus) is connected to every expansion slot, it is difficult to identify the board type.
For such a conventional information processing apparatus, it is considered that the board type can be identified by adding a signal line for identifying the board type for each slot in the expansion slot bus, for example.

FIG. 10 is a block diagram showing the configuration of an information processing apparatus assumed in this case. In the figure, each broken line portion shows the board mounted in the expansion slot. Each board includes an identification information storage unit 101 and an identification information output unit 10.
2. The identification information recognition control unit 103 is added. Further, the identification information request signals 1 to 3 are individually wired from the central processing unit 104 to the slots 1 to 3.

The identification information storage unit 101 stores the identification information output to the data bus through the identification information output unit 102. The identification information output unit 102 includes the identification information recognition control unit 1
In response to the identification information output control signal from 03, the identification information stored in the identification information storage unit 101 is output to the data bus.

The identification information recognition control section 103 outputs an identification information output control signal to the identification information output section 102 in response to the output of the identification information request signals 1 to 3 from the central processing section 104. The operation of the device configured as described above will be described below. The identification information request signals 1 to 3 output from the central processing unit 104 are input to the identification information recognition control unit 103. Correspondingly, the identification information recognition control unit 103
Outputs an identification information output control signal to the identification information output unit 102. As a result, the identification information stored in the identification information storage unit 101 is output from the identification information output unit 102 to the data bus.

Recently, a PCMCIA card (PC
In the Card Standard (standard), an automatic identification method is adopted. In this method, each PC
The MCIA card holds various information called attribute information in the internal ROM. This attribute information includes information indicating the type of card. An address space (attribute memory space) for reading out this attribute information is assigned to each card slot in advance. The central processing unit of the information processing device can identify the card type by reading the attribute information for each slot.

[0009]

However, in the apparatus of FIG. 10, it is necessary to generate an individual identification information request signal for each slot, and as the number of connected devices increases, a control signal for the expansion slot bus is generated. There was a problem that it would lead to an increase in the number of lines. This causes a problem that the central processing unit 104 causes an increase in cost due to an increase in the number of pins of the LSI package when the expansion slot interface circuit is formed into an LSI.

The PCMCIA system has a problem that the use of a ROM for storing the attribute information of the connected device causes a cost increase. Further, since the address space for reading the attribute information is fixedly assigned to each slot in advance, there is a problem that there is a memory limitation. In view of the above problems, the present invention suppresses an increase in the number of control signal lines, simplifies the circuit on the board side,
It is an object of the present invention to provide a connected device automatic identification apparatus that can be easily integrated into a LSI at low cost.

[0011]

In order to solve the above problems, the invention of claim 1 provides a slot bus provided for each slot and including a data bus and one identification information request signal line, Connection means for connecting to the connection device, request means for repeatedly outputting the identification information request signal, and identification information output from the connection device via the data bus in response to each output of the identification information request signal. Recognizing and recognizing means is provided, and each connected device has a storage means for storing identification information for each connected device, and in response to an identification information request signal, the identification information stored in the storage means is wired onto a data bus. .When the output means for OR output, the identification information valid on the data bus, and the identification information stored in the storage means are compared with each other, and as a result of the comparison, the two identification information match. To , And a prohibiting means for prohibiting the output of the output means against the next and subsequent identification information request signal, for the identification information allocates as specific identification information when a collision on the data bus is valid.

Further, the invention of claim 2 is provided for each slot, and has a data bus, one identification information request signal line,
A connection means for connecting a slot bus including a position signal line indicating the position of the slot to a connection device, a request means for repeatedly outputting an identification information request signal, and a response means for each output of the identification information request signal. And a recognition means for recognizing the positional information and the identification information output from the connected device via the data bus, and each connected device stores the identification information for each connected device, and responds to the identification information request signal. do it,
First output means for wired or output the value of the position signal obtained from the slot bus as position information on the data bus, and second output means for outputting the identification information stored in the storage means on the data bus, If the position information that is valid on the data bus and the position information obtained from the slot bus are compared with each other, and if the result of the comparison is that the two position information match, the identification information is sent to the second output means. And the control means for prohibiting the output of the first output means in response to the identification information request signal from the next time onward, and regarding the respective position information, specific position information is effective in the case of a collision on the data bus. Allocate so that

[0013]

With the above means, in the information processing apparatus according to the first aspect, the output means of each connected device outputs the identification information in the wired or OR manner in response to the identification information request signal. On the data bus, the output multiple identification information
As a result of being ORed, one of the identification information becomes valid on the data bus. The recognition means recognizes this effective identification information.
The comparison means compares the identification information valid on the data bus with the identification information stored in the storage means.
As a result of the comparison, the prohibiting unit prohibits the output of the output unit in response to the identification information request signal from the next time onward when the two identification information match. As a result, since the identification information identified by the recognition means is not output thereafter, the recognition means recognizes the identification information one by one each time the identification information request signal is output.

In the information processing apparatus according to the second aspect of the present invention, the first output means of each connection device outputs the value of the position signal obtained from the slot bus as the position information in a wired or output in response to the identification information request signal. On the data bus, a plurality of output positional information are wired-or, so that one of the positional information becomes valid on the data bus. The recognition means recognizes this effective position information. The comparing means compares the position information valid on the data bus with the position information obtained from the slot bus. The control means outputs the identification information stored in the storage means onto the data bus by the second output means when the two position information match as a result of the comparison, and responds to the identification information request signal from the next time onward. The output of the first output means is prohibited. As a result, since the position information identified by the recognition means is not output thereafter, the recognition means recognizes the identification information one by one each time the identification information request signal is output.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram showing the configuration of the main part of an information processing apparatus for automatically identifying a connected device in an embodiment of the present invention. In the figure, each broken line portion shows a board mounted in the expansion slot or the card slot. Each board is connected to the central processing unit 16 through an expansion slot bus. The expansion slot bus has an identification information request signal wired in common to all slots.

An identification information storage unit 11, an identification information output unit 12, an identification information input unit 13, an identification information comparison unit 14, and an identification information recognition control unit 15 are added to each board. The identification information storage unit 11 stores identification information for identifying the board. FIG. 4 shows an example of bit allocation of identification information for each board. As shown in the figure, each identification information is
It is assigned so that only specific identification information becomes valid when it is ORed. However, in order to recognize that there is no device to be identified, all bits of "1" are not used as identification information.

The identification information output unit 12 outputs the identification information stored in the identification information storage unit 11 to the data bus in response to the identification information output control signal from the identification information recognition control unit 15. Since the output of the identification information output unit 12 is wired-OR with the output from another board on the data bus of the expansion slot, only specific identification information is valid on the data bus. For example, "0000", "0001", "00"
When "11" and "0111" are output, "000"
When "0" is valid and "0011" and "0111" are output, "0011" is valid.

The identification information input unit 13 inputs the identification information valid on the data bus to the identification information comparison unit 14. The identification information comparison unit 14 compares the identification information stored in the identification information storage unit 11 with the identification information input from the identification information input unit 13, and indicates whether or not they match the identification information recognition control unit 15. Output a match signal.

The identification information recognition control unit 15 includes a central processing unit 16
When the identification information request signal from is input, the identification information output control signal is validated. Further, when the identification information stored in the identification information storage unit 11 and the identification information input from the identification information input unit 13 match by the coincidence signal, the identification information output unit 12 outputs the identification information thereafter. Controls not to output.

The central processing unit 16 internally holds a table for acquiring the attribute information of the board from the identification information, and when the identification information request signal is output, the identification information that is valid on the data bus is stored. Recognize and perform necessary processing for each board. FIG. 4 is an example of a table of board identification information. FIG. 2 shows the identification information storage unit 1.
1 is an example of a specific circuit diagram of an identification information output unit 12, an identification information input unit 13, an identification information comparison unit 14, and an identification information recognition control unit 15.

Reference numeral 201 is an identification information request signal from the central processing unit 16. This signal is valid when it is at a low level. 202 is a coincidence signal. Reference numeral 204 is an identification information output control signal. 205 is an output signal of identification information. The identification information storage unit 11 is composed of a switch and a resistor. Information "0" is stored when the switch is on, and information "1" is stored when the switch is off. In the figure, since all the switches are closed, 4-bit identification information "0000" is stored here.

The identification information output unit 12 is an open collector output so that when the identification information output unit of another board outputs the identification information and a collision occurs on the data bus, only the specific identification information becomes valid. Identification information input unit 13
Is a 4-bit bus receiver, and when the identification information request signal 201 is output, the identification information that is valid on the data bus is input to the identification information comparison unit 14.

The identification information comparing unit 14 is an identification information storage unit 1.
The identification information stored in No. 1 is compared with the identification information input by the identification information input unit 13 and valid on the data bus, and a match signal that becomes high level when the two pieces of identification information match. 202 is output. The identification information recognition control unit 15 includes a JK-flip-flop 26 and an OR circuit 27. In the text, the output of the JK-flip-flop is represented by Q and Q (N). When the output of Q (N) is low level, the OR circuit 27 outputs it as it is when the identification information request signal 201 becomes effective, but when the output of Q (N) is high level, it outputs it. Do not do. The identification information recognition control unit 15 inputs the identification information request signal 201 and the coincidence signal 202, outputs the identification information output control signal 204, and controls the identification information output unit 12.

FIG. 3 is a flowchart showing the processing of the central processing unit 16. In step 301, 0 is assigned to the counter i. In step 302, the central processing unit 16 outputs the identification information request signal 201. At step 303, the valid identification information on the data bus is recognized, and it is determined whether or not all the signals are "1". If all the signals are "1", it means that the identification information of all the boards connected to the slot has been acquired.
Proceed to step 306. If it contains a signal of "0",
The identification information obtained in step 304 is held in the memory, after which 1 is added to the counter i in step 305 and the process proceeds to step 302 again.

At step 306, 1 is assigned to the counter n and 0 is assigned to the counter m. In step 307, the table of the identification information of the board held by the central processing unit 16 is referred to, whether the identification information of the nth board on the table exists, and the identification information of the connected board is held. To search the memory that was saved. If it exists, the driver corresponding to the n-th board is installed in step 308, 1 is added to the counter m in step 309, and the process proceeds to step 310. If the identification information of the nth board on the table does not exist in step 307, the process directly proceeds from step 307 to step 310.

At step 310, the value of the counter m and
Compare with the value of the counter i. If they are different, in step 311, the counter n is incremented by 1 and then step 30
Return to 7. If they are equal, it means that the driver assembling work for all the boards connected to the slots is completed, and thus the processing of the central processing unit 16 is completed.

The operation of the information processing apparatus configured as described above will be described below with reference to FIGS. 1 and 2.
Note that FIG. 5 is a summary of the signal lines generated in this embodiment. In the identification information storage unit 11 of each board, switches are connected so that "0000" is stored in the board 1, "0001" is stored in the board 2, and "0011" is stored in the board 3.

Corresponding to the identification information request signal 201 first output from the central processing unit 16, the identification information output control signal 204 of each board is Q of the JK-flip-flop 26.
The output 203 of (N) is at a low level (Fig. 5-c,
g), so it becomes low level (FIGS. 5D and 5H) (JK-flip-flop 26 is preset when power is turned on or reset, and Q side is high level output and Q (N) side is low level output). . As a result, the identification information output unit 12 of each board outputs the identification information stored in the identification information storage unit 11 onto the data bus (FIGS. 5E and 5I).

On the data bus, the identification information "0000", "0001", "001" output by the open collector.
1 "collides and the identification information of" 0000 "becomes valid. The identification information input unit 13 inputs the identification information from the data bus and compares it with the identification information stored in the identification information storage unit 11 in the identification information comparison unit 14. The stored identification information matches the input identification information on the board 1. As a result, the coincidence signal 202 of the board 1 becomes high level (FIG. 5B), and the identification information request signal 201 rises. J
The output 203 of Q (N) of the K-flip-flop 26 becomes high level (FIG. 5C). After that, the identification information output control signal 204 of the board 1 is kept at the high level (FIG. 5D), and thereafter, even if the identification information request signal 201 is output from the central processing unit 16, the identification information output unit 12 outputs it. Of the identification information signal 205 of FIG.
e).

Regarding the boards 2 and 3, since the identification information did not match when the identification information request signal was generated last time, the output 2 of the Q (N) of each JK-flip-flop 26 is changed.
03 remains at the low level (FIG. 5G), so that the identification information is output to the data bus when the next identification information request signal is generated (FIGS. 5H and i). As a result, the identification information stored in the identification information storage unit 11 and the identification information input from the identification information input unit 13 match only in the board 2 (FIG. 5F). As a result, the board 2 does not output the identification information when the identification information request signal 201 is output from the central processing unit 16 from the next time onward.

By repeating the above operation, the central processing unit 16 can finally obtain the identification information from all the boards. After that, the central processing unit 16 acquires the attribute information from the identification information of the inserted board according to the flowchart of FIG. Although the number of slots is 3 and the identification information is 4 bits in this embodiment, the number may be changed.

FIG. 6 is a block diagram showing the configuration of the main part of an information processing apparatus for automatically identifying a connected device in the second embodiment of the present invention. In the figure, each broken line portion shows a board mounted in the expansion slot or the card slot. Each board is connected to the central processing unit 68 through an expansion slot bus. The expansion slot bus has an identification information request signal wired in common to all slots. Also,
A position signal peculiar to the slot is wired in the connector portion for each slot. FIG. 9 shows an example of bit allocation of a unique position signal value for each slot. The bit configuration of the value of the position signal is similar to the identification information in the first embodiment,
It is assigned so that only specific position information becomes valid when wired or output is performed as position information. However, in order to recognize the case where there is no remaining slot to be identified, all bits of "1" are not used as position signals.

A position information output unit 62, a position information input unit 63, a position information comparison unit 64, an identification information recognition control unit 65, an identification information storage unit 66, and an identification information output unit 67 are added to each board. The position information output unit 62 outputs the value of the position signal peculiar to each slot as the position information to the lower 4 bits of the data bus in response to the position information output control signal from the identification information recognition control unit 65. The output of the position information output unit 62 is
Since the output from other boards is wired or on the data bus of the expansion slot, only specific position information is valid on the data bus.

The position information input unit 63 is the lower 4 of the data bus.
The position information valid on the bit is input to the position information comparison unit 64. The position information comparison unit 64 compares the position information unique to each slot with the position information input from the position information input unit 63, and outputs a match signal indicating whether or not there is a match to the identification information recognition control unit 65.

The identification information recognition control unit 65 is a central processing unit 68.
When the identification information request signal from is input, the position information output control signal is validated. Further, when the position information of each slot matches the position information input from the position information input unit 63 by the match signal, control is performed so that the position information output unit 62 does not output the position information thereafter. The identification information storage unit 66 stores identification information for identifying the board.

When the position information of each slot and the position information input from the position information input unit 63 match with each other by the coincidence signal, the identification information output unit 67 outputs the identification information storage unit 6
The identification information stored in 6 is output to the upper 4 bits of the data bus. The central processing unit 68 internally holds a table for acquiring the board attribute information from the identification information, and recognizes the identification information output to the upper 4 bits of the data bus when the identification information request signal is output. And perform necessary processing for the board.

FIG. 7 shows the position information output unit 62, the position information input unit 63, the position information comparison unit 64, and the identification information recognition control unit 6.
5 is an example of a specific circuit diagram of an identification information storage unit 66 and an identification information output unit 67. Reference numeral 701 is an identification information request signal from the central processing unit. This signal is valid when it is at a low level. 702 is a coincidence signal. 704 is a position information output control signal. Reference numeral 705 is an output signal of position information. Reference numeral 706 is an output signal of identification information.

The position information output unit 62 is an open collector output so that when the position information is output from the position information output unit of another board and a collision occurs on the data bus, only the specific position information becomes valid. The position information input unit 63 is a 4-bit bus receiver, and the identification information request signal 70
When 1 is output, the position information valid on the data bus is input to the position information comparison unit 64.

The position information comparing unit 64 receives the position information unique to each slot and the position information input unit 63.
Compare with the location information that is valid on the data bus,
When the two pieces of position information match each other, a match signal 702 that becomes high level is output. The identification information recognition control unit 65 uses JK-
It is composed of a flip-flop 78 and an OR circuit 79. When the output of Q (N) is low level, the OR circuit 79 outputs it as it is when the identification information request signal 701 becomes valid, but when the output of Q (N) is high level, it outputs it. Do not do. The identification information recognition control unit 65 inputs the identification information request signal 701 and the coincidence signal 702, outputs the position information output control signal 704, and outputs the position information output unit 6
2 is performed.

The identification information storage unit 66 is composed of a switch and a resistor. Information "0" is stored when the switch is on, and information "1" is stored when the switch is off. In the figure, all the switches are closed, so
4-bit identification information "0000" is stored here. When the coincidence signal 702 is at the high level, the identification information output unit 67 outputs the identification information stored in the identification information storage unit 66 to the upper 4 bits of the data bus.

FIG. 8 is a flow chart showing the processing of the central processing unit 68. In step 801, the central processing unit 68
Outputs an identification information request signal 701 to each board. In step 802, the valid position information on the lower 4 bits of the data bus is recognized, and it is determined whether or not all the signals are "1". If all the signals are "1", it means that the processing has been completed for all the slots, and thus the processing of the central processing unit 68 is finished. If new position information is obtained, the process proceeds to step 803, and the identification information of the board connected to the slot corresponding to the new position information is read. Step 804
Then, the board identification information table is searched to obtain the attribute information of the connected board. After that, the driver is installed in step 805, and the process returns to step 801.

The operation of the information processing apparatus configured as described above will be described below with reference to FIGS. 6 and 7.
In the connector portion of each slot, the value of the position signal is "0000" for board 1 and "000" for board 2.
1 ”, and“ 0011 ”is wired on the board 3. The identification information request signal 7 first output from the central processing unit 68.
01 corresponding to the position information output control signal 704 of each board
Is the output 70 of the Q (N) of the JK-flip-flop 78.
Since 3 is a low level, it becomes a low level (the JK-flip-flop 78 is preset when the power is turned on or reset, and the Q side is a high level output and the Q (N) side is a low level output). As a result, the position information output unit 62 of each board outputs the value of the position signal unique to each slot as position information on the lower 4 bits of the data bus.

On the data bus, the position information "0000", "0001", "001" output by the open collector is output.
1 "collides and the position information of" 0000 "becomes valid. The position information input unit 63 inputs the position information from the data bus, and the position information comparison unit 64 compares it with the value of the position signal unique to each slot. On board 1, the value of the position signal unique to the slot matches the position information input from the lower 4 bits of the data bus, and as a result, the match signal 7 on board 1
02 becomes high level, and the output 703 of Q (N) of the JK-flip-flop 78 becomes high level when the identification information request signal 701 rises. After that, the position information output control signal 704 of the board 1 is kept at the high level, and thereafter, the identification information request signal 7 from the central processing unit 68.
Even if 01 is output, the position information signal 705 is not output from the position information output unit 62.

The identification information output unit 67 of the board 1 recognizes that the position information matches by the match signal, and outputs the identification information stored in the identification information storage unit 66 to the upper 4 bits of the data bus. Regarding the boards 2 and 3, since the position information did not match when the identification signal request signal was generated last time, the output 703 of Q (N) of each JK-flip-flop 78 remains at the low level, and therefore the next identification is performed. The position information is output to the data bus even when the information request signal is generated. As a result, the position information unique to the slot and the position information input from the position information input unit 63 match only in the board 2. As a result, the board 2 outputs the identification information to the upper 4 bits of the data bus and does not output the position information when the identification information request signal 701 is output from the central processing unit 68 from the next time onward.

By repeating the above operation, the central processing unit 68 can finally obtain the identification information from all the boards. After that, the central processing unit 68 acquires the attribute information from the identification information of the inserted board according to the flowchart of FIG. Although the number of slots is 3 and the position information and the identification information are 4 bits in the present embodiment, the numbers may be changed.

In the first and second embodiments, the output system of the identification information output unit 12 and the position information output unit 62 is an open collector. However, if the output collision is determined uniquely, The output method does not need to be an open collector. Further, the bit configuration of the identification information and the position information may be a configuration other than the above, as long as the specific identification information is valid when the bits collide.

[0047]

According to the first aspect of the present invention, since the number of identification information request signals for the expansion slot bus is one, the increase in the number of pins of the expansion slot interface portion on the information processing apparatus main body side can be minimized. Therefore, there is an effect that the package can be downsized and the cost can be reduced when the LSI is implemented.

Further, in the information processing apparatus of the present invention, the ROM for holding the attribute information is unnecessary in each expansion device,
It is sufficient to provide a simple logic circuit, and the cost can be reduced. According to the invention of claim 2, in addition to the effect of the invention of claim 1, since it is possible to recognize the expansion device connected for each position of the expansion slot, when a plurality of expansion devices of the same type are connected. Can also be dealt with.

[Brief description of drawings]

FIG. 1 is a block diagram of an information processing apparatus according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a portion added to a board in the information processing apparatus according to the first embodiment of the present invention.

FIG. 3 is a flowchart showing the processing of the central processing unit in the first embodiment of the present invention.

FIG. 4 is an example of a table of identification information and attribute information for each board.

FIG. 5 is a summary of signal lines found in the information processing apparatus according to the first embodiment of the present invention.

FIG. 6 is a block diagram of an information processing device according to a second embodiment of the present invention.

FIG. 7 is a circuit diagram of a portion added to a board in the information processing apparatus according to the second embodiment of the present invention.

FIG. 8 is a flowchart showing the processing of the central processing unit in the second embodiment of the present invention.

FIG. 9 is an example of a bit configuration of a position signal value for each slot.

FIG. 10 is a block diagram of a method considered as a method for obtaining identification information for recognizing a board.

[Explanation of symbols]

 11 identification information storage unit 12 identification information output unit 13 identification information input unit 14 identification information comparison unit 15 identification information recognition control unit 26 JK-flip-flop 27 OR circuit 201 identification information request signal 202 coincidence signal 204 identification information output control signal 205 Identification information output signal 62 Position information output unit 63 Position information input unit 64 Position information comparison unit 65 Identification information recognition control unit 66 Identification information storage unit 67 Identification information output unit 78 JK-flip-flop 79 Logical sum circuit 701 Identification information request signal 702 Match signal 704 Position information output control signal 705 Position information output signal 706 Identification information output signal

Claims (2)

[Claims] 1. An information processing apparatus having a plurality of slots and for identifying connected devices connected to the slots, the information processing apparatus being provided for each slot, and including a data bus and one identification information request signal line. Connecting means for connecting the slot bus to the connecting device, requesting means for repeatedly outputting the identification information request signal, and every time the identifying information request signal is output, in response to this, the connecting device outputs it via the data bus. Each connected device has a recognition means for recognizing the identification information, and each connected device stores the identification information for each connected device and the identification information stored in the storage device in response to the identification information request signal. Output means for wired or output above, comparison means for comparing the identification information valid on the data bus with the identification information stored in the storage means, and as a result of the comparison, When the different information matches, the prohibition means for prohibiting the output of the output means for the next and subsequent identification information request signals is provided, and the identification information is the specific identification information when a collision occurs on the data bus. An information processing device, which is allocated so as to be effective. 2. An information processing apparatus having a plurality of slots and for identifying connected devices connected to the slots, wherein each information processing apparatus is provided for each slot, and has a data bus and one identification information request signal line. Connecting means for connecting the slot bus including the position signal line indicating the position of the slot to the connecting device, requesting means for repeatedly outputting the identification information request signal, and responding to each output of the identification information request signal The connected device comprises a recognition means for recognizing the position information and the identification information output from the connected device via the data bus, and each connected device stores the identification information for each connected device and responds to the identification information request signal. The position information obtained from the slot bus as position information for wired or OR output on the data bus, and the identification information stored in the storage means on the data bus. The second output means for outputting, the comparing means for comparing the position information valid on the data bus with the position information obtained from the slot bus, and when the result of the comparison shows that the two position information match each other. , And a control means for causing the second output means to output the identification information and prohibiting the output of the first output means in response to the identification information request signal from the next time onward, wherein each of the position information has a collision on the data bus. An information processing device, characterized in that specific position information is assigned to the device so that it is effective.