JPH0946139A - Distortion fluctuation suppression amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain accurate measurement at an ultralow distortion factor by amplifying a signal from a circuit whose output impedance is changed while distortion fluctuation is accurately suppressed. SOLUTION: An input signal Sin is adjusted by a variable resistor VR and when an output impedance is increased, an offset voltage of an operational amplifier 13a is amplified, outputted as an inverted output signal Sout and an integration signal Sc integrated by an integration device 15 is outputted to an inverting input terminal of the operational amplifier 13a and the gain is decreased. When the output impedance is reduced by the adjustment of the variable resistor VR, the operation is reverse to above. As a result, the gain of the operational amplifier 13a is closed-loop-controlled corresponding to a change in the output impedance attended with the adjustment of the variable resistor VR and an offset voltage of the output terminal is kept constant and an output signal Sout without fluctuation in the offset voltage is obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to an electronic measuring instrument or the like which requires amplification at an extremely low distortion factor, and suppresses distortion fluctuation of a signal from a circuit whose output impedance changes to perform distortion. The present invention relates to a fluctuation suppression amplifier.

[0002]

2. Description of the Related Art FIG. 3 is a block diagram showing a configuration of a conventional amplifier. In FIG. 3, in this example, an input signal Sin is input through a coupling capacitor C, a variable resistor or the like performs level adjustment, and an impedance change circuit 2 whose output impedance changes, and the impedance change circuit 2 performs level adjustment. Input signal Sin
An amplifier 3 that outputs an output signal Sout that is amplified α times
And

Next, the operation of this conventional configuration will be described. The input signal Sin is input to the impedance changing circuit 2 through the coupling capacitor C. Here, the level is adjusted by a variable resistor or the like, input to the amplifier 3, amplified, and output. Impedance change circuit 2
The output signal Sout obtained by amplifying the input signal Sin whose level has been adjusted by α times is transmitted.

As proposals for improving such an amplifier, Japanese Patent Application Laid-Open No. 2-105355, "Optical Magnetic Disk Device", Japanese Patent Application Laid-Open No. 2-134005, "DC Amplifier", Japanese Patent Application Laid-Open No. 3-108906, "Amplifying Circuit". It has been known.
Japanese Patent Application Laid-Open No. 2-134005 discloses a "DC amplifying device" which controls a gain by making a negative feedback signal in which a time constant is set in an input pulse signal into a DC amplifier. The "amplifier circuit" controls the amplification output of the bridge sensor by negatively feeding back the integrated signal of the error compared with the threshold value to make the amplification constant.

[0005]

However, in the former distortion fluctuation suppressing amplifying device in the above-mentioned conventional example, by the level adjustment by the variable resistor in the impedance changing circuit 2,
Since the output impedance changes, the input impedance of the amplifier 3 changes. Therefore, as the bias current of the amplifier 3 changes, an offset voltage is generated, which adversely affects the subsequent circuit. When the latter-stage circuit is an amplifier, its input saturation may occur, and when the output signal Sout is input to an electronic measuring instrument or the like which requires amplification at an ultra-low distortion rate, its distortion changes. Cannot be ignored, making it difficult to make accurate measurements.

In the latter Japanese Patent Laid-Open No. 2-134005, a time constant is set for the pulse signal.
It is not suitable for measuring instruments that measure the input signal in real time.
Further, in the example of Japanese Patent Application Laid-Open No. 3-108906, the error from the comparator is integrated and negative feedback is performed. Therefore, a comparator is required, and it is difficult to perform accurate amplification control due to its threshold value and operation fluctuation. Can be considered.

The present invention solves the problems in the prior art as described above. With a relatively simple structure, it is possible to accurately suppress and amplify the distortion variation of the signal from the circuit whose output impedance changes, It is an object of the present invention to provide an excellent distortion fluctuation suppressing amplification device that enables accurate measurement with an electronic measuring instrument or the like that requires amplification at an extremely low distortion rate.

[0008]

In order to achieve the above object, the distortion fluctuation suppressing amplifying device according to the invention of claim 1 processes the signal to output the input signal, and at the same time, a signal processing means for changing the output impedance. A variable amplification means for amplifying the output signal from the signal processing means to a constant value based on the input amplification control signal and outputting the same; and an integrated signal obtained by integrating the output amplification signal from the variable amplification means, to the variable amplification means. And an integrating means for outputting as an amplification control signal.

According to another aspect of the present invention, the distortion fluctuation suppressing amplifying device uses a differential amplifier as the variable amplifying means, and the input amplifying control signal from the integrating means is inputted to the differential amplifier and amplified to a constant value. Output.

In the distortion fluctuation suppressing amplifying device according to the third aspect, the output signal of this device is supplied to an electronic measuring instrument which requires amplification at an extremely low distortion rate.

[0011]

Therefore, according to the present invention, since the closed loop control for amplifying the output signal from the signal processing means whose output impedance changes to a constant value based on the input amplification control signal from the integrating means, the comparison is made. It is possible to accurately suppress distortion fluctuations with a simple structure, and to perform accurate measurement with an electronic measuring instrument or the like that requires amplification at an ultra-low distortion rate.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of the distortion fluctuation suppressing amplifying device of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing the configuration of an embodiment of the distortion fluctuation suppression amplifying device of the present invention. In FIG. 1, in this example, an attenuator 12 that adjusts the level of an input signal Sin input through a coupling capacitor C1 and the output impedance changes, and an input signal S whose level is adjusted by the attenuator 12 are shown.
An amplifier 13 for amplifying in by α times is provided.
Further, an inverter 14 that sends out an output signal Sout in which the polarity of the amplified signal from the amplifier 13 is inverted, and an integrator 15 that integrates the output signal Sout output from this inverter 14 and outputs the integrated signal Ss to the amplifier. have.

FIG. 2 is a circuit diagram showing in detail the block configuration of FIG. In FIG. 2, the attenuator 12 has an input signal Si
n is input through the coupling capacitor C1, the level of the input signal Sin is attenuated, and the output impedance of the variable resistor VR and the resistor R are changed.
One. In the amplifier 13, the input signal Sin output from the attenuator 12 is supplied to the non-inverting (+) input terminal, and the voltage is set to the inverting (-) input terminal to output the non-inverting amplified signal. Operational amplifier 1
It has resistors R2 and R3 that determine the input impedance and gain (α times) of 3a. In the inverter 14, the amplified signal from the amplifier 13 is inverted (-) through the resistor R4.
An operational amplifier 14a which is input to the input terminal and whose non-inverting (+) input terminal is grounded to output an inverted and amplified output signal Sout, and a resistor R4 which determines the input impedance and gain (α times) of the operational amplifier 14a. It has R5. The integrator 15 is an integrated signal obtained by integrating the output signal Sout with the output signal Sout output from the inverter 14 being input to the inverting (-) input terminal through the resistor R6 and the non-inverting (+) input terminal being grounded. (DC component)
Sc through the resistor R7 to the operational amplifier 13 of the amplifier 13
operational amplifier 15a which outputs to the inverting (-) input terminal of a
And a capacitor C2 for setting the cutoff frequency is provided between the inverting (-) input terminal and the output terminal.

Next, the operation of the configuration of this embodiment will be described. The input signal Sin is input to the attenuator 12 through the coupling capacitor C1, and the variable resistor VR is adjusted here, and the output level thereof is adjusted. When the output impedance is increased by this adjustment, the offset voltage of the operational amplifier 13a of the amplifier 13 is increased, and α times amplification is performed. This amplified signal is input to the operational amplifier 14a of the inverter 14 and outputs the output signal Sout whose phase is inverted. At the same time output signal Sou
t is also input to the integrator 15. In the integrator 15, the output signal Sout is input to the inversion (-) input terminal through the resistor R6, and the integrated signal (DC component) Sc obtained by integrating the output signal Sout is inverted (inverted) by the operational amplifier 13a of the amplifier 13 through the resistor R7 ( -) Output to the input terminal. The integrated signal Sc from the integrator 15 becomes a high level due to the amplification of the operational amplifier 13a of the amplifier 13 by α times, and the integrated signal Sc is input to the inverting (−) input terminal of the operational amplifier 13a of the amplifier 13. The amplification factor (gain) of the operational amplifier 13a of the amplifier 13 decreases.

On the contrary, when the output impedance is lowered by the adjustment of the variable resistor VR in the attenuator 12, the gain of the operational amplifier 13a of the amplifier 13 is lowered and the integrated signal Sc of the low level is fed to the amplifier 13. Since it is input to the inverting (-) input terminal of the operational amplifier 13a, the gain of the operational amplifier 13a of the amplifier 13 increases this time.

As described above, the gain of the operational amplifier 13a of the amplifier 13 is closed-loop controlled according to the change of the output impedance accompanying the adjustment of the variable resistor VR in the attenuator 12, and the offset voltage of the output terminal of the operational amplifier 13a is kept constant. You will be drunk.

By using this distortion fluctuation suppressing amplifier in an electronic measuring instrument or the like which requires amplification at an extremely low distortion rate,
Accurate measurement is possible. That is, in a measurement circuit that requires an extremely low distortion rate, if the variation in the offset voltage at the output terminal of the operational amplifier 13a is directly input to the amplification circuit of the measurement circuit, the optimum operating point will be changed. As a result, the measured value is distorted and causes a measurement error. However, the offset voltage of the output terminal of the operational amplifier 13a is kept constant, and the output signal Sout is input to the amplifier circuit of the measurement circuit. The problem will not occur.

In this embodiment, the attenuator 12 is used as the circuit whose output impedance changes, but
As long as the circuit outputs the input signal Sin and the output impedance thereof changes, the same operation can be performed in any configuration. A buffer may be used instead of the inverter 14. In this case, since the phase of the input signal Sin is not inverted, the circuit configuration corresponding to the polarity is performed.

Further, an arbitrary bias voltage is applied to the non-inverting (+) input terminal of the integrator 16 in FIG. 2, and the output signal Sou is output at a voltage corresponding to the added bias voltage.
It is also possible to set t. In this case, the output signal Sou
It becomes possible to cope with various circuit configurations in the latter stage of supplying t.

[0020]

As is apparent from the above description, according to the distortion fluctuation suppressing amplifying device of claims 1, 2 and 3, the output signal from the signal processing means whose output impedance changes is fed from the integrating means. Since the closed loop control that amplifies to a constant value based on the input amplification control signal is performed, distortion variation can be accurately suppressed and amplified with a relatively simple configuration, and the electronic that requires amplification at a very low distortion rate is particularly required. This has the effect of enabling accurate measurement with a measuring instrument or the like.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of a distortion fluctuation suppressing amplifier according to the present invention.

FIG. 2 is a circuit diagram showing in detail the block configuration shown in FIG.

FIG. 3 is a block diagram showing a configuration of a conventional amplifier.

[Explanation of symbols]

 12 attenuator 13 amplifier 13a to 15a operational amplifier 14 inverter 15 integrator C1 coupling capacitor C2 capacitors R1 to R7 resistor Sc integration signal Sin input signal Sout output signal VR variable resistor

Claims (3)

[Claims] 1. A signal processing means for processing and outputting an input signal, and an output impedance changing, and an output signal from the signal processing means is amplified to a constant value based on the input amplification control signal and then output. A distortion fluctuation suppressing amplification device comprising: a variable amplification means; and an integration means for outputting an integrated signal obtained by integrating an output amplification signal from the variable amplification means to the variable amplification means as an input amplification control signal. 2. A differential amplifier is used as the variable amplifying means, and an input amplification control signal from the integrating means is input to the differential amplifier and amplified to a constant value and output. The distortion fluctuation suppression amplification device according to 1. 3. A distortion fluctuation suppressing amplifier, wherein an output signal of the distortion fluctuation suppressing amplifier is supplied to an electronic measuring instrument which requires amplification at an extremely low distortion rate.