JPH0936619A - Rat race circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To omit a matching circuit to reduce the size by determining the characteristics impedance of a transmission line in accordance with values of (r) and (x) and determining the length of the transmission line between ports in accordance with values of (r), (x), and R. SOLUTION: A load of z=r+jx expressed by values of a standardized impedance is connected to first and second output ports. In this case, the length of the transmission line between first and second ports, that between second and fourth ports, that between fourth and third ports, and that between fourth and third ports are set to a value corresponding to a phase angle θ for the used frequency. The length of the transmission line from the first port to the third port is set to a value corresponding to a phase angle θ+πfor the used frequency. That is, the output impedance of ports 2 and 3 is zp=r+jx, and the length of the transmission line corresponds to the phase angle θ, and the characteristics impedance of the transmission line is R.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a rat race circuit,
In particular, the present invention relates to a rat race circuit when a load having an arbitrary impedance is connected to the output port.

[0002]

2. Description of the Related Art A rat race circuit that divides an input power in a microwave band into output powers having the same amplitude and opposite phase and outputs them is well known. FIG. 2 is a diagram showing a conventional rat race circuit. In the figure, 1, 2, 3, and 4 are first, second, third, and fourth ports, respectively, the first port 1 is used as an input port, and the second port 2 is used as a first output port. Used, the third port 3 is used as the second output port, and the fourth port 4 is used as the isolation port. In the conventional rattose circuit, impedance matching is performed so that reflection does not occur at each port.

This matching is performed by dividing the power from the port into two transmission lines or combining the power of the two transmission lines at the port when the input (output) impedance of each port is R ₀ Ω. Therefore, if the characteristic impedance of the transmission line is √2R ₀ , matching can be achieved. In the following calculation, for convenience, all impedances are standardized and expressed with respect to R _0, but in the case of FIG. 2, each port is terminated by the impedance of numerical value 1, and the characteristic impedance of the transmission line is √. It becomes 2.

The electric power input from the input port 1 is distributed to the upper transmission line and the lower transmission line, but the electric power of the upper transmission line is output from the first output port 2, and the electric power of the lower transmission line is output. Electric power is output from the second output port 3. A phase difference of π occurs between the propagation from the input port 1 to the first output port 2 and the propagation from the input port 1 to the second output port 3. In addition, since there is a phase difference of π between the route that goes up from the first port 1 to the fourth port 4 and the route that goes down from the first port 1 to the fourth port 4, And the lower propagation cancel each other at the port 4 and the isolation is maintained. In this way, the electric power input to the port 1 is distributed to the ports 2 and 3 and output with the same amplitude and opposite phase.

[0005]

Although the conventional rat race circuit is constructed as described above, the load connected to the ports 2 and 3 is often an FET and its input impedance is R ₀ . When standardized, r is generally
It is represented by + jx and is not 1. Therefore, in the conventional rat race circuit, it is necessary to provide a matching circuit between the output ports 2 and 3 and the FET of the load to convert the impedance of r + jx into 1. Therefore, the matching circuit needs to be provided. There was a problem that it could not be miniaturized.

The present invention has been made to solve the above problems, and an object thereof is to provide a rat race circuit which can be miniaturized by omitting a matching circuit.

[0007]

A rat race circuit according to the present invention determines the characteristic impedance of a transmission line from the values of r and x, and determines between ports 1-2, ports 2-4, and ports 4-3. It was decided to provide a rat race circuit that does not require a matching circuit by determining the length of the transmission line of 1 from the values of r, x, and R (characteristic impedance of the transmission line).

[0008]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below. FIG. 1 is a diagram for explaining the principle of the present invention. In FIG. 1, the same reference numerals as those in FIG. 2 indicate the same or corresponding parts. The difference between FIG. 1 and FIG. 2 is that in FIG.
3 has an output impedance of 1 (hereinafter, all impedances are shown as standardized values), whereas in FIG. 1, Zp = r + jx, and in FIG. 2, transmission corresponding to a phase angle of π / 2. The length of the transmission line corresponds to the phase angle θ in FIG. 1, and the characteristic impedance of the transmission line, which was √2 in FIG. 1, is R in FIG.

FIG. 3 shows an equivalent circuit of the circuit of FIG. FIG.
The matching condition of the circuit shown in (3) may be that the impedances when the rat race circuit is viewed from the port 1 and the port 4 are both real part 1 and imaginary part 0. The fact that the real part of impedance is 1 and the imaginary part is 0 means that the real part of admittance (which is a standard value) is 1 and the imaginary part is 0. F matrixes F1 and F2 of the two parallel circuits shown in FIG.
Is obtained, the following equations (1) and (2) are obtained.

[0010]

[Equation 1]

Further, since the synthesis of the parallel circuit is represented by the sum of the Y matrices, the Y matrix Y1-4 between the port 1 and the port 4 is obtained.
Is the following formula (3), and the impedance between port 1 and port 4 is the standardized impedance (= 1), and S
When converted into a matrix, the S matrix S1-4 between the ports 1-4 becomes the following expression (4). However, Y is a function represented by the following equation (5).

[0012]

[Equation 2]

In order for ports 1 and 4 to match, it is necessary that S11 = S44 = 0 in equation (4) above, which is achieved by Y = 1. In formula (5), Zp = r + jx: Z = R
If the real part of Y is 1 and the imaginary part is 0, (4r−R ² ) cos2θ + ² × Rsin2θ + R ² =
0 2xcos2θ + (1-r) Rsin2θ = 0 becomes, sin2θ = 2xR / {(1 -r) (4r-R 2) -4x 2} ··· Equation (6) cos2θ = (r- 1) R 2 / { obtain (1-r) to ^{(4r-R 2) -4x 2} } ··· (7).

From the relationship of cos ² 2θ + sin ² 2θ = 1, R = 2 {r (r-1) + x ² } / {2r (r
^{-1) 2 + (2r-1} ) x 2} 1/2 a (8). When x = 0, R = √2r: θ = π / 2, and when r = 1, the circuit of FIG. 1 becomes the circuit of FIG. 2 is expressed by the above equations (6), (7), It can be easily proved from (8).

Further, when the above equations (6), (7), and (8) are satisfied, it is equivalent to FIGS. 4 and 5 that the ports 2 and 3 have outputs of the same amplitude and opposite phase. It can be proved using a circuit. That is, the F matrices F131 and F132 of the two parallel circuits of FIG. 4 and the F matrices F121 and F122 of the two parallel circuits of FIG. 5 are as follows.

[0016]

(Equation 3)

Therefore, the entire F matrix F between ports 1-3 is
13 and the entire F matrix F12 between the ports 1-2 also becomes F12 = -F13. On the other hand, assuming that the power source impedance is Zs and the load impedance is Zl, the parameters a, b, c, d of the F matrix and the parameter S of the S matrix are set.
21 (S31 in the case of defining between ports 1-3) is expressed by the equation (9). S21 = 2√ (Zs / Zl) / [a + b / Zl + cZs + dZs / Zl] ... Equation (9) In S21 and S31, a, b, c,
Since the sign of d is inverted, the relationship between the transmission characteristic S31 between the ports 1-3 and the transmission characteristic S21 between the ports 1-2 is S21 = -S31 ... The output of the opposite phase is obtained.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 6 is a block diagram showing an embodiment of the present invention,
FIG. 1 shows the design values of θ and R when r = 2 and x = −0.4. FIG. 7 is a calculation result of the characteristics of the embodiment of FIG. 6 from the center frequency fo of 0.5 fo to 1.5 fo.
71 is the reflection characteristics S11 and S4 of the ports 1 and 4
4 and 72 is the reflection characteristic S of port 2 and port 3.
22 and S33, 73 indicates transmission characteristics S21 and S31 between ports 1-2 and ports 1-3, and 74 indicates isolation characteristics S41 and S32 between ports 1-4 and ports 2-3. .

In the embodiments and examples of the invention described above, the case where the rat race circuit is composed of the distributed constant circuit has been described, but the present invention can be applied to the case where the rat race circuit is composed of the lumped constant circuit. Needless to say.

[0020]

As described above, in the rat race circuit of the present invention, the matching circuit for matching the load can be omitted, so that the circuit can be downsized. In particular, M
In the MIC design, the chip area can be reduced, and the manufacturing cost can be reduced.

[Brief description of drawings]

FIG. 1 is a diagram for explaining the principle of the present invention.

FIG. 2 is a diagram showing a conventional rat race circuit.

3 is an equivalent circuit showing a transfer characteristic between a port 1 and a port 4 of the rat race circuit shown in FIG.

4 is an equivalent circuit showing a transfer characteristic between a port 1 and a port 3 of the rat race circuit shown in FIG.

5 is an equivalent circuit showing transfer characteristics between ports 1 and 2 of the rat race circuit shown in FIG.

FIG. 6 is a diagram showing one embodiment of the present invention.

FIG. 7 is a diagram showing characteristics of the rat race circuit shown in FIG.

Claims (1)

[Claims] A first port serving as an input port, a second port serving as a first output port, a third port serving as a second output port, and a fourth port serving as an isolation port; From the port and the second output port,
In a rat race circuit configured to obtain outputs having the same amplitude and different phases from each other by 180 degrees, a load of z = r + jx represented by a normalized impedance value is connected to the first output port and the second output port. In case of the above, the length of each transmission line from the first port to the second port, from the second port to the fourth port, and from the fourth port to the third port. And the length of the transmission line from the first port to the third port is set to a length corresponding to the phase angle θ + π at the working frequency. The input impedance of the first port and the fourth impedance
The output impedance of the port is expressed by the above-mentioned standardized impedance, and all of them are impedances having a real value of 1, and the characteristic impedance of the above-mentioned transmission line is expressed by the above-mentioned standardized impedance, and R = 2 {r (1-r) + x ² } {2r (r-1) ² +
And ^{(2r-1) x 2}} -1/2, sin2θ = 2xR {(1-r) (4r-R 2) -4x
² } ^{-1/2 The} rat race circuit characterized by the composition.