JPH09319527A - Data storage device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a data storage device in which the degree of reduction of throughput can be minimized even when the write request of data blocks over different data chunks or different stripes is generated. SOLUTION: Concerning the data storage device, plural storage means #0-#3 are provided and data chunks, stripes and parity areas are specified on the logical address space of these plural storage means #0-#3. Then, data blocks 12a and 13a, to which continuous addresses are added, over different data chunks 12 and 13 are arranged on the same column. Besides, data blocks 13b and 15a, to which continuous addresses over different stripes are arranged on two different rows.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data storage device having a plurality of storage means such as a magnetic disk device and using these storage means to function as if it were one storage device.

[0002]

2. Description of the Related Art Conventionally, a disk array device is known as a data storage device having a plurality of storage means.
A disk array device is a RAID (Redundant Arrays) device devised at the University of California, Berkeley.
of Inexpensive Disks) ", and is provided with a plurality of magnetic disk devices (hereinafter referred to as DK). In this "RAID architecture", a disk array device adopting an architecture called RAID level 5 (hereinafter referred to as RAID5 disk array device) has high reliability due to having redundant data and a plurality of DKs are arranged in parallel. It realizes high throughput by accessing, and it can show high performance especially in an application environment where random access to a relatively small amount of data frequently occurs, such as online transaction processing.

As shown in FIG. 4, a RAID5 disk array device includes a control unit 20 for controlling the entire device, a plurality of built-in DK # 0-3, and a disk interface (hereinafter referred to as an interface) for connecting them to each other. Is abbreviated as I / F) 20a to 20d, and a host I / F 20e connected to a host computer (not shown). The number of DKs included in the RAID5 disk array device is not particularly specified in the “RAID architecture”, but here, the case where four DK # 0 to 3 are provided will be described as an example.

In the RAID 5 disk array device thus constructed, the host computer functions as if it were one DK. for that reason,
In the RAID5 disk array device, the disk address (hereinafter referred to as logical address) space seen from the host computer as shown in FIG. 5A is located on a plurality of DK # 0-3 as shown in FIG. 5B. It is arranged to be distributed in the logical address space of.

The logical address space on DK # 0-3 is formed by a set of data blocks in which the number of DK # 0-3 is a row and the number of sectors (storage areas) in each DK is a column. Has been done. The data block is the minimum unit of data accessed from the host computer, and is, for example, the sector capacity of DK 51.
It has the same data amount as 2 bytes. Further, in the set of data blocks in this logical address space, the data blocks 41a, 42a, 4 on the same column are
3a and these data blocks 41a, 42a, 43
Parity block 4 which is the exclusive OR calculated from a
A data string 40A is formed by 4a. That is, one of the blocks forming the data string 40A is the parity block 44a.

Further, in this logical address space,
A data chunk 41 is formed by a set of a predetermined number of data blocks 41a, 41b, 41c, 41d successively stored in one DK (same row). The capacity of the data chunk 41 is 2 to 8 times (several kilobytes to several tens of kilobytes) the capacity accessed most frequently by the host computer, and for example, four data blocks 41a, 41b, 41c, 41d. , The capacity is 2 Kbytes.
In addition, in one data chunk 41, continuous logical addresses (for example, d00 to d03) are sequentially provided to the data blocks 41a, 41b, 41c, and 41d.

Further, in this logical address space, data chunks 45, 46, 4 arranged in the same column direction are arranged.
A stripe 49 is formed by a set of 7 and 48. However, the stripe 49 includes a parity chunk 46 composed of only parity blocks. In the RAID5 disk array device, that is, in the architecture called RAID level 5, the parity chunk is stored in a different row for each stripe, that is, in a different DK.

RA having such a logical address space
In the ID5 disk array device, by generating and storing a parity block for each data column in one of the plurality of DK # 0-3, for example, one D
Even if K fails, the data block on the failed DK can be reproduced from the remaining data blocks on the DK, so that the reliability of the data of the entire device can be increased. Further, in the RAID5 disk array device, when reading a data block, a plurality of DK # 0 to 3 can be accessed in parallel, so that high throughput can be obtained.

[0009]

By the way, RAID5
In the disk array device, in response to a write request from the host computer, in addition to writing the data block that is the write target, it is necessary to update the parity block for that data block, so the throughput is higher than when reading. Will fall. Especially when writing to a data block that spans different data chunks or different stripes,
The degree of decrease in throughput becomes large.

Here, the data blocks 42 that are continuous on the logical address span two different data chunks.
A case where there is a write request to the addresses b and 43a (logical addresses d07 and d08) will be described with reference to FIG. However, the data block 42b (logical address d
07), the parity block 44b (logical address dp
03) corresponds to the data block 43a (logical address d08) and the parity block 44a (logical address d08).
p00) is supported. Further, the data block 42b is DK # 1, and the data block 43a is DK # 1.
In # 2, the parity blocks 44a and 44b are DK # 3.
, Respectively.

In response to a write request from the host computer, new write data (d0 in the figure)
7 ', d08') are transferred (step 301, step is abbreviated as S hereinafter), the control unit 20 of the RAID5 disk array device transfers the data to the cache / buffers 51, 52 of this control unit 20. Store temporarily. The cache / buffer is, for example, a RAM (Random Access Memory) provided in the control unit 20, and is used as a disk cache for storing a copy of data on DK # 0-3. It is also used as a temporary buffer for generating parity blocks.

When new write data is stored in the caches / buffers 51 and 52, the control unit 20 calculates the new parity block for these write data from the data block 42b of the logical address d07 from DK # 1. Read and cache / buffer 53
(S302), the data block 43a at the logical address d08 is read from DK # 2 and stored in the cache / buffer 54 (S303). Further, the control unit 20 reads the parity block 44b of the logical address dp03 and the parity block 44a of the logical address dp00 from the DK # 3, and caches them respectively.
Store in buffers 55 and 56 (S304, S30
5).

Then, the control unit 20 calculates the exclusive OR of all the data stored in the cache / buffers 51, 53 and 55, and caches the result.
The data is stored in the buffer 57 (S306). Similarly, all the exclusive ORs of the respective data stored in the caches / buffers 52, 54 and 56 are stored in the cache / buffer 58 (S307). The calculation results (dp00 ', dp03' in the figure) in the caches / buffers 57, 58 thus generated become the new parity blocks.

For example, the data block before writing is d
Let i be the parity block, and dp be the parity block, and dj and dk are the other data blocks from which this parity block was calculated.

Dp = di xor dj xor dk (1) (where “xor” is an exclusive OR operator)

Further, assuming that the newly written data is di'and the new parity block is dp ', the following relationship must be established.

Dp '= di' xor dj xor dk (2)

At this time, since dxor d = 0 and 0xor d = d, the following equation is derived from equation (2).

Dp '= (di' xor dj xor dj) xor 0 = di 'xor dj xor dk xor di xor di = (di xor dj xor dj) xor di xor di' = dp xor di xor di ' ... (3)

As a result, the cache / buffer 57,
The calculation result in 58 is proved to be each new parity block.

When a new parity block is stored in the cache / buffers 57 and 58, the controller 20 sets the write data stored in the cache / buffer 51 to D
Write to the logical address d07 on K # 1 (S30
8), the write data stored in the cache / buffer 52 is written to the logical address d08 on DK # 2 (S309). Also, cache / buffers 57, 58
The parity blocks stored in the DK # 3 are written to the logical address dp03 and the logical address dp00 on the DK # 3, respectively (S310, S311). That is, RAID5
In the disk array device, when there is a write request for continuous data blocks on a logical address from a host computer over two data chunks, the controller 20 and each DK # respond to the single write request.
0 to 3 readings four times (S302 to S30
5) and writing four times (S308 to S311) must be performed.

This is a write request for a continuous data block on a logical address across two stripes (for example, logical address d in FIG. 5B).
The same applies when there are write requests to 11 and d12 or d23 and d24. In this case, in response to one write request, between the control unit 20 and each DK # 0-3,
It is necessary to read 2 to 4 times and write 2 to 4 times.

In other words, in the RAID5 disk array device, when there is a write request for continuous data blocks on a logical address across different data chunks or different stripes, a total of 4 to 8 for the built-in DK # 0-3. Must be accessed twice.
Therefore, in a system environment where such write requests occur frequently, a plurality of DK # s may be issued to read requests.
The high throughput obtained by parallel access to 0 to 3 is offset, and as a result, the throughput of the entire device may be significantly reduced.

Therefore, according to the present invention, even if a write request is made to consecutive data blocks on a logical address across different data chunks or different stripes, the degree of reduction in throughput can be reduced. The purpose is to provide.

[0025]

The present invention has been devised to achieve the above object, and a data storage device according to claim 1 has a plurality of storage areas for storing data. A plurality of storage means are provided, different addresses are sequentially assigned to the storage areas of the plurality of storage means, and the storage areas of the plurality of storage means are defined by the number of the storage means in a row, and the storage means are When the number of storage areas in is arranged as a column, in the arrangement, a set of a predetermined number of storage areas arranged on the same row is a data chunk, and a set of the data chunks arranged in the same column direction is a stripe, Furthermore, one storage area among the plurality of storage areas arranged in the same column is used as a parity storage for storing the exclusive OR of the data stored in the other storage areas of the plurality of storage areas. If there is a storage area with consecutive addresses over different data chunks in one stripe, both storage areas are arranged on the same column. To do.

According to the data storage device having the above-mentioned configuration, since storage areas to which consecutive addresses are assigned are arranged on the same column in different data chunks within one stripe, the parity for these storage areas is set. The areas are also the same. Therefore, when it is attempted to store data that requires two storage areas across different data chunks in one stripe, these data are stored in the storage areas arranged on the same column. Therefore, the writing of the exclusive OR associated with the storage of this data may be performed in one parity area with respect to the storage area on the same column. That is, it is not necessary to write an exclusive OR to different parity areas for each storage area.

A data storage device according to a second aspect of the present invention is
A plurality of storage means having a plurality of storage areas for storing data are provided, and different addresses are sequentially assigned to the storage areas of the plurality of storage means, and the storage areas of the plurality of storage means are When the number of storage means is arranged in rows and the number of storage areas in these storage means is arranged in columns, a set of a predetermined number of storage areas arranged on the same row in the arrangement is used as a data chunk, and the same A set of the data chunks arranged in the column direction is used as a stripe, and one storage area among a plurality of storage areas arranged on the same column is stored in another storage area of the plurality of storage areas. If a storage area with consecutive addresses over different stripes is used as a parity area for storing the exclusive OR of these storage areas, these storage areas And the respective parity areas for these storage areas are arranged on two different rows in the arrangement, and the storage areas and the parity areas are adjacent to each other on the two different rows. It is arranged.

According to the data storage device having the above structure, the storage areas to which consecutive addresses are assigned between different stripes and the respective parity areas for these storage areas are adjacent to each other on two different rows. Since it is arranged in such a manner, it is possible to access the storage area and the parity area adjacent to each other at once on each row. Therefore, when it is attempted to store data that requires two storage areas across two stripes, it is sufficient to write these data and the exclusive OR associated therewith once for each of two different rows. . That is, it is not necessary to write data or exclusive OR for each storage area or for each parity area.

[0029]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A data storage device according to the present invention will be described below with reference to the drawings. However, a case where the present invention is applied to a RAID5 disk array device will be described here.

The RAID5 disk array device of the present embodiment is constructed as shown in FIG. 4, like the conventional device. However, unlike the conventional RAID5 disk array device, a plurality of DK # 0-3
The upper logical address space is arranged as shown in FIG.

That is, in this logical address space, in the data chunks adjacent to each other in one stripe, the order (arrangement direction) of the logical addresses given to the respective data blocks in these data chunks is reversed. . For example, within stripe 1, data chunk 1
Logical address (d
00-d03) arrangement direction and this data chunk 11
And the arrangement direction of the logical address (d04 to d07) for each data block in the adjacent data chunk 12 are opposite to each other.

Therefore, in this logical address space, between different data chunks in one stripe, the respective data blocks given consecutive logical addresses are arranged on the same data string. There is. For example, in one stripe 1, the data blocks 12a and 13a to which consecutive logical addresses (d07, d08) are provided over the data chunks 12 and 13 adjacent to each other are arranged on the same data column A. There is. At this time, the following relationship is established on the data string A.

Dp00 = d00 xor d07 xor d08 (4)

That is, for these data blocks 12a and 13a to which consecutive logical addresses are given,
The same parity block 14a corresponds. The arrangement of these data blocks is logical and does not indicate the physical arrangement of the sectors in the DK.

Further, in this logical address space, the respective data blocks to which consecutive logical addresses are given are spread over different stripes and are adjacent to each other.
K is designed to be stored. For example, between the data chunks 13 and 15 located on different stripes 1 and 2, the data blocks 13b and 15a to which consecutive logical addresses (d11 and d12) are given are adjacent DK # 2 and # 3, respectively. It is stored in.

However, in the RAID5 disk array device, the parity chunk is stored in a different DK for each stripe. Therefore, in this logical address space, if there are data blocks 13b and 15a to which consecutive addresses (d11 and d12) are applied across two stripes 1 and 2, if these data blocks 13b and 15a and these data blocks Block 13
b, 15a for each parity block 14
b and 16a are located on the adjacent DKs # 2 and # 3, respectively. And these DK #
2 and # 3, the data block 13b and the parity block 16a and the data block 15a and the parity block 14b are arranged adjacent to each other.

Next, in the RAID5 disk array device having the logical address space as described above, an operation example in the case where there is a write request for continuous data blocks on the logical address across two data chunks is shown in FIG. Will be described with reference to.

For example, there is a write request from the host computer to the data blocks 12a and 13a having logical addresses d07 and d08, and new write data (d07 'and d08' in the figure) is transferred from the host computer together with this request. And (S101), R
The control unit 20 of the AID5 disk array device temporarily stores the data in the cache / buffers 21 and 22 of the control unit 20.

When new write data is stored in the cache / buffers 21 and 22, the control section 20 calculates the new parity block for these write data from the data block 12a from DK # 1 to the logical address d07. Read and cache / buffer 23
(S102), the data block 13a at the logical address d08 is read from DK # 2 and stored in the cache / buffer 24 (S103). Further, the control unit 20 reads the parity block 14a of the logical address dp00 from the DK # 3 and cache / buffer 2
5 (S104).

Here, the control unit 20 calculates the exclusive OR of all the data stored in the cache / buffers 21, 22, 23, 24 and 25, and stores the result in the cache / buffer 26. Yes (S105). The calculation result (dp00 'in the figure) in the cache / buffer 26 generated in this way becomes a new parity block.

After generating a new parity block, the control unit 20 subsequently writes the write data stored in the cache / buffer 21 to the logical address d0 on DK # 1.
7 is written instead of the data block 12a already stored in S7 (S106), and the cache / buffer 2
2 is stored in the data block 13 already stored in the logical address d08 on DK # 2.
Write instead of a (S107). Also, cache /
The new parity block stored in the buffer 26 is
The parity block 14a already stored at the logical address dp00 on DK # 3 is written instead (S10).
8). In this way, in this RAID5 disk array device, writing to continuous data blocks on the logical address is completed, straddling two data chunks.

As described above, in this RAID5 disk array device, even if there is a write request for continuous data blocks on two logical chunks and logical addresses, the parity blocks for these data blocks are the same. Therefore, in response to one write request from the host computer, the control unit 20 and each D
Read three times between K # 0-3 (S102-S1)
04) and writing three times (S106 to S108), the writing operation is completed. In other words, as before,
Since it is not necessary to read and write four times, the write operation becomes faster than in the conventional case. Therefore, even in a system environment where such write requests occur frequently, it is possible to prevent the throughput of the entire apparatus from being significantly reduced, and as a result, the performance of the apparatus is improved.

Next, FIG. 3 shows an operation example in the RAID5 disk array device having the above logical address space when there is a write request for continuous data blocks on the logical address across two stripes. It will be described with reference to FIG.

Here, the data blocks 13b and 15a of the logical addresses d11 and d12 are transmitted from the host computer.
An example will be described where there is a write request to the. However, the data block 13b (logical address d1
1), the parity block 14b (logical address dp0
3) corresponds to the data block 15a (logical address d
12), the parity block 16a (logical address dp
04) is supported. In the control unit 20, the data block 13b and the parity block 16a,
It is possible to read or write blocks such as the data block 15a and the parity block 14b, which are stored in areas adjacent to each other, once each.

For example, there is a write request from the host computer to the data blocks 13b and 15a at the logical addresses d11 and d12, and new write data (d11 'and d12' in the figure) is transferred from the host computer together with this request. Then (S201), the control unit 20 temporarily stores the data in the cache / buffers 31 and 32 included in the control unit 20.

When new write data is stored in the caches / buffers 31 and 32, the control section 20 calculates the new parity block for these write data from the data block 13b of the logical address d11 to the data block 13b of DK # 2. , The parity block 16a of the logical address dp04 is read by one read and stored in the cache / buffers 33 and 36, respectively (S
202). Further, the control unit 20 reads the data block 15a of the logical address d12 and the parity block 14b of the logical address dp03 from DK # 3 by one reading, and reads each of them in the cache / buffer 3 respectively.
It is stored in Nos. 4 and 35 (S203).

Here, the control unit 20 controls all the exclusive ORs of the respective data stored in the cache / buffers 31, 33 and 35, and the cache / buffers 32 and 3.
All exclusive ORs of the respective data stored in Nos. 4 and 36 are calculated, and these results are stored in the cache / buffers 37 and 38, respectively (S204, S20).
5). The cache / buffer 37 thus generated,
Calculation result in 38 (dp03 ', dp0 in the figure)
4 ') becomes a new parity block.

When a new parity block is generated, the control unit 20 subsequently sets the contents stored in the cache / buffers 31 and 38 to the data block 13b already stored at the logical address d11 on DK # 2. Parity block 1 already stored in logical address dp04
Instead of 6a, writing is performed by one writing (S206). Further, the control unit 20 sets the contents stored in the cache / buffers 32 and 37 to the data block 15a already stored at the logical address d12 on DK # 3 and the parity block already stored at the logical address dp03. 14b instead of 1
It is written by writing once (S207). In this way, in this RAID5 disk array device, writing to a continuous data block on a logical address across two stripes is completed.

As described above, in this RAID5 disk array device, if there are data blocks that extend over two stripes and that are continuous on the logical address, these data blocks and the parity blocks for these data blocks are provided. Are always stored in two DKs, and the data block and the parity block are stored in adjacent areas in these DKs. Therefore, in response to one write request from the host computer, two read operations (S202, S203) and two write operations (S206, S207) are performed between the control unit 20 and each DK # 0-3. If done, the write operation is completed. That is, the write operation becomes quicker than the conventional 2 to 4 times of reading and 2 to 4 times of writing. Therefore, even in a system environment where such write requests occur frequently, it is possible to prevent the throughput of the entire apparatus from being significantly reduced, and as a result, the performance of the apparatus is improved.

In the present embodiment, the present invention is based on RAI.
The case where the present invention is applied to the D5 disk array device has been described, but the present invention is not limited to this, and for example, a RAID4 disk array device adopting an architecture called RAID level 4 in "RAID architecture". Applicable. The RAID4 disk array device is different from the RAID5 disk array device in that the DK for storing the parity chunk is fixed. Even with such a RAID4 disk array device, if the present invention is applied, the same effect as described above can be obtained.

Further, although the present embodiment has been described by taking the disk array device having the magnetic disk device as the storage means as an example, the present invention is not limited to this. For example, even if a magnetic tape device is provided as a storage unit or an optical disc device is provided, the same effect as described above can be obtained by applying the present invention. Furthermore, in the present embodiment, a case has been described in which there is a write request for two consecutive data blocks on a logical address that spans data chunks or stripes. However, for example, write requests for three to five consecutive data blocks are made. Even if there is, it is similarly applicable.

[0052]

As described above, in the data storage device of the present invention, even if there is a write request for a continuous data block on a logical address that spans different data chunks or different stripes, the data is stored compared to the conventional one. Since it is possible to reduce the number of times of access to the means, it is possible to reduce the degree of decrease in throughput. In other words, even in a system environment in which such write requests occur frequently, it is possible to prevent the throughput of the device as a whole from significantly lowering, and as a result, the effect that the device performance is improved is obtained. To be

[Brief description of drawings]

FIG. 1 is a layout diagram of data blocks in a logical address space in an example of an embodiment of a data storage device according to the present invention.

FIG. 2 is an explanatory diagram showing an operation example in the data storage device having the logical address space shown in FIG. 1 when there is a write request for continuous data blocks on two logical chunks and on a logical address.

FIG. 3 is an explanatory diagram showing an operation example in the case where there is a write request for continuous data blocks on a logical address across two stripes in the data storage device having the logical address space shown in FIG.

FIG. 4 is a block diagram showing a schematic configuration of an example of a conventional data storage device.

5A and 5B are layout diagrams of data blocks in a conventional data storage device, FIG. 5A is a layout diagram in a logical address space viewed from a host computer, and FIG. 5B is a logical address space in a plurality of magnetic disk devices. FIG.

FIG. 6 is an explanatory diagram showing an operation example in the case where there is a write request for continuous data blocks on a logical address across two data chunks in the conventional example.

[Explanation of symbols]

1, 2 stripes 11, 12, 13, 15 data chunks 11a, 12a, 13a, 13b, 15a data blocks 14a, 14b, 16a parity blocks # 0, # 1, # 2, # 3 magnetic disk drive

Claims (2)

[Claims] 1. A plurality of storage means having a plurality of storage areas for storing data are provided, and different addresses are sequentially assigned to the respective storage areas of the plurality of storage means. When the storage areas are arranged with the number of the storage means as the rows and the number of the storage areas in the storage means as the columns, in the arrangement, a set of a predetermined number of the storage areas arranged in the same row is set as the data. A chunk, a set of the data chunks arranged in the same column direction as a stripe, and one storage area in a plurality of storage areas arranged in the same column is defined as another storage area in the plurality of storage areas. A data storage device having a parity area for storing the exclusive OR of the data stored in, and having consecutive addresses assigned to different data chunks in one stripe. A data storage device characterized in that, when there is a storage area, the storage areas are both arranged on the same column. 2. A plurality of storage means having a plurality of storage areas for storing data are provided, and different storage addresses are sequentially assigned to the respective storage areas of the plurality of storage means. When the storage areas are arranged with the number of the storage means as the rows and the number of the storage areas in the storage means as the columns, in the arrangement, a set of a predetermined number of the storage areas arranged in the same row is set as the data. A chunk, a set of the data chunks arranged in the same column direction as a stripe, and one storage area in a plurality of storage areas arranged in the same column is defined as another storage area in the plurality of storage areas. A data storage device that uses a parity area to store the exclusive OR of the data stored in the storage area, and if there are storage areas with consecutive addresses that are assigned to different stripes, Storage areas and respective parity areas for these storage areas are arranged on two different rows in the arrangement, and the storage areas and the parity areas are mutually different on the two different rows. A data storage device characterized by being arranged next to each other.