JPH09312324A - Semiconductor wafer position corrector - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid producing dusts at positioning of a semiconductor wafer by using at least two rollers, each having a larger outer diameter than the aperture size of an orientation notch. SOLUTION: The position corrector for semiconductor wafers 1 rotatably holds each wafer with at least two rollers 2, and hence the wafer stably rotates. This prevents the wafer from contacting the inner grooves of a cassette 4 during rotation. The roller 2 has a larger outer diameter W1 than the aperture size W2 of an orientation notch 1a, resulting in that the roller 2 never contacts the end faces of this notch 1a and hence the dust is prevented from being produced due to contact of the roller 2 with the end faces of the notch 1a.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer position correcting device, and more particularly to aligning orientation notches in the same direction in a state where a plurality of semiconductor wafers are housed and held in a wafer cassette. The present invention relates to a semiconductor wafer position correcting device.

[0002]

2. Description of the Related Art In a semiconductor manufacturing apparatus or the like, it is necessary to process a plurality of semiconductor wafers one after another, so a plurality of semiconductor wafers are stored in a wafer cassette in a shelf shape. Then, the semiconductor wafers are taken out one by one from the cassette, mounted on a wafer chuck or the like, and subjected to necessary processing steps. Then, after the necessary processing steps are completed, the semiconductor wafer is stored again from the wafer chuck into another wafer cassette.

By the way, a semiconductor wafer is provided with an orientation notch or an orientation flat surface for identifying the crystal direction.

When the orientation notch positions are not aligned in the state where the semiconductor wafer is stored and held in the cassette, the semiconductor wafer carry-out device is oriented when the semiconductor wafer is taken out of the cassette or inserted into the cassette. By gripping the notch, the semiconductor wafer may be chipped or chipped. In addition, during the film forming process in semiconductor manufacturing, the orientation notch may come into contact with the wafer holder to cause an abnormal film forming, resulting in a wafer defect or dust generation.

In order to prevent this loss or the like, it is necessary that the orientation notches of the plurality of semiconductor wafers housed and held in the cassette be aligned with each other at predetermined positions.

A conventional semiconductor wafer position correcting device for providing the position of the orientation notch of the semiconductor wafer will be described below with reference to the drawings.

FIG. 14 is a perspective view schematically showing the structure of a conventional semiconductor wafer position correcting device. With reference to FIG. 14, a roller 102 is provided as a position correcting device for aligning the orientation notches 1a of the plurality of semiconductor wafers 1 housed and held in the wafer cassette 4. The diameter W _{1 of the} roller 102 is set to be smaller than the opening size W ₂ of the orientation notch 1a.

Next, a method of aligning the semiconductor wafers in the conventional semiconductor wafer position correcting apparatus will be described.

FIG. 15 and FIG. 16 are process diagrams showing a method of correcting the position by a conventional semiconductor wafer position correcting device.

Referring to FIG. 15, roller 102 is brought into contact with the outer peripheral end surface of semiconductor wafer 1 from the lower portion of wafer cassette 4. Next, the semiconductor wafer 1 is rotated by rotating the roller 102.

Referring to FIG. 16, when orientation notch 1a reaches roller 102, roller 102 enters orientation notch 1a, and the friction between the end surface of semiconductor wafer 1 and roller 102 is reduced. As a result, the rotation of the semiconductor wafer 1 is stopped, and it becomes possible to align the positions of the orientation notches 1a of the plurality of semiconductor wafers. Orientation notch 1
By aligning the positions of a, the crystal orientations of the semiconductor wafer can be aligned.

There are also the following methods for aligning the orientation notches 1a of the semiconductor wafer.

The method is, for example, a method in which the semiconductor wafers 1 are taken out from the wafer cassette 4 one by one, aligned in an azimuth direction by an external device having a rotation system and an orientation detection function by an optical system, and then returned to the wafer cassette. is there.

[0014]

In recent years, the structure of semiconductor devices has been miniaturized, and the prevention of dust generation in the semiconductor manufacturing process is an important issue.

However, in the conventional semiconductor wafer position correcting apparatus, the semiconductor wafer 1 is rotatably supported by one roller 102 as shown in FIG. Therefore, the semiconductor wafer 1 is in an unstable state during its rotation, and comes into contact with the inner groove 5 of the wafer cassette 4. As described above, since the semiconductor wafer 1 rotates in contact with the inner groove 5, there is a risk that dust may be generated from the wafer 1 or the wafer cassette 4 due to friction.

When the semiconductor wafer 1 is provided with the orientation notch 1a, it is very difficult to mirror the end face of the orientation notch 1a. Therefore, the end surface of the orientation notch 1a has a relatively large number of irregularities as compared with the mirror-finished surface. Therefore, as shown in FIG. 16, when the roller 102 enters the orientation notch 1a and comes into contact with this end face, dust is likely to be generated due to the contact.

Further, in the method of taking out the semiconductor wafers one by one from the semiconductor cassette and aligning the orientations by an external device,
Since semiconductor wafers are processed one by one, the throughput is poor and the size of the apparatus becomes large.

Therefore, an object of the present invention is to provide a position adjusting device for a semiconductor wafer, which can prevent dust generation during alignment of the semiconductor wafer, has good throughput, and can be easily miniaturized.

[0019]

The alignment correcting apparatus of the present invention is for aligning orientation notches formed in a semiconductor wafer in the same direction in a state where a plurality of semiconductor wafers are housed and held in a wafer cassette. A position adjusting device for a semiconductor wafer, comprising at least two rollers and a detecting means. At least two rollers can contact the semiconductor wafer and rotate the semiconductor wafer in the circumferential direction. The detection means detects the position of the orientation notch and stops the rotation of the roller at the time of detection. The outer diameter of at least two rollers is larger than the opening size of the orientation notch.

In the position correcting apparatus for a semiconductor wafer according to the present invention, the semiconductor wafer is rotatably supported by at least two rollers and therefore rotates in a stable state. For this reason,
It is possible to prevent the rotating wafer from rotating while being in contact with the inner groove of the wafer cassette, thereby preventing dust generation.

Since the roller has an outer diameter larger than the dimension of the opening of the orientation notch, it does not come into contact with the end face of the orientation notch. Therefore, dust generation due to contact between the roller and the end face of the orientation notch is prevented.

Further, it is possible to align the positions of the orientation notches with the semiconductor wafer stored and held in the wafer cassette. Therefore, it is not necessary to take out the semiconductor wafers one by one from the wafer cassette and align the positions of the orientation notches, so that the throughput is good and the apparatus does not become large.

[0023]

Embodiments of the present invention will be described below with reference to the drawings.

First Embodiment FIG. 1 is a perspective view schematically showing the structure of a semiconductor wafer position correcting apparatus according to the first embodiment of the present invention. The position correcting apparatus of the present embodiment includes at least two rollers 2 for rotating the semiconductor wafer 1 housed and held in the wafer cassette 4, and notch detection for detecting an orientation notch provided in the semiconductor wafer 1. And device 3.

The diameter W ₁ of the two rollers 2 is set to be larger than the dimension W ₂ of the opening of the orientation notch 1a. Two rollers 2 are provided for each semiconductor wafer, and each roller rotates independently.

Next, a method of correcting the position by the position correcting apparatus for the semiconductor wafer according to the present embodiment will be described.

2 and 3 are schematic front views showing, in the order of steps, the position correcting method of the semiconductor wafer position correcting apparatus in the first embodiment of the present invention. First, referring to FIG. 2, the roller 2 is brought into contact with the outer peripheral end surface of the semiconductor wafer 1 from below the wafer cassette 4. Then, as the roller 2 rotates, the semiconductor wafer 1 rotates. Since at least two rollers 2 are provided for one semiconductor wafer 1, the semiconductor wafer 1 is stably rotatably supported by the roller 2. Therefore, the semiconductor wafer 1 rotates without coming into contact with the inner groove 5 of the wafer cassette 4.

Referring to FIG. 3, the rotation of semiconductor wafer 1 is stopped when the notch detector 3 detects the position of orientation notch 1a of semiconductor wafer 1 by this rotation. By performing these operations for each semiconductor wafer, it becomes possible to align the positions of the orientation notches of the plurality of semiconductor wafers.

In the semiconductor wafer position correcting apparatus of the present embodiment, the semiconductor wafer 1 has at least two rollers 2.
Since it is rotatably supported by, it rotates in a stable state. Therefore, the semiconductor wafer 1 is prevented from rotating while being in contact with the inner groove 5 of the wafer cassette 4, and dust generation due to the rotation is prevented.

The outer diameter (diameter) W of the roller 2 is larger than the dimension W ₂ of the opening of the orientation notch 1a.
Have _one . Therefore, orientation notch 1
The roller 2 does not contact the end surface of a. Therefore,
Dust generation due to contact between the roller 2 and the end face of the orientation notch 1a is prevented.

Further, the semiconductor wafer 1 is placed on the wafer cassette 4
It is possible to align the positions of the orientation notches 1a of the plurality of semiconductor wafers 1 in a state of being housed and held inside. Therefore, the semiconductor wafers 1 are taken out from the wafer cassette 4 one by one and the orientation notch 1
Since it is not necessary to align a, throughput is good and the apparatus does not become large.

Second Embodiment Hereinafter, an example of the notch detecting method according to the first embodiment will be described.

FIG. 4 is a schematic front view showing a specific structure of the notch detecting device according to the second embodiment. With reference to FIG. 4, the notch detection device of the present embodiment is provided with a light emitting device 7 for irradiating the outer peripheral edge surface of the semiconductor wafer 1 with light and a light emitting device 7 for receiving light reflected from the outer peripheral edge of the semiconductor wafer 1. The light receiving device 8 is included.

When the light 9 emitted from the light emitting device 7 hits a portion of the semiconductor wafer 1 other than the orientation notch 1a, the reflected light 10 is incident on the light receiving device 8. Then, when the semiconductor wafer 1 rotates and the light 9 emitted from the light emitting device 7 hits the orientation notch 1 a as shown in FIG. 5, the reflected light 10 does not enter the light receiving device 8.

As described above, the orientation notch 1a can be detected depending on the presence or absence of the incident light on the light receiving device 8.

Third Embodiment Hereinafter, another example of the notch detecting method according to the first embodiment will be described.

6 (a) and 6 (b) are a schematic front view and a schematic perspective view showing a specific structure of the notch detecting device according to the third embodiment of the present invention. Referring to FIGS. 6A and 6B, the notch detection device has a light emitting device 7 and a light receiving device 8 as in the second embodiment.

In this embodiment, the irradiation position of the light emitted from the light emitting device 7 is different from that in the second embodiment.
That is, in the present embodiment, the light 9 emitted from the light emitting device 7 is applied to the surface of the semiconductor wafer 1 in the vicinity of the outer periphery thereof.

When the light 9 emitted from the light emitting device 7 hits the surface other than the orientation notch 1 a, the reflected light 10 is incident on the light receiving device 8. When the semiconductor wafer 1 rotates and the light 9 emitted from the light emitting device 7 hits the orientation notch 1a as shown in FIGS. 7A and 7B, the reflected light does not enter the light receiving device 8.

As described above, the orientation notch 1a can be detected depending on the presence or absence of the incident light on the light receiving device 8.

Fourth Embodiment Hereinafter, still another example of the notch detecting method according to the first embodiment will be described.

FIG. 8 is a schematic perspective view showing a specific structure of the notch detecting device according to the fourth embodiment of the present invention. With reference to FIG. 8, the notch detection device includes two metal plates 11
And a capacity measuring device 12. Two metal plates 11
Are installed so as to sandwich the surface of the semiconductor wafer 1 near the outer periphery thereof.

When the orientation notch 1a is not provided between the two metal plates 11, the semiconductor wafer 1 is sandwiched between the two metal plates 11. Therefore, as compared with the case where the semiconductor wafer 1 is not provided between the metal plates 11, the capacity stored in the two metal plates 11 is large by the relative dielectric constant of the semiconductor wafer 1 (11.9 in the case of silicon). Become.

When the orientation notch 1a is sandwiched between the two metal plates 11 as shown in FIG. 9, the semiconductor wafer 1 is not present between the two metal plates 11, so that the two metal plates 11 are separated from each other. The capacity that can be stored becomes smaller.

By measuring the change in capacitance between the two metal plates 11 in this way, the orientation notch 1a can be detected.

Fifth Embodiment Hereinafter, an example of a method of stopping the rotation of the semiconductor wafer 1 after detecting the orientation notch 1a in the first embodiment will be described.

10 and 11 are schematic front views for explaining the method of stopping the rotation of the semiconductor wafer after notch detection in the fifth embodiment of the present invention. First, referring to FIG. 10, in the present embodiment, drive source 13 for rotating roller 2 is connected to notch detection device 3. The drive source 13 is turned on when the notch detecting device 3 does not detect the orientation notch, and rotates the roller 2.

Then, as shown in FIG. 11, when the notch detector 3 detects the orientation notch 1a, the drive source 13 is turned off and the rotation of the roller 2 is stopped. As a result, the rotation of the semiconductor wafers 1 is stopped and the positions of the orientation notches 1a of the respective semiconductor wafers 1 are aligned.

Sixth Embodiment Hereinafter, another example of the method for stopping the rotation of the semiconductor wafer 1 after detecting the orientation notch 1a in the first embodiment will be described.

12 and 13 are schematic front views for explaining a method of stopping the rotation of the semiconductor wafer after notch detection in the sixth embodiment of the present invention. First, referring to FIG. 12, in the present embodiment, drive source 15 controlled by notch detection device 3 is provided. In addition, the drive source 15
Thus, a wafer holding member 14 that can move up and down in the figure is provided.

The drive source 15 is not driven when the notch detector 3 does not detect the orientation notch 1a of the semiconductor wafer 1. The wafer holding member 14 is not in contact with the semiconductor wafer 1 and is in a separated state.

Then, as shown in FIG. 13, when the notch detector 3 detects the orientation notch 1a,
The drive source 15 is driven by receiving a signal from the notch detector 3. As a result, the wafer holding member 14 is pulled up to the upper side in the figure, and the semiconductor wafer 1 is brought into non-contact with the roller 2. As a result, the rotation of the semiconductor wafer 1 is stopped, and the positions of the orientation notches 1a of each semiconductor wafer are aligned.

In this method, the roller 2 does not need to be independently installed on each semiconductor wafer 1, and an integral shaft may be used. On the other hand, the notch detector 3, the driving source 15, and the wafer holding member 14 must be installed independently for each semiconductor wafer.

The embodiments disclosed this time are to be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

[0055]

According to the position correcting apparatus for a semiconductor wafer of the present invention, since the semiconductor wafer is rotatably supported by at least two rollers, it rotates in a stable state. For this reason,
It is possible to prevent the semiconductor wafer from rotating while being in contact with the inner groove of the wafer cassette, and to prevent dust generation due to the rotation.

Further, since the roller has an outer diameter larger than the dimension of the opening of the orientation notch, it does not contact the end face of the orientation notch. Therefore, dust generation due to contact between the roller and the end face of the orientation notch is prevented.

Further, it is possible to align the positions of the orientation notches with the semiconductor wafer stored and held in the wafer cassette. Therefore, it is not necessary to take out the semiconductor wafers one by one from the wafer cassette and align the positions of the orientation notches, so that the throughput is good and the apparatus does not become large.

[Brief description of drawings]

FIG. 1 is a perspective view schematically showing a configuration of a semiconductor wafer position correcting device according to a first embodiment of the present invention.

FIG. 2 is a first process chart for illustrating the semiconductor wafer position correcting method in the first embodiment of the present invention.

FIG. 3 is a second process chart for explaining the semiconductor wafer position correcting method in the first embodiment of the present invention.

FIG. 4 is a first step diagram for explaining a semiconductor wafer position correcting method in the second embodiment of the present invention.

FIG. 5 is a second process chart for explaining the method for correcting the position of the semiconductor wafer in the second embodiment of the present invention.

FIG. 6 is a first step diagram for explaining a semiconductor wafer position correcting method in the third embodiment of the present invention.

FIG. 7 is a second process chart for explaining the semiconductor wafer position correcting method in the third embodiment of the present invention.

FIG. 8 is a first process chart for explaining the semiconductor wafer position correcting method in the fourth embodiment of the present invention.

FIG. 9 is a second step diagram for explaining the semiconductor wafer position correcting method in the fourth embodiment of the present invention.

FIG. 10 is a first process chart for illustrating a method of stopping a semiconductor wafer according to a fifth embodiment of the present invention.

FIG. 11 is a second process diagram for explaining the method of stopping the semiconductor wafer according to the fifth embodiment of the present invention.

FIG. 12 is a first step diagram for illustrating a method of stopping a semiconductor wafer according to a sixth embodiment of the present invention.

FIG. 13 is a second process diagram for explaining the method for stopping the semiconductor wafer in the sixth embodiment of the present invention.

FIG. 14 is a perspective view schematically showing a configuration of a conventional semiconductor wafer position correcting device.

FIG. 15 is a first step diagram for explaining a conventional semiconductor wafer position correcting method.

FIG. 16 is a second process diagram for explaining a conventional semiconductor wafer position correcting method.

[Explanation of symbols]

1 semiconductor wafer, 1a orientation notch,
2 rollers, 3 notch detection device, 7 light emitting device, 8
Light receiving device, 11 metal plate, 12 capacitance measuring device, 13,
15 drive source, 14 wafer holding member.

Claims (6)

[Claims] 1. A semiconductor wafer position adjusting device for aligning orientation notches formed in a semiconductor wafer in the same direction in a state where each of the plurality of semiconductor wafers is housed and held in a wafer cassette. At least two rollers that can contact the semiconductor wafer and that rotate the semiconductor wafer in the circumferential direction; and a detection unit that detects the position of the orientation notch and stops the rotation of the rollers when the position is detected. The semiconductor wafer position adjusting device according to claim 1, wherein the outer diameters of the at least two rollers are larger than the opening size of the orientation notch. 2. The detecting means includes a light emitting device for irradiating the outer peripheral edge of the semiconductor wafer with light and a light receiving device for receiving the light reflected from the semiconductor wafer. The position correcting device for a semiconductor wafer according to claim 1. 3. The detecting means includes a light emitting device for irradiating the surface of the semiconductor wafer near the outer periphery thereof with light, and a light receiving device for receiving the light reflected from the semiconductor wafer. The position correcting device for a semiconductor wafer according to claim 1. 4. The detection means includes two metal plates sandwiching a surface near the outer periphery of the semiconductor wafer and facing each other, and a capacitance measuring means for measuring a capacitance stored in the two metal plates. And having:
The position correcting device for a semiconductor wafer according to item 1. 5. A drive source for rotating the roller is further provided, wherein the drive source rotates the roller in an operating state and stops the roller in a stopped state, and the detecting means includes the orientation notch. 2. The position correcting apparatus for a semiconductor wafer according to claim 1, wherein the drive source is in the operating state when the orientation notch is not detected, and the drive source is in the stop state when the detecting means detects the orientation notch. 6. The semiconductor wafer remains in contact with the roller when the detecting means does not detect the orientation notch, and the wafer contacts the roller when the detecting means detects the orientation notch. The semiconductor wafer position correcting apparatus according to claim 1, further comprising a moving unit that moves the semiconductor wafer so as to be in a non-contact state.