JPH09270941A - Method for superimposing data on photographing video and photographing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To match the direction of superimposing data with that of an image pickup output from an image pickup means on a screen, by outputting the superimposing data kept by a holding means based on the direction detection output content of the image pickup means. SOLUTION: A necessary signal processing, such as digitization and gamma correction, are executed on primary color signals from a camera head and they are supplied to a multiplexer 77. At that time, a control signal from the camera head is supplied to CPU 92, and bit map data in vertical/lateral directions, which are stored in a flash memory 93, are written into SRAM 97. Then, a controller 96 reads bit map data from SRAM 97 and converts it into one bit serial data, supplies it to the multiplexer 77, and it is mixed with the primary color signals. The necessary signal processing are executed on the mixed primary color signals, and they are outputted from output terminals 81r, 81g and 81c. Then, they are outputted from 81c to a television monitor, as composite signals.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to, for example, a CCD (C
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data superimposing method and a photographing device suitable for a photographed video when applied to a charge coupled device.

[0002]

2. Description of the Related Art Conventionally, a photographing device using a CCD has been proposed. This photographing device displays a camera head having a CCD, a driving system of the CCD, an operation unit, a processing system of a video signal from the CCD, a video signal captured by the CCD, or a captured still image. It is composed of a television monitor for outputting, a computer, and a printer for printing a video signal on paper by operating the computer. Shooting is easy. First, the release button on the operation unit is pressed. As a result, the video signal captured by the CCD is
After being processed in the processing system, it is continuously supplied to the television monitor and displayed as an image on its tube surface. Then, the release button of the operation unit is pressed again.

Then, the video signal taken in by the CCD when the button is pressed is held in the memory of the processing system. The video signal for one frame held in the memory of this processing system is displayed as a still image on the screen of the television monitor as a captured image. Then, when the computer is instructed to print the captured image on the screen of the computer, the computer supplies the still image image data from the processing system to the printer. The printer uses the still image data from the processing system
Print as an image on paper. In this way, the CCD
In the photographing device using the, the process from photographing to printing is consistently performed.

[0004]

By the way, as for a camera using a 35 mm film, there are known a method of photographing a subject with the camera in a horizontal position and a method of photographing a subject with the camera in a vertical position. There is. Also in a photographing device using a CCD, it is possible to adopt photographing of a subject with the camera head lying sideways and photographing of a subject with the camera head lying vertically.

FIG. 5 is an explanatory diagram showing a projected state on a television monitor when a subject is photographed by a photographing device. FIG. 5A shows a projection state on the television monitor when the subject H is photographed with the camera head lying sideways, and FIG. 5B is a television when the subject H is photographed with the camera head placed vertically. The projection state on the John monitor is shown. The state shown in FIG. 5B is a state in which the television monitor is set vertically. Normally, when the subject H is photographed with the camera head set vertically, the television monitor is set vertically. Further, the state shown in FIG. 5B is a projection state of the television monitor when the right side of the camera head is turned up. Also, the menu M shown in FIGS. 5A and 5B, respectively.
1 and M2 are for presetting the driving method of the camera head, respectively.

As shown in FIG. 5A, when the subject H is photographed with the camera head lying sideways, both the subject H and the menu M1 are projected horizontally on the screen of the television monitor. On the other hand, when the subject H is photographed with the camera head vertically, the subject H is vertically projected on the tube surface of the television monitor. However, since the television monitor is vertically oriented, it is visible to the operator's eyes. As the image to be reflected, the subject H is horizontally projected on the tube surface of the television monitor. However, since the menu M2 is projected horizontally on the screen surface of the television monitor, if the television monitor is set vertically, the menu M2 is displayed on the television monitor as an image seen by the operator. It is projected vertically on the tube surface of.

Therefore, when a subject is photographed with the camera head set vertically, the menu M2 is difficult to see.

The present invention has been made in consideration of such a point, and even if a subject is photographed with the camera head lying sideways,
In addition, even if the camera head is placed vertically and a subject is photographed, it is possible to propose a data superimposing method and a photographing device for a photographed video that can match the orientation of a captured image on the display surface with the orientation of an image such as character data. It is what

[0009]

The present invention holds an image pickup means for picking up light from a subject, a detecting means for detecting the direction of the image pickup means, and different superimposition data.
Based on the content of the detection output from the detecting means, the superimposing data generating means for outputting the superimposing data held in the holding means, the superimposing data from the superimposing data generating means, and the imaging means. And a superimposing unit that superimposes the image pickup output from.

According to the present invention described above, the superposition data held in the holding means is output based on the content of the detection output from the detection means, and the superposition data is output from the imaging means by the superposition means. Is superimposed with the image pickup output of.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a data superimposing method and a photographing apparatus according to the present invention will be described in detail below with reference to FIGS.

In the description of the embodiment of the data superimposing method and the photographing apparatus for the photographed video of the present invention, the following item explanations are described at the head of each item, and each item will be explained in the following order.

A. Configuration of imaging system and its operation (FIG. 1) B. Configuration and Operation of Camera Head 2 Shown in FIG. 1 (FIG. 2) C.I. Configuration and Operation of Processor 5 Shown in FIG. 1 (FIG. 3) D. Control operation of the processor 5 shown in FIG. 1 (FIG. 4) E. Image example of shooting a subject with the camera head vertically (Fig. 5)

A. Configuration of the imaging system and its operation (Fig. 1)

[Connection and Configuration] The photographing system shown in FIG. 1 has a lens unit 1, a camera head 2 having a CCD, a release button, etc., and a remote controller for remotely operating the camera head 2 and the processor 5. 3 and an LCD (Liquid Crystal Display) for viewing the imaged image of the subject on the camera head 2 side.
4), a processor 5 for performing various kinds of processing described later on an imaged video signal from the camera head 2, a television monitor 6 for viewing an imaged image of a subject on the processor 5 side, and digital image data from the processor 5. The main computer 9 for capturing and holding the same in a hard disk drive or the like or for editing digital video data, a printer (so-called video printer) 10 for printing digital video data from the main computer 9 on paper, and It is composed of a sub computer 12 as a subsystem of the main computer 9.

The main computer 9 is the processor 5 and the main computer 9, and the main computer 9 and the printer 10 are the SCSI (Small Com).
daisy chain connection by a computer system interface. A terminating resistor (terminator) 11 is connected to the printer 10. Further, the processor 5 converts the video signal from the camera head 2 into digital video data, performs various processes such as gamma correction on the digital video data obtained by the conversion, and then processes the digital video data. , Superimposes menu image data composed of character data.

[Operation] When the release button of the remote controller 3 is pressed, the camera head 2 converts the light of the subject condensed by the lens unit 1 into a video signal and supplies it to the processor 5. The processor 5 displays the video signal from the camera head 2 as an image on the display surface of the television monitor 6. Also, the processor 5
Is an image of the video signal from the camera head 2 as an image.
D (Liquid Crystal Display)
4 is displayed on the display surface.

Further, when the release button of the remote controller 3 is pressed, control signals are supplied from the camera head 2 to the strobe drive circuit 7 and the processor 5, respectively. The strobe drive circuit 7 drives the light emitting unit 8 in response to a control signal from the camera head 2. As a result, the light emitting unit 8 emits light. On the other hand, according to the control signal from the camera head 2, the processor 5 holds the video signal supplied from the camera head 2 for one frame.
The held video signal for one frame is a captured image.

The video signal as the photographed image is SCS.
I (Small Computer Systems I
interface) to the main computer 9, and is temporarily stored in the main memory of the main computer 9 and then recorded in the hard disk or the like of the main computer 9. In addition, the main computer 9 manages and edits photographed images, and the printer 10
The program data for output from is installed. Therefore, when the operator operates the main computer 9 to select a captured image and gives an instruction to the printer 10 to output the image, the main computer 9 outputs the video signal of the selected captured image. , And reads the video signal from the hard disk or the like and supplies the video signal to the printer 10 via SCSI. The video signal supplied to the printer 10 is printed on paper as an image.

By operating the remote controller 3, the processor 5 supplies a video signal as a captured image held in the internal memory to the LCD 4 via the camera head 2. That is, the operator can monitor the captured image or the captured video signal displayed on the display surface of the LCD 4 near the camera head 2.

B. Configuration and operation of the camera head 2 shown in FIG. 1 (FIG. 2)

[Connection and Configuration] FIG. 2 is a configuration diagram showing an internal configuration example of the camera head 2 shown in FIG. The camera head 2 shown in FIG. 2 includes three systems for red, green and blue, and a system for controlling these three systems. The red, green, and blue systems are CCDs (Charge Coups), respectively.
red Device) 50r, 50g and 50b, C
DS (Correlate Double Sanpl)
ing: correlated double sampling) circuits 51r, 51g and 51b, process circuits 52r, 52g and 52b, gamma correction circuits 53r, 53g and 53b, amplifier circuit 54
r, 54g and 54b. The outputs of the system are output from the output terminals 55r, 55g and 55b, respectively.

The system for controlling the above three systems generates various signals based on the CCD driver 56 for controlling the CCDs 50r, 50g and 50b for red, green and blue, respectively, and the reference signal from the crystal oscillator 58. Timing generator 5
7, a sync signal generation circuit 59 for generating horizontal and vertical sync signals based on a clock signal from the timing generator 57, and a microcomputer 61 for performing various controls.
A sensor 62 for detecting whether the camera head 2 is oriented vertically or horizontally, an EEPROM 63 for storing various parameter data, and an image signal from the processor 5 shown in FIG. The amplifier circuit 65 is provided to the LCD 4 shown in FIG. 1 via the BNC connector 66.

Here, the timing generator 57 is used.
Generates a clock signal, horizontal and vertical transfer pulses, sample and hold pulses, etc. based on the reference signal from the crystal oscillator 58. And the timing generator 57
The clock signal is supplied to the synchronizing signal generation circuit 59, the horizontal and vertical transfer pulses are supplied to the CCD driver 56, and the sample hold pulse is supplied to the CDS circuits 51r, 51g and 51b.

Further, the microcomputer 61 sends a detection signal from the sensor 62, that is, a signal indicating whether the camera head 2 is oriented vertically or horizontally.
It is supplied to the processor 5 via the input / output terminal 61b. Further, the microcomputer 61 outputs a control signal for controlling the lens unit 1, such as focus and iris control, based on the operation information supplied from the remote controller 3 via the input terminal 51 a, to the output terminal 61.
It is supplied to the lens unit 1 via c. The sensor 62 is composed of a switch that is mechanically turned on and off according to the orientation of the camera head 3.

Further, by the remote controller 3 shown in FIG. 1, the white balance in the camera head 3,
Various parameters such as black balance and knee correction can be set. This set value is the same as the EEPROM 6
3 is stored. Then, the microcomputer 61
Controls the process circuits 52r, 52g and 52b based on the parameter data stored in the EEPROM 63 so that the state indicated by the parameter data is obtained.

[Operation] Lights of red, green and blue components from the lens unit 1 are CCDs 50r, 50g and 50b, respectively.
Incident on the light-receiving surface of, and photoelectrically converted respectively and output as an electric signal, and sampled and held by the CDS circuits 51r, 51g and 51b. The outputs from the CDS circuits 51r, 51g and 51b are process circuits 52r and 52, respectively.
g and 52b are respectively processed by the above-mentioned parameter data, and then gamma correction circuits 53r and 53, respectively.
g and 53b, amplifier circuits 54r, 54g and 54b, and output terminals 55r, 55g and 55b, respectively, which are supplied to the processor 5 shown in FIG.

On the other hand, the camera head 3 from the sensor 62
1 is supplied to the microcomputer 61, the microcomputer 61 supplies the detection signal to the processor 5 shown in FIG. 1 via the input / output terminal 61b. Supply to.

C. Configuration and operation of the processor 5 shown in FIG. 1 (FIG. 3)

[Connection and Configuration] FIG. 3 is a configuration diagram showing a configuration example of the processor 5 shown in FIG. The processor 5 shown in FIG. 3 is composed of a first processing system, a second processing system and a control system. The first processing system includes amplification and phase compensation circuits 70r, 70g and 70b for red, green and blue,
A-D converters 71r, 71g and 71b for red, green and blue, and gamma correction circuits 72r, 7 for red, green and blue.
2g and 72b, a white control circuit 73 for controlling white balance, and a video signal transfer rate of 2
The VRAM 74 for converting from 4 frames / sec to 30 frames / sec, the read control circuit 75 for reading from the VRAM 74, and the image color on the television monitor to match the color of the image printed on the paper Red,
Gamma correction circuits 76r, 76g and 76b for green and blue
A multiplexer 77, red-green-blue D-A converters 78r, 78g and 78b, red-green-blue low-pass filters 79r, 79g and 79b, and RG.
And a B matrix encoder 80.

Here, the RGB matrix encoder 80
Outputs primary color signals R, G, B, which are outputs from the low-pass filters 79r, 79g, and 79b, from output terminals 81r, 81g, and 81b, respectively, and based on the primary color signals R, G, and B, , A composite video signal is obtained and output from the output terminal 81c.

The second processing system shown in FIG. 3 is a DRAM 83 having a capacity for one frame for red, green and blue.
r, 83g and 83b and these DRAMs 83r, 8
A DRAM controller 82 for controlling writing and reading of data to and from 3g and 83b, a spare frame memory 84, an averaging circuit 85, an interpolating circuit 87 for performing spatial pixel shift, and a detail / contrast circuit 88. A matrix encoder 86, a masking circuit 89 for controlling color saturation, and a SCSI
And an interface circuit 90.

Here, the DRAMs 8 for red, green and blue are used.
Each capacity of 3r, 83g and 83b is at least 1 respectively.
It is 280 × 1024 pixels. And these DRA
The image data of 1280 × 1024 pixels read from one of M83r, 83g, and 83b is used as a luminance signal in the interpolation circuit 87, and 2560 × 20.
Converted to 48 pixels. The interpolation circuit divides the interpolated image data into a low-frequency luminance component and a high-frequency luminance component,
Detail / contrast circuit 88 for high-frequency luminance component only
To supply. The matrix encoder 86 uses the averaging circuit 8
The primary color signals R, G and B from No. 5 are supplied to the masking circuit 89 as they are, and the primary color signals R, G and B, the high band luminance component from the detail / contrast circuit 88, and the low band luminance component from the interpolation circuit 87 are supplied. Based on the color difference signal R
-Y, BY, and luminance signal Y are obtained, and these are output from output terminals 86r, 86b, and 86y, respectively.

In the control system shown in FIG. 3, a bus 93 is connected to the CPU 92, and the EEPROM 9 is connected to the bus 93.
4, flash memory 95, controller 96 and SR
AM97 are connected to each other. Where E above
The EPROM 94 stores program data as a loader. This program data is the CPU
A function to read the corresponding bitmap data from the flash memory 95 according to the already-described detection data indicating whether the camera head 3 is in the vertical direction or the horizontal direction is supplied to the unit 92 via the SCSI interface circuit 90. It has a function of determining whether to output external data or data stored in the flash memory 95 and performing an operation based on the determination.

Then, in the flash memory 95, bitmap data having the same content is output as vertical bitmap data for outputting when the camera head 3 is in the vertical orientation, and the bitmap data in which the camera head 3 is in the horizontal orientation. The horizontal direction bit map data to be output when each of them is stored. These data are 8 bits in parallel and SRA
It is supplied to the M97 and is stored in the SRAM 97 by the write control signal from the controller 96. SRAM9
The data stored in 7 is supplied to the multiplexer 77 as 1-bit serial data in response to a read control signal from the controller 96.

[Operation When First Pressing Release Button] Primary color signals R and G from the camera head 3 shown in FIG.
And B are respectively supplied to the amplification and phase compensation circuits 70r, 70g and 70b via the input terminals 69r, 69g and 69b, respectively. Amplification and phase compensation circuit 70r, 70g
And 70b are A / D converters 71r, 71g and 7b.
1b, and converted into digital data respectively.
These digital data are stored in the gamma correction circuits 72r and 7r.
2g and 72b, respectively, and the internal LUT (Loo
A correction process based on k Up Table) is performed.
The outputs of the gamma correction circuits 72r, 72g and 72b are
It is supplied to the white control circuit 73, where the white balance is controlled. The output of the white control circuit 73 is
Each is supplied to the VRAM 74. The digital primary color data R, G, and B supplied to the VRAM 74 are VR-controlled by a write control signal from the white control circuit 73, respectively.
Written to AM74.

The digital primary color data R, G, and B stored in the VRAM 74 are read out by the read control circuit 75, respectively.
Are read by the read control signals from the respective. VR
Digital primary color data R, G read from AM74
B and B are supplied to gamma correction circuits 76r, 76g, and 76b, and correction processing is performed based on the LUT. The digital primary color data R, G and B from these gamma correction circuits 76r, 76g and 76b are sent to the multiplexer 7
7 is supplied.

At this time, a control signal from the microcomputer 61 of the camera head shown in FIG. 2, that is, a signal indicating whether the camera head 2 is oriented vertically or horizontally is input / output. Terminal 93a and bus 93
Is supplied to the CPU 92 via. The CPU 92 reads the vertical or horizontal direction bitmap data stored in the flash memory 95 based on the control signal, and supplies the read data to the SRAM 97. The controller 96 supplies a write control signal to the SRAM 97. As a result, the vertical or horizontal direction bitmap data is written in the SRAM 97. Or later,
The controller 96 supplies a read control signal to the SRAM 97. When the read control signal from the controller 96 is supplied to the SRAM 97, the vertical or horizontal direction bitmap data stored in the SRAM 97 is supplied to the controller 96. Controller 96
Converts the vertical or horizontal bit map data from the SRAM 97 into 1-bit serial data and supplies it to the multiplexer 77. Therefore, in the multiplexer 77, the primary color signals R, G and B from the gamma correction circuits 76r, 76g and 76b are mixed with the vertical or horizontal direction bitmap data.

The digital primary color data R, G and B from the multiplexer 77 are supplied to the DA converter 78r, respectively.
78g and 78b, where they are converted to analog primary color signals R, G and B, respectively. DA converter 7
Each analog primary color signal R from 8r, 78g and 78b,
G and B are supplied to the encoder 80 via low-pass filters 79r, 79g, and 79b, respectively. The encoder 80 includes low pass filters 79r, 79g and 79b.
The analog primary color signals R, G and B from the output terminals 8
1r, 81g and 81b are output, and a composite video signal is generated based on the analog primary color signals R, G and B. This composite video signal is output to the output terminal 81.
It is supplied to the television monitor 6 shown in FIG. 1 via c and to the LCD 4 via the camera head 2.

An example of the image at this time is, as shown in FIGS. 5A and 5C, when the camera head 2 is set in the horizontal direction, the horizontal direction bitmap data is output. The directions of the menu image M1 match. Further, when the camera head 2 is oriented vertically, the vertical direction bitmap data is output, so that the orientation of the subject H and the orientation of the menu image M3 on the video match.

[Operation When Second Release Button is Pressed] When the second release button is pressed, a control signal from the microcomputer 61 of the camera head 2 shown in FIG. 1 (means the second release button is pressed). Signal) to the CPU shown in FIG. 3 via the input / output terminal 93a.
Is supplied to 92. The CPU 92 supplies the DRAM controller 82 with a control signal indicating the capture of a captured image. As a result, the DRAM controller 82 stores the primary color signals R, G and B from the gamma correction circuits 72r, 72g and 72b in the DRAMs 83r, 83g and 83b. The primary color signals R, G, and B stored in the DRAMs 83r, 83g, and 83b are read by the read control of the DRAM controller 82. The read primary color signals R, G, and B are supplied to the matrix encoder 86 via the averaging circuit 85.

On the other hand, the primary color signals R, G and B are supplied to an interpolation circuit 87, where they are subjected to interpolation processing and at the same time, only the high band luminance component and the low band luminance component are extracted. The high-frequency luminance component is supplied to the detail / contrast circuit 88, where detail and contrast adjustment processing is performed. The high-frequency luminance component from the detail / contrast circuit 88 is supplied to the matrix encoder 86. Further, the low-frequency luminance component is the matrix encoder 86.
Is supplied to. The matrix encoder 86 supplies the primary color signals R, G and B to the masking circuit 89 and also generates a luminance signal Y and color difference signals RY and BY based on the primary color signals R, G and B, and these Output terminal 8 respectively
Output from 6y, 86r and 86b. The primary color signals R, G, and B supplied to the masking circuit 89 are supplied to the main computer 9 shown in FIG. 1 through the interface circuit 90 and the input / output terminal 91 after the color saturation is controlled here. To be done.

D. Control operation of the processor 5 shown in FIG. 1 (FIG. 4)

FIG. 4 is a flow chart showing the control operation of the processor 5 shown in FIG.

In step S1, the CPU of the processor 5
92 is supplied from the microcomputer 61 of the camera head 2 shown in FIG. 1 via the input / output terminal 93a,
A control signal indicating whether the orientation of the camera head 2 is portrait orientation or landscape orientation is accepted, it is determined whether the orientation indicated by the control signal is portrait orientation, and if “YES”, the process proceeds to step S2,
If “NO”, the process proceeds to step S3.

In step S2, the CPU of the processor 5
92 sets the start address of the area of the flash memory 95 in which the vertical direction bitmap data is stored.

In step S3, the CPU of the processor 5
92 sets the start address of the area of the flash memory 95 in which the horizontal bitmap data is stored.

In step S4, the CPU of the processor 5
92 judges whether the data is internal data or external data, and "YE
If "S", the process proceeds to step S5, and if "NO", the process proceeds to step S6. Here, the internal data means the vertical or horizontal direction bitmap data, and the external data means the input data supplied from the main computer 9 shown in FIG. 1 via the input / output terminal 91 and the interface circuit 90. To do. This input data is, for example, an ASCII code or the like. If the operator has specified that the remote controller 3 shown in FIG.
92 determines "YES" in this step S4, but this designation is not made and the main computer 9
If the data is transmitted from, the bitmap data corresponding to the data is generated.

In step S5, the CPU of the processor 5
The flash memory 95 supplies the flash memory 95 with the address data sequentially stepping from the head address of the area where the vertical or horizontal bit map data is stored, and the read control signal. As a result, the vertical or horizontal direction bitmap data is sequentially read from the flash memory 95.

In step S6, the CPU 92 obtains the bit map data based on the data from the main computer 9.

In step S7, the controller 96
A write control signal is supplied to the SRAM 97. As a result, the vertical or horizontal direction bitmap data read from the flash memory 95 or the bitmap data generated by the CPU 92 based on the data supplied from the main computer 9 is written in the SRAM 97.

In step S8, the controller 96
A read control signal is supplied to the SRAM 97. As a result, the bitmap data stored in the SRAM 96 is read. The bitmap data read from the SRAM 97 under the control of the controller 96 is once supplied to the controller 96, and is converted into 1-bit serial data here.

In step S9, the controller 96
The 1-bit serial data is supplied to the multiplexer 77. Then, the multiplexer 77 superimposes the primary color signals R, G and B from the gamma correction circuits 76r, 76g and 76b on the 1-bit serial data.

In step S10, the multiplexer 77
Supplies the superimposed signals of the primary color signals R, G and B and the 1-bit serial data to the DA converters 78r, 78g and 78b.

In step S11, the CPU 92 determines whether or not a control signal from the microcomputer 61 of the camera head 2 indicating that the processing is to be stopped is supplied via the input / output terminal 93a, and "YES". If so, the process ends. If "NO", the process returns to step S1.

E. Image example of shooting a subject with the camera head vertically (Fig. 5)

As described above, the orientation of the camera head 2 is detected, and the vertical or horizontal direction bitmap data stored in advance in the flash memory 95 is output according to the detection result. When the image and the menu image are superimposed, the directions on the image can be matched. It will be obvious with reference to FIGS. 5A and 5C. FIG. 5A is an example of a monitor image when the subject H is imaged with the camera head 2 facing sideways. In addition, FIG.
3 is an example of a monitor image when an image is captured. FIG. 5A
As shown in FIG. 3, when the subject H is photographed with the camera head 2 facing sideways, on the image displayed on the LCD 4 or the television monitor 6, the direction of the subject H and the direction of the menu image M1. Are matched. Further, as shown in FIG. 5B, when the subject H is photographed with the camera head 2 oriented vertically, on the image displayed on the LCD 4 or the television monitor 6,
The direction of the subject H and the direction of the menu image M match.

That is, the state shown in FIG. 5C, that is,
It is possible to avoid a state where the orientation of the subject H and the orientation of the menu image M2 do not match on the video. FIG.
In the state shown in C, for example, when the direction of the television monitor is set in accordance with the direction of the subject H,
Since the menu image M2 lies on the side of the operator, it is very difficult to see. On the other hand, if the direction of the television monitor is set in accordance with the direction of the menu image M2, that is, if the television monitor is set up with the left side down, the subject H lies sideways when viewed from the operator, which is very difficult to see.

However, in this embodiment, the orientation of the camera head 2 is detected, and the vertical or horizontal direction bitmap data stored in advance in the flash memory 95 is output according to the detection result. When the captured image and the menu image are superimposed, the directions on the image can be matched. Therefore, for the operator
A work environment that is easy to use can be provided, which in turn can improve work efficiency.

[0060]

According to the present invention described above, the superposition data held in the holding means is output based on the content of the detection output from the detection means, and the superposition data is captured by the superposition means. Since it is superimposed with the image output from the means,
There is an effect that the imaging output and the orientation of the superimposition data on the image can be matched.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an image capturing system showing an embodiment.

FIG. 2 is a configuration diagram showing a configuration example of a camera head shown in FIG.

FIG. 3 is a configuration diagram showing a configuration example of a processor shown in FIG.

FIG. 4 is a flowchart for explaining a control operation of the processor shown in FIG.

FIG. 5 is an explanatory diagram showing an example of an image displayed on a television monitor when the camera head is laid horizontally and vertically when the photographic system according to the present invention and the conventional photographic system are described.

[Explanation of symbols]

1 lens unit, 2 camera head, 3 remote controller, 4 LCD, 5 processor, 6 television monitor, 7 strobe drive circuit, 8 light emitting part, 9
Main computer, 10 printers, 11 terminators, 12 sub-computers, 50r, 50g, 50
b CCD, 51r, 51g, 51b CDS, 52
r, 52g, 52b process circuit, 53r, 53g,
53b gamma correction circuit, 54r, 54g, 54b, 65
Amplifier circuit, 56 CCD driver, 57 timing generator, 58 crystal oscillator, 59 sync signal generation circuit, 61 microcomputer, 62 sensor, 63 EEPROM, 70r, 70g, 70b
Amplification and phase compensation circuit, 71r, 71g, 71b A-
D converter, 72r, 72g, 72b Gamma correction circuit, 73 White control circuit, 74 VRAM, 75
Read control circuit, 76r, 76g, 76b Gamma correction circuit, 77 Multiplexer, 78r, 78g, 78
b DA converter, 79r, 79g, 79b low-pass filter, 80 encoder, 82 DRAM controller, 83r, 83g, 83b DRAM, 84 frame memory, 85 averaging circuit, 86 encoder, 8
7 Interpolation circuit, 88 detail / contrast circuit, 8
9 Masking circuit, 90 Interface circuit, 9
2 CPU, 93 bus, 94 EEPROM, 95
Flash memory, 96 controller, 97 SRA
M

Claims (2)

[Claims] 1. A direction detecting step of detecting a direction of an image pickup means for picking up light from a subject, a selecting step of selecting superimposition data according to a detection result of the direction detecting step, and a selecting step in the selecting step. And a superimposing step of superimposing the superimposition data on the imaging output from the imaging means. 2. An image pickup means for picking up light from a subject, a detection means for detecting the direction of the image pickup means, different superimposition data are held, and based on the content of the detection output from the detection means, The superimposing data generating means outputs the superimposing data held in the holding means, and the superimposing means for superimposing the superimposing data from the superimposing data generating means and the image pickup output from the image pickup means. Imaging device.