JPH09270499A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize low cost and miniaturization for a semiconductor substrate and a semiconductor device by reducing a drop in space factor of picture elements formed on a photoelectric conversion substrate due to wiring of lead out wire and electric connections formed on a semiconductor substrate for photoelectric conversion substrate of the semiconductor device. SOLUTION: This semiconductor device has a configuration equipped with a semiconductor substrate 100 having a plurality of integrated circuit elements and wiring means 200a to 200d for electrically connecting a plurality of integrated circuit elements to the outer portion of the semiconductor substrate 100. A first connecting electrode for electrically connecting to the outside is provided in at least one integrated circuit element of a plurality of integrated circuit elements, and the first connecting electrode is electrically connected to a second connecting electrode 520 for external wiring provided in wiring means.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device formed by a large area process, for example, a display device using a thin film transistor such as a liquid crystal television or a liquid crystal projector, a facsimile, a digital copy or an X-ray imaging device. The present invention relates to a semiconductor device such as a photoelectric conversion device of the same size reading system that uses a thin film semiconductor for the photoelectric conversion element.

[0002]

2. Description of the Related Art In recent years, thin film transistors (hereinafter referred to as TFTs) have been developed.
A two-dimensional image reading apparatus such as a liquid crystal display panel of a television set using the above) or an X-ray imaging apparatus using a photoelectric conversion element of a thin film semiconductor has been developed.

FIG. 8 is a schematic configuration diagram of a two-dimensional image reading apparatus using a photoelectric conversion element which is a semiconductor device, FIG. 9 is a sectional view taken along the line AA 'of FIG. 8, and FIG. 10 is a line BB' of FIG. FIG.

In FIG. 8, reference numeral 1 denotes a translucent insulating substrate, and a pixel 300 composed of a photoelectric conversion element, a TFT and the like on the translucent insulating substrate 1 has a pixel pitch of:
It is regularly arranged in a matrix of 200 × 200 with 0.2 mm.

A common control wiring (not shown) for controlling the TFTs in the pixel 300 is connected from one side of the pixel area by drawing wirings Lg1 to Lg200 for each pixel column, and 100 lines each are connected to the electric connecting portions 500a and 500b. Are connected to each connection electrode 510. In addition, the lead wires Lsig1 to Ls are provided from the other side of the pixel region.
The sig 200 is connected to a common signal wiring (not shown) for reading a signal from the photoelectric conversion element in the pixel 300 for each pixel row, and similarly, the electrical connection portions 500c and 5c.
00d and connected to each connection electrode 510.

The arrangement of the connection electrodes 510 in each of the connection portions 500a to 500d is similarly configured. In the conventional example, the connection electrode 51 of each of the electric connection portions 500a to 500d is arranged.
The number 0 is 100 lines, the electrode length is 3 mm, the electrode pitch is 0.1 mm, and the electrode width is 0.05 mm.

Reference numerals 200a to 200d denote wiring means, which are film-shaped printed wiring boards 202 such as tape carriers (Tape Automated Bonding) and flexible printed circuits (Flexible Printed Circuits), and Cu formed on the wiring boards 202 are plated with Sn or the like. The wiring 201 is provided, and the connection electrode 520 made of the same material as the wiring 201. Connection electrode 52 of each wiring means 200a-200d
The arrangement of 0 means that each electric connection portion 50 on the photoelectric conversion substrate 100 is
0a to 500d are formed so as to be opposed to the arrangement of the connection electrodes 510. For example, in the conventional example, the connection electrodes 520 of the wiring means 200a to 200d are arranged and connected to each other. Number of electrodes of electrode 520: 1
00 line, electrode pitch: 0.1 mm, electrode width: 0.
It is formed with 05 mm.

A coverlay 203 made of the same material as the solder resist or the printed wiring board 202 is formed on the wiring 201 except for the connection electrodes 520 in the electric connecting portions 500a to 500d of the wiring means 200a to 200d. There is.

As shown in FIGS. 9 and 10, the photoelectric conversion substrate 100 and the wiring means 200a to 200d are connected to the connection electrodes 510 on the photoelectric conversion substrate 100 and the wiring means 200a to 200d at the respective electrical connection portions 500a to 500d. 200d
It is arranged so as to face and overlap the upper connection electrode 520, and is electrically connected via the anisotropic conductive film 400 between them. The anisotropic conductive film 400 includes conductive particles 4 such as fine metal particles in a thermosetting or thermoplastic film-like adhesive material.
01 is dispersed, and the conductive particles 401 existing between the upper and lower electrodes are pressure-contacted and connected by thermocompression bonding, the adhesive is cured, and the photoelectric conversion substrate 100 and the wiring means 200a to 200d are bonded. Fixed. In this way, the photoelectric conversion substrate 100 and the external electric circuit (not shown) are electrically connected.

In such an electrical connection, the overlapping area of the connection electrode 510 and the connection electrode 520 is larger than that of other connection methods, and the size of each of the electrical connection portions 500a to 500d is 2 in the length direction of the connection electrode. It occupies about 5 mm.

Further, since the connection is carried out by thermocompression bonding, the wiring board 202 of the wiring means is thermally expanded so that the connection electrode 520 is formed.
The cumulative pitch of the photoelectric conversion substrate 100 is changed.
The pattern pitch with the upper connection electrode 510 is deviated. Therefore, the width of the wiring means cannot be wide, and the number of connection electrodes per wiring means is limited. Photoelectric conversion substrate 100
When the number of pixels on the upper side and the number of connecting electrodes increase, a plurality of electric connecting portions 500 are arranged as in the conventional example (2 in the conventional example).
(2 locations x 2 locations) and multiple wiring means are connected (2 locations x 2 locations in this conventional example). However, in this case, the wiring means 200a and 200b and 200c and 20
Between 0d, a certain degree of clearance is required in order to avoid interference due to the accuracy of the external dimensions of the wiring means and the contact with the pressure head of the thermocompression bonding machine. Therefore, the pixel 30
A connection electrode cannot be formed on a line between the common control wiring and the common signal wiring within 0, and a deviation occurs. Therefore, Lg1
Each wiring in the pixel 300 is connected to the connection electrode by a lead wiring such as Lg200 and Lsig1 to Lsig200.

[0012]

However, in the above-described conventional semiconductor device, the electrical connection portions 500a to 500d and the connection electrodes 510, which are the regions where the connection electrodes 510 formed on the photoelectric conversion substrate 100 are formed, and the pixels. 300
Lead-out wiring Lg with common control wiring and common signal wiring inside
1 to Lg200 and Lsig1 to Lsig200 are required to be formed in the regions, so that the photoelectric conversion substrate 100 becomes larger than the pixel region, which causes a problem that the semiconductor device is enlarged.

Further, when manufacturing such a photoelectric conversion substrate, a large-sized light-transmitting substrate larger than the photoelectric conversion substrate is used, and a plurality of photoelectric conversion substrates are formed on the large-size light-transmitting substrate. , Each photoelectric conversion substrate can be divided by a slice or the like. However, since the photoelectric conversion substrate 100 becomes large, the number of photoelectric conversion substrates 100 that can be formed on a large-sized translucent substrate is reduced, which causes a problem of high cost.

An object of the present invention is to reduce a reduction in the occupation rate of pixels formed on a photoelectric conversion substrate due to electrical connection portions and lead wirings formed on a semiconductor substrate such as a photoelectric conversion substrate of a semiconductor device. Miniaturization of semiconductor substrates and semiconductor devices
An object is to provide a semiconductor device that can be manufactured at low cost.

[0015]

According to the present invention, there is provided a semiconductor device comprising:
In a semiconductor device including a semiconductor substrate having a plurality of integrated circuit elements, and wiring means for electrically connecting the plurality of integrated circuit elements to the outside of the semiconductor substrate, at least one of the plurality of integrated circuit elements is provided. A first connection electrode for electrically connecting to the outside is provided in the integrated circuit element,
The first connection electrode is electrically connected to a second connection electrode for external wiring provided in the wiring means.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, the operation of the present invention will be described.

According to the present invention, since the connection electrode is provided inside the integrated circuit element formed on the semiconductor substrate, it is not necessary to form the connection electrode or the lead wiring outside the integrated circuit element region.

Therefore, the occupation ratio of the photoelectric conversion elements formed on the semiconductor substrate such as the photoelectric conversion substrate of the semiconductor device is increased, the semiconductor substrate can be miniaturized, and the semiconductor substrate can be formed in a large-sized light-transmitting substrate. Since it is possible to increase the number of semiconductor devices manufactured, it is possible to provide a small-sized and low-cost semiconductor device.

The element structure in the integrated circuit element is not particularly limited. For example, when the present invention is used as a photoelectric conversion device, the integrated circuit element may be a photoelectric conversion element or a photoelectric conversion element and a thin film transistor. It can be composed of a switch element. Further, when the present invention is used as a liquid crystal display device, it can be constituted by a switch element such as a thin film transistor.

Next, embodiments of the present invention will be described in detail with reference to the drawings. 1, FIG. 2 and FIG. 3 are diagrams for explaining the configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 1 is a schematic plan view of a two-dimensional image reading apparatus using a photoelectric conversion element which is a semiconductor device. 2 is a sectional view taken along the line AA 'of FIG. 1, and FIG. 3 is a sectional view taken along the line BB' of FIG.

FIGS. 1, 2 and 3 correspond to FIGS. 8, 9 and 10, respectively, used in the conventional example. In FIGS. 1 to 3, the same components as those in FIGS. Corresponding parts are designated by the same reference numerals to simplify or omit the description.

As shown in FIG. 1, in this embodiment,
The semiconductor substrate 100 is regularly arranged in a matrix of 200.times.200 pixels 300 formed by photoelectric conversion elements, TFTs, etc. on the translucent insulating substrate 1 as in the conventional example shown in FIG. It is arranged at 2 mm.

As is apparent from FIG. 1, in this embodiment, the electrical connection portions 500a to 500d are formed in the pixel region. As shown in FIGS. 2 and 3, the connection electrodes of the photoelectric conversion substrate 100 of the semiconductor device of the present embodiment have common signal lines Sig1 to Sig1 formed in the pixel 300 formed on the translucent insulating substrate 1. Sig200 and common control wirings g1 to g200, and the respective electrical connection portions 500a to 500a.
Common signal wirings Sig1 to Sig in the pixel 300 of 00d
The protective layer 7 made of a SiNx film or the like provided on or around the 200 and the common control wirings g1 to g200 is removed by etching.

In the present embodiment, each electrical connection portion 500
a common signal line S in the pixel 300 corresponding to a to 500d
ig1 to Sig100, Sig101 to Sig200, and common control wirings g1 to g100, g101 to g200 are arranged with an electrode length (= removal length of protective film) of 3 mm, and the other configurations are common to all pixels. The pitch between the connection electrodes (= common signal wiring and control wiring) = pixel pitch: 0.2 mm, and the width of the connection electrode (= common signal wiring common wiring and control wiring): 0.02 mm.

Reference numerals 200a to 200d denote wiring means, and the connection electrodes 520 of the wiring means 200a to 200d are arranged so that the connection electrodes (500a to 500d) formed on the photoelectric conversion substrate 100 respectively correspond to the connection electrodes ( = Common signal wiring or common control wiring). For example, in the present embodiment, the connection electrodes 520 of the wiring means 200a to 200d are arranged in the same manner, The number of connecting electrodes 520 is:
100 lines, pitch between electrodes: 0.2 mm, electrode width:
It is formed with 0.02 mm. Also, the wiring means 200a
Each of the wiring boards 202 to 200d is formed of a translucent wiring board using a material such as polyester.

As shown in FIGS. 2 and 3, the photoelectric conversion substrate 100 and the wiring means 200a to 200d are arranged such that the common signal wirings Sig1 to Sig100 and Sig101 to Sig101 to sig on the photoelectric conversion substrate 100 at the respective electrical connection portions 500a to 500d.
200 and common control wiring g1 to g100, g101 to g
Connection electrodes formed by 200 and respective wiring means 200a
They are arranged so as to face and overlap with the connection electrode 520 (second connection electrode) on the upper surface of the first electrode 200d to the second electrode 200d, and are electrically connected via the anisotropic conductive film 400 therebetween. In this embodiment, in the anisotropic conductive film 400, flexible elastic conductive particles 402 obtained by plating a metal such as Ni around a minute resin ball are dispersed in a thermosetting film-like adhesive material. The conductive particles 402 existing between the upper and lower electrodes are electrically connected to each other by pressure contact by heating and pressure bonding using the above-described one, and thus the semiconductor device of this embodiment is formed.

In the two-dimensional image reading apparatus of FIG. 1, wiring means 200a and 200b, wiring means 200c and 200d.
Is substantially parallel (means parallel or nearly parallel) so that the electrical connection portions are along the opposite sides of the translucent insulating substrate 1.
However, the present invention does not necessarily have to have such wiring means. FIG. 7 is a schematic plan view showing another arrangement of the wiring means. Note that only the wiring means 200c and 200d are shown here for simplification of description.

As shown in FIG. 7, the wiring means 200c and the wiring means 200d are substantially parallel to each other along the same side of the translucent insulating substrate 1 (meaning parallel or nearly parallel).
And are arranged in the lengthwise direction of the wiring means while being displaced by the width (l) of the electrical connection portion. Wiring means 2
00c and the wiring means 200d (the electrode connecting portion 500c and the electrode connecting portion 500d) are displaced by a width (l) of the electrical connecting portion.
The wiring means 200a and 200 of FIG.
b, the wiring means 200c and 200d are arranged so that the offset width is maximized. In this way, the wiring means 200
The width by which c and the wiring means 200d are displaced is set to be equal to or larger than the width (l) of the electric connecting portions 500a and 500b.
Alternatively, when 500c and 500d are arranged close to each other, the clearances G1 and G2 in the lengthwise direction between the electric connecting portions are substantially obtained. The clearances G1 and G2 can be obtained even if they are close to each other in the length direction, and even if they overlap.

Next, with reference to FIGS. 2, 3 and 4, the structure in the pixel of the image reading device which is the semiconductor device of this embodiment will be described.

Incidentally, FIG. 4 shows the first electrode formed on the photoelectric conversion substrate.
It is a top view of a part corresponding to a pixel. Further, each cross section of the pixel 300 in the cross sectional view of FIG.
It corresponds to a cross section. FIG. 4 shows the pixel 300 on the right side of FIG. 2, that is, the pixel 300 where the common control wiring g1 and the common signal wiring Sig1 intersect.

As shown in FIG. 4, the pixel 300 includes a photoelectric conversion element S1001, a TFT T1001, and a capacitor C.
1001, common control wiring g1, common signal wiring Sig1,
It is composed of a common refresh line RF. Such pixels are integrally formed on the translucent substrate 1 by a simple process so as to be aligned and arranged in the same configuration and the same pattern.

As shown in FIGS. 2 and 3, the lower conductive layer 2, S made of Cr, ITO or the like is formed on the transparent insulating substrate 1.
Insulating layer 3 made of iNx film or the like, i made of a-Si: H
Layer 4, n ⁺ -a-Si: top conductive layer 6 made of made n ⁺ layer 5, Al, etc. from H is formed, further, a SiNx film or the like for protecting stabilizing covering the semiconductor surface and the side surface of the element The protective layer 7 is provided. As described above, the protective layer is not formed on the common control wiring or the common signal wiring that is formed of the upper conductive layer 6 at the portion corresponding to the electrical connection portion and having the function of the connection electrode (first connection electrode). Not not.

Next, the operation of the photoelectric conversion substrate which is the semiconductor substrate of this embodiment will be described with reference to FIGS.
Note that FIGS. 5 and 6 will be described using a photoelectric conversion substrate in 3 × 3 pixels for simplification of description.

FIG. 5 is a circuit diagram for explaining the operation of the photoelectric conversion substrate of this embodiment, and FIG. 6 is its timing chart.

In FIG. 5, S11 to S33 are photoelectric conversion elements, the lower electrode side of which is G and the upper electrode side of which is D.
C11 to C33 are storage capacitors, and T11 to T33 are transfer TFTs. Vs is a power source for reading, Vg is a power source for refreshing, and switches SWs and S are respectively provided.
It is connected to the G electrodes of all the photoelectric conversion elements S11 to S33 via Wg. The switch SWs is directly connected to the refresh control circuit RF via the inverter, and the switch SWg is directly connected to the refresh control circuit RF.
Connected to the switch SWg during the refresh period.
Is controlled to turn on. One pixel is composed of one photoelectric conversion element, a capacitor, and a TFT, and its signal output is connected to the detection integrated circuit IC by common signal wirings sig1 to sig3. The photoelectric conversion substrate divides a total of 9 pixels into 3 blocks, and simultaneously transfers the output of 3 pixels per block, and common signal lines sig1 to sig3
Is sequentially converted into an output by the detection integrated circuit IC and output (Vout). Each pixel is two-dimensionally arranged by arranging three pixels in one block in the horizontal direction and sequentially arranging the three blocks in the vertical direction.

As shown in FIG. 6, first, the control wirings g1 to g3 and s1 are made by the shift registers SR1 and SR2.
Hi is applied to ~ s3. Then transfer TFT T1
1 to T33 and the switches M1 to M3 are turned on to be conductive, and the D electrodes of all the photoelectric conversion elements S11 to S33 are at the GND potential (because the input terminal of the integration detector Amp is designed at the GND potential). At the same time, the refresh control circuit RF becomes Hi.
Is output, the switch SWg is turned on, and all photoelectric conversion elements S11 are output.
The G electrode in steps S33 to S33 has a positive potential due to the refresh power supply Vg. Then, all the photoelectric conversion elements S11 to S33 enter the refresh mode and are refreshed. Next, the refresh control circuit RF outputs Lo, the switches SWs are turned on, and the G electrodes of all the photoelectric conversion elements S11 to S33 are set to a negative potential by the reading power supply Vs. Then, all the photoelectric conversion elements S11 to S33 enter the photoelectric conversion mode, and at the same time, the capacitors C11 to C33 are initialized. In this state, the control registers g1 to g are controlled by the shift registers SR1 and SR2.
3, Lo is applied to s1 to s3. Then transfer TF
The switches M1 to M3 of T · T11 to T33 are turned off,
The D electrodes of all the photoelectric conversion elements S11 to S33 are open in terms of DC, but the potentials are held by the capacitors C11 to C33. However, since no irradiation light is incident at this time, no light is incident on all the photoelectric conversion elements S11 to S33 and no photocurrent flows. When the irradiation light is emitted in a pulsed or continuous manner in this state to irradiate the document, the reflected light is incident on the photoelectric conversion elements S11 to S33.
This light contains information about the image of the document. The photocurrent flowing by this light is used as an electric charge in each capacitor C1.
1 to C33, which are retained even after the irradiation of incident light is completed. Next, a Hi control pulse is applied to the control wiring g1 by the shift register SR1, and v1 to v3 are switched through the switches M1 to M3 of the transfer TFTs T11 to T33 by applying the control pulse to the control wirings s1 to s3 of the shift register SR2. It is output sequentially. Similarly, the register S
Other optical signals are also sequentially output under the control of R1 and SR2. As a result, two-dimensional information on the document is obtained as v1 to v9. The operation up to this point is performed to obtain a still image, but the operation up to here is repeated to obtain a moving image.

In the semiconductor device of this embodiment, as shown in FIG. 1, the pixel 3 corresponding to each of the electrical connecting portions 500a to 500d formed on the photoelectric conversion substrate 100 which is a semiconductor substrate.
Common signal lines Sig1 to Sig100, Sig100
101-200 and common control wiring g1-g100, g1
01-g200 as a connection electrode, the electrical connection portion 500a-
By forming 500d in the pixel region, the electric connection portion and the lead wiring formed outside the conventional pixel region are unnecessary. Therefore, since a semiconductor substrate having a high pixel occupancy rate can be obtained, the semiconductor substrate can be downsized, and
It is possible to increase the number of semiconductor substrates that can be formed on a large-sized light-transmitting substrate. As a result, it is possible to provide a small-sized and low-cost semiconductor device.

Further, in this embodiment, as shown in FIG. 1, the electrical connection portions 500a and 50a required in rows or columns are provided.
Since 0b, 500c, and 500d are arranged horizontally offset from the connection electrode (along the opposing sides), the clearance between the wiring means is wide, and the wiring means is connected at the electrical connection portion. Since it is not adjacent to the electrode in the vertical direction, no interference occurs due to the accuracy of the external dimensions of the wiring means. It is also possible to increase the adhesive strength by widening the width of the wiring substrate on both sides of the connection electrode of the wiring means to widen the adhesive surface. Further, in the connection through the anisotropic conductive film, the length of the thermocompression-bonding pressure head in the direction perpendicular to the electrode is sufficiently longer than the connecting electrode portion of the wiring means, so that the pressure surface temperature of the pressure head becomes uniform. It is possible to perform thermocompression bonding with a small number of parts for reliable and stable connection, and at the time of repair work, it is possible to carry out the work without splashing or permeating the solvent or the like into the adjacent electric connection part, and the repair work can be performed easily.

Further, in the present embodiment, as shown in FIGS. 2 and 3, the flexible conductive particles in which metal such as Ni is plated on the periphery of the resin ball which is minutely elastically deformed on the anisotropic conductive film 400. Since the connection is performed using the dispersed 402, the insulating layer 3 formed below the connection electrode
Etc., damage to the intermediate layer is reduced, and conductive particles, such as when hard Ni particles are used, cause a short circuit between the connection electrode and the lower wiring g1 formed in the lower conductive layer 2 below the connection electrode. It is possible to eliminate the problem. Further, as the conductive particles 402, flexible conductive particles obtained by plating a metal such as Ni around a plastic ball that is plastically deformable may be used. Further, in this embodiment, since the wiring board 202 has a light-transmitting property, the electrical connection portion 500a
Photoelectric conversion element S1 of the pixel 300 located within 500d
Also in 001, the light incident on the wiring means 202 from the upper surface direction of the photoelectric conversion substrate 100 can be directly received,
No insensitivity region is generated due to the arrangement of the wiring means.

[0041]

As described above, in the semiconductor device of the present invention, the wiring in the pixel, which needs to be connected to the external electric circuit corresponding to the electric connection portion formed on the semiconductor substrate, is used as the direct connection electrode. There is no need for an electrical connection portion or a lead wire formed outside. Therefore, since a semiconductor substrate having a high pixel occupation ratio can be obtained, the semiconductor substrate can be downsized and the number of semiconductor substrates that can be formed over a large-sized light-transmitting substrate can be increased. As a result, it is possible to provide a small-sized and low-cost semiconductor device.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along the line A-A ′ shown in FIG.

3 is a cross-sectional view taken along the line B-B 'shown in FIG.

FIG. 4 is a plan view showing a configuration of one pixel of a semiconductor substrate according to an embodiment of the present invention.

FIG. 5 is a circuit diagram for explaining the operation of the semiconductor substrate in the embodiment according to the present invention.

FIG. 6 is a timing chart for explaining the operation of the semiconductor substrate in the embodiment according to the present invention.

FIG. 7 is a schematic plan view showing another arrangement of wiring means.

FIG. 8 is a schematic configuration diagram of a conventional semiconductor device according to a related art.

9 is a cross-sectional view taken along the line A-A 'shown in FIG.

10 is a cross-sectional view taken along the line B-B 'shown in FIG.

[Explanation of symbols]

1 translucent insulating substrate, 2 lower conductive layer, 3 insulating layer, 4 i layer, 5 n ⁺ layer, 6 upper conductive layer, 7
Protective layer, 100 Photoelectric conversion substrate, 200a to 200
d wiring means, 201 wiring means wiring, 202 wiring means wiring substrate, 203 wiring means coverlay,
300 one pixel, 400 anisotropic conductive film, 401,
402 conductive particles, 500a-500d electrical connection,
510 connection electrode formed on photoelectric conversion substrate, 520
Connection electrodes formed on the wiring means, g1 to g200, common control wiring formed on the photoelectric conversion substrate, Sig1 to Sig
200 common signal wiring formed on the photoelectric conversion substrate, S
1001 photoelectric conversion element formed on a photoelectric conversion substrate,
T1001 TFT formed on the photoelectric conversion substrate, C1
001 Capacitor formed on photoelectric conversion substrate, RF
A common refresh line formed on the photoelectric conversion substrate.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification number Agency reference number FI Technical indication H01L 29/786

Claims (8)

[Claims] 1. A semiconductor device comprising: a semiconductor substrate having a plurality of integrated circuit elements; and wiring means for electrically connecting the plurality of integrated circuit elements to the outside of the semiconductor substrate, wherein the plurality of integrated circuits are provided. A first connection electrode for electrically connecting to the outside is provided in at least one integrated circuit element of the element, and the first connection electrode is a second connection electrode for external wiring provided in the wiring means. A semiconductor device, which is electrically connected to a connection electrode. 2. At least two wiring means arranged substantially in parallel are provided, and the second connection electrode of each wiring means and the first connection electrode of the semiconductor substrate are electrically connected at an electrical connection portion. The two wiring means are arranged such that the electrical connection portions are separated from each other in the length direction of the wiring means by a length equal to or larger than the width of the electrical connection portion. 1. The semiconductor device according to 1. 3. The first connection electrode provided on the semiconductor substrate and the second connection electrode provided on the wiring means are opposed to each other and electrically connected to each other. The semiconductor device according to claim 1 or 2. 4. The first connecting electrode provided on the semiconductor substrate and the second connecting electrode provided on the wiring means are electrically connected via an anisotropic conductive film. The semiconductor device according to any one of claims 1 to 3. 5. The conductive particles contained in the anisotropic conductive film have flexibility or flexibility.
3. The semiconductor device according to claim 1. 6. The semiconductor device according to claim 1, wherein the integrated circuit element includes a photoelectric conversion element, or a photoelectric conversion element and a switch element. 7. The semiconductor device according to claim 1, wherein the integrated circuit element is composed of a switch element. 8. The semiconductor device according to claim 1, wherein the wiring board of the wiring means is made of a translucent material.