JPH09266153A - Electron beam exposure method - Google Patents
Electron beam exposure methodInfo
- Publication number
- JPH09266153A JPH09266153A JP7409896A JP7409896A JPH09266153A JP H09266153 A JPH09266153 A JP H09266153A JP 7409896 A JP7409896 A JP 7409896A JP 7409896 A JP7409896 A JP 7409896A JP H09266153 A JPH09266153 A JP H09266153A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- partial
- partial batch
- electron beam
- transfer
- Prior art date
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体基板上に半
導体集積回路などの回路パターンを形成するために半導
体基板に被着されたレジスト膜に電子ビームでパターン
を形成する電子線露光方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron beam exposure method for forming a pattern on a resist film deposited on a semiconductor substrate with an electron beam in order to form a circuit pattern of a semiconductor integrated circuit or the like on the semiconductor substrate.
【０００２】[0002]
【従来の技術】近年、半導体集積回路の進歩は目ざまし
く、特にＤＲＡＭに代表されるメモリ素子では記憶容量
の３年毎に４倍という大容量化が実現されている。この
進歩は微細加工技術の進歩によるところが大きく、特に
リソグラフィ技術の進歩に依存するものである。2. Description of the Related Art In recent years, the progress of semiconductor integrated circuits has been remarkable, and in particular, in memory devices such as DRAMs, the storage capacity has been increased to four times every three years. This progress is largely due to advances in microfabrication technology, and in particular depends on advances in lithography technology.
【０００３】微細パターンを半導体基板であるウェハー
上に形成するには、紫外光を光源とした縮小露光装置、
いわゆるステッパーが用いられていた。ところが、より
微細パターンを転写するために、光源の短波長化が行な
われ、水銀ランプのｇ線（４３６ｎｍ）から同じ水銀ラ
ンプのｉ線（３６５ｎｍ）へ、さらには弗化クリプトン
ガスを用いたＫｒＦエキシマレーザ光（２４９ｎｍ）へ
と変化してきた。ところが光源の短波長化による微細パ
ターンの転写能力、すなわち解像力の向上は、逆に焦点
深度の低下を招いている。To form a fine pattern on a wafer which is a semiconductor substrate, a reduction exposure apparatus using ultraviolet light as a light source,
So-called steppers were used. However, in order to transfer a finer pattern, the wavelength of the light source is shortened. From the g-line (436 nm) of the mercury lamp to the i-line (365 nm) of the same mercury lamp, and further, KrF using krypton fluoride gas is used. It has changed to excimer laser light (249 nm). However, the improvement of the fine pattern transfer capability, that is, the resolution, by shortening the wavelength of the light source, on the contrary, leads to the reduction of the depth of focus.
【０００４】また、半導体集積回路の製造に於いては、
１０〜３０回ものパターン転写を繰り返すため、半導体
基板上にはパターンが順次重ねられ大きな段差が生じて
くる。従って、焦点深度の低下は段差上へのパターン転
写を困難とし半導体集積回路の製造を難しくしている。
そこで焦点深度が光露光に比べ飛躍的に深い電子線露光
法が注目されている。In the production of semiconductor integrated circuits,
Since the pattern transfer is repeated 10 to 30 times, the patterns are sequentially superimposed on the semiconductor substrate, resulting in a large step. Therefore, a decrease in the depth of focus makes it difficult to transfer a pattern onto a step and makes it difficult to manufacture a semiconductor integrated circuit.
Therefore, the electron beam exposure method, which has a dramatically deeper depth of focus than that of optical exposure, is drawing attention.
【０００５】この電子線露光法は半導体集積回路パター
ンをスポットの小さな電子ビーム（スポットビーム描
画）、あるいは寸法可変の矩形ビーム（可変成形描画）
で順次パターンを倣って描画するため、より微細化が可
能であるものの、光露光法に比べ処理能力の低いことが
問題であった。しかしながらこの一筆描き描画方法に代
って、新たに半導体集積回路の一部を形成したアパーチ
ャを用い一括転写し、それらの一括パターンを繋げて全
体の回路パターンを転写する部分一括電子線露光法が開
発され処理能力が飛躍的に向上した。In this electron beam exposure method, a semiconductor integrated circuit pattern is formed by an electron beam having a small spot (spot beam drawing) or a rectangular beam of variable size (variable shaping drawing).
Since the pattern is drawn sequentially in accordance with step 2, the miniaturization is possible, but there is a problem that the processing capacity is lower than that of the light exposure method. However, instead of this one-stroke drawing method, a partial batch electron beam exposure method is used in which a batch transfer is performed using an aperture that newly forms a part of a semiconductor integrated circuit, and those batch patterns are connected to transfer the entire circuit pattern. It has been developed and the processing capacity has improved dramatically.
【０００６】図３は部分一括露光法を説明するための電
子線露光装置の一例の電子光学系の構成を示す斜視図で
ある。この部分一括露光法は、図３に示すように、電子
銃１からの電子ビーム８を第１アパーチャ２によって適
当な大きさおよび形状に成形し、その後選択偏向器３に
より第２アパーチャ４上に照射する。この第２アパーチ
ャ４には半導体集積回路パターンの一部である部分一括
パターン群および可変成形ビームを作成可能な矩形開口
が形成され、選択偏向器３によりこれらのパターン群の
うちの１つあるいは矩形開口が選択される。そして選択
された第２アパーチャ４のパターン群あるいは矩形開口
を通過した電子ビームは、対物レンズである縮小レンズ
５により縮小され、さらに、位置決め偏向器６により半
導体基板７上の所望の位置に部分一括パターンの転写あ
るいは可変成形パターンを描画する。FIG. 3 is a perspective view showing the structure of an electron optical system as an example of an electron beam exposure apparatus for explaining the partial collective exposure method. In this partial collective exposure method, as shown in FIG. 3, an electron beam 8 from an electron gun 1 is shaped into an appropriate size and shape by a first aperture 2 and then formed on a second aperture 4 by a selective deflector 3. Irradiate. The second aperture 4 is formed with a partial collective pattern group which is a part of the semiconductor integrated circuit pattern and a rectangular aperture capable of forming a variable shaped beam, and one of these pattern groups or a rectangular shape is formed by the selective deflector 3. An aperture is selected. Then, the electron beam that has passed through the selected pattern group of the second aperture 4 or the rectangular aperture is reduced by the reduction lens 5 which is an objective lens, and is further partially bundled at a desired position on the semiconductor substrate 7 by the positioning deflector 6. Transfer patterns or draw variable shaped patterns.
【０００７】ここで、部分一括露光装置でも可変成形描
画も行なうようになっている理由を説明する。ＤＲＡＭ
に代表されるメモリ素子のメモリセル部分は同一パター
ンが繰り返されているため、一旦第２アパーチャ４上に
メモリセルパターンの一部を形成すれば、部分一括転写
により半導体基板７上に順次パターン形成することが可
能である。これに対し、周辺回路領域はパターンの繰り
返しが少なく、異なるパターンが膨大に配置されてい
る。この為、周辺露光領域を部分一括転写しようとする
と、第２アパーチャ４上に膨大な数の部分一括パターン
を形成しなければならないが、一方で選択偏向器３で電
子ビームを偏向できる領域には数〜数十の部分一括パタ
ーンしか入らず、周辺回路領域全体にパターン転写する
ことができない。そこで、周辺回路領域のパターン形成
には、部分一括転写法ではなく第２アパーチャ４上の矩
形開口部を利用する可変成形描画法が用いられている。
第１アパーチャ２を通過した電子ビームを第２アパーチ
ャ４の矩形開口部に照射する時に、照射位置を選択偏向
器３により適宜変化させることにより、任意の大きさの
矩形ビームを形成し、それにより周辺回路領域のパター
ンを可変成形描画できるようにしている。Here, the reason why the partial collective exposure apparatus also performs variable shaping drawing will be described. DRAM
Since the same pattern is repeated in the memory cell portion of the memory element represented by the above, once a part of the memory cell pattern is formed on the second aperture 4, pattern formation is sequentially performed on the semiconductor substrate 7 by partial batch transfer. It is possible to On the other hand, the peripheral circuit region has few patterns repeated and a large number of different patterns are arranged. For this reason, when attempting to partially transfer the peripheral exposure area, it is necessary to form a huge number of partial collective patterns on the second aperture 4. On the other hand, in the area where the selective deflector 3 can deflect the electron beam. Only a few to several tens of partial batch patterns are included, and the pattern cannot be transferred to the entire peripheral circuit area. Therefore, a variable shaping drawing method utilizing a rectangular opening on the second aperture 4 is used for pattern formation in the peripheral circuit region, instead of the partial batch transfer method.
When irradiating the rectangular aperture of the second aperture 4 with the electron beam that has passed through the first aperture 2, the irradiation position is appropriately changed by the selective deflector 3 to form a rectangular beam of an arbitrary size. The pattern of the peripheral circuit area can be drawn by variable shaping.
【０００８】図９は半導体基板上に形成されたメモリ素
子のパターンの一部の上面図である。点線で囲まれた領
域ＡＢＣＤに形成された部分一括パターン９は、部分一
括の一転写により形成されたものであり、順次継いで転
写されることによりメモリセル領域が形成される。メモ
リセル領域に隣接する周辺回路領域には、可変成形パタ
ーン１０が種々の寸法ｋ1 〜ｋ13の可変成形ビームによ
り形成される。FIG. 9 is a top view of a part of the pattern of the memory element formed on the semiconductor substrate. The partial batch pattern 9 formed in the area ABCD surrounded by the dotted line is formed by one partial batch transfer, and the successive transfer is performed to form the memory cell area. In the peripheral circuit area adjacent to the memory cell area, the variable shaped pattern 10 is formed by the variable shaped beam having various dimensions k 1 to k 13 .
【０００９】ところでこのような部分一括転写と可変成
形描画を用いる電子線露光法では、部分一括転写パター
ンと部分一括転写パターンとの継ぎ部分、部分一括転写
パターンと可変成形パターンとの継ぎ部分及び可変成形
パターンと可変成形パターンとの継ぎ部分でパターンが
正確に継がらないことがある。図１０（ａ）〜（ｂ）は
正確に継がらなかったパターンの例である。図１０
（ａ）は部分一括パターン９が所定の大きさよりも大き
い場合である。部分一括用のアパーチャ上に形成されて
いる部分一括パターンが所定の大きさよりも大きく形成
されていたり、あるいは描画時に電子線照射によって部
分一括用アパーチャが加熱され膨張したり、あるいは縮
小レンズが何らかの理由によって縮小率に誤差が生じた
り、種々の理由によって大きくなったものである。By the way, in the electron beam exposure method using such partial batch transfer and variable shaping drawing, the spliced portion between the partial batch transfer pattern and the partial batch transfer pattern, the spliced portion between the partial batch transfer pattern and the variable shaping pattern, and the variable molding pattern are used. The pattern may not be accurately spliced at the splicing portion between the molding pattern and the variable molding pattern. FIG. 10A and FIG. 10B are examples of patterns that are not accurately continued. FIG.
(A) is a case where the partial batch pattern 9 is larger than a predetermined size. The partial batch pattern formed on the partial batch aperture is formed larger than a predetermined size, or the partial batch aperture is heated and expanded by electron beam irradiation during drawing, or the reduction lens is for some reason. This causes an error in the reduction rate, or increases due to various reasons.
【００１０】この時、部分一括パターン９間に重なり領
域１１が、また部分一括パターン９と可変成形パターン
１０の間に重なり領域１２が生じる。重なり領域１１，
１２ではレジスト膜に所定の露光量の２倍の電子線が照
射されてしまい、パターンが所定の寸法より大きくな
り、節が生じたり、本来分離しているべき近傍のパター
ンと継がってしまうという問題が生じる。図１０（ｂ）
は逆に部分一括パターン９が所定の大きさよりも小さい
場合である。大きい場合と同様、種々の理由によって生
じる。この時、部分一括パターン９間には隙間１３が、
また、部分一括パターン９と可変成形パターン１０との
間には隙間１４が生じ、本来継がるべきパターンが継が
らず離れてしまうという問題が生じる。ここでは、部分
一括パターンの大きさが変化した場合について例を挙げ
たが、可変成形パターンでも同様の問題がある。また、
継ぎ部分でのパターンの節の発生や隙間の発生は、部分
一括パターンや可変成形パターンの大きさが変化したと
きだけでなく、パターン転写あるいは描画の位置ずれに
よっても生じるものである。At this time, an overlapping area 11 is formed between the partial collective patterns 9 and an overlapping area 12 is formed between the partial collective patterns 9 and the variable molding pattern 10. Overlapping area 11,
In No. 12, the resist film is irradiated with an electron beam twice as much as a predetermined exposure amount, the pattern becomes larger than a predetermined dimension, and a node is generated or the pattern is continued to a neighboring pattern which should be originally separated. The problem arises. Figure 10 (b)
On the contrary, the partial batch pattern 9 is smaller than a predetermined size. Like the large case, it occurs for a variety of reasons. At this time, a gap 13 is formed between the partial batch patterns 9,
In addition, a gap 14 is formed between the partial collective pattern 9 and the variable molding pattern 10, causing a problem that the pattern that should be originally joined is separated without being joined. Here, an example is given in which the size of the partial batch pattern is changed, but the variable molding pattern has the same problem. Also,
The generation of knots or gaps in the pattern at the joint portion occurs not only when the size of the partial batch pattern or the variable molding pattern changes, but also when the position of pattern transfer or drawing shifts.
【００１１】次に、図１０（ｃ）は、部分一括パターン
９と可変成形パターン１０が従来通り同一露光量で形成
された時のレジストパターンを示す図である。可変成形
パターン１０が所定の寸法で形成されるように露光量を
設定すると、部分一括パターン部は露光量不足でパター
ンが所望の寸法より小さく形成されてしまうという問題
がある。この為図１０（ｃ）に示したように、本来継が
るべきパターンに隙間１５ができてしまうこともある。Next, FIG. 10C is a view showing a resist pattern when the partial batch pattern 9 and the variable molding pattern 10 are formed with the same exposure amount as in the conventional case. If the exposure amount is set so that the variable shaped pattern 10 is formed with a predetermined size, there is a problem that the partial batch pattern portion is formed with a pattern smaller than a desired size due to an insufficient exposure amount. Therefore, as shown in FIG. 10C, the gap 15 may be formed in the pattern that should be originally joined.
【００１２】これらの対策として継ぎ部分の形状を補正
する方法が特公昭６１−５９５２９号公報および特公昭
６１−４５３７５号公報に開示されている。As a countermeasure against these problems, a method of correcting the shape of the joint portion is disclosed in Japanese Patent Publication No. 61-59529 and Japanese Patent Publication No. 61-45375.
【００１３】図１１および図１２は従来の継ぎ方法を説
明するためのレジストパターンの一部の上面図である。
特公昭６１−５９５２９号公報に開示されている継ぎ方
法は図１１に示すように、継ぐべきパターンＡＢＣＤと
ＥＦＧＨとの間にのりしろＥ′Ｆ′ＦＥを設けるもので
ある。パターンＡＢＣＤとパターンＥＦＧＨとの間に隙
間ＤＣＦＥができてもそれ以上の大きさののりしろＥ′
Ｆ′ＦＥを設けておき、こののりしろを小さなポイント
ビーム１６を順次走査してぬりつぶすものである。11 and 12 are top views of a part of a resist pattern for explaining a conventional joining method.
The joining method disclosed in Japanese Examined Patent Publication No. 61-59529 is to provide a margin E'F'FE between the patterns ABCD and EFGH to be joined, as shown in FIG. Even if a gap DCFE is formed between the pattern ABCD and the pattern EFGH, the margin E ′ having a size larger than that is provided.
F'FE is provided, and this margin is sequentially scanned with a small point beam 16 to be smeared.
【００１４】また、特公昭６１−４５３７５号公報に開
示されている露光方法は、例えば図１２（ａ）に示すよ
うなパターン１７を可変成形描画する時に、図１２
（ｂ）のように、可変成形パターン１８，１９，２０を
順次継ぐのではなく、図１２（ｃ）に示すように、形成
すべきパターン１７の左端部にまず小さい寸法の可変成
形パターン２１を露光する。次に寸法を少し大きくした
可変成形パターン２２を露光し、さらに寸法を大きくし
露光をくり返す。寸法が最大の大きさの可変成形パター
ン２３に達したら、その寸法のまま順次パターンの右側
に少しずつ位置をずらしながら露光し、パターン１７の
右端部に達すると、こんどは可変成形パターンの寸法を
順次小さくしたパターン２６，２７，２８を用いて露光
を行なうものである。このように、露光位置を少しずつ
ずらしながら露光することにより、接続部に凹凸のない
パターンが重ね合わせ露光され、接続によるパターンの
劣化が緩和されるというものである。The exposure method disclosed in Japanese Examined Patent Publication No. 61-45375 is shown in FIG. 12 when the pattern 17 as shown in FIG.
As shown in FIG. 12C, first, a variable molding pattern 21 having a small size is first formed on the left end of the pattern 17 to be formed, as shown in FIG. Expose. Next, the variable molding pattern 22 having a slightly increased size is exposed, the size is further increased, and the exposure is repeated. When the dimension reaches the variable molding pattern 23 having the maximum size, the dimension is exposed to the right side of the pattern while shifting the position little by little, and when it reaches the right end of the pattern 17, the dimension of the variable molding pattern is changed. Exposure is performed using the patterns 26, 27, and 28 that are made smaller in order. In this way, by performing exposure while shifting the exposure position little by little, the pattern having no unevenness is superimposed and exposed on the connection portion, and the deterioration of the pattern due to the connection is alleviated.
【００１５】[0015]
【発明が解決しようとする課題】第１の問題点は、のり
しろをポイントビームで塗りつぶす、あるいはパターン
を可変成形ビームを少しずつずらしながら描画するとい
う従来の露光方法は、いずれも膨大な時間を要し、装置
の処理能力が大幅に低下してしまうことである。The first problem is that the conventional exposure method of painting the margin with a point beam or drawing the pattern while shifting the variable shaped beam little by little takes a huge amount of time. However, the processing capacity of the device is significantly reduced.
【００１６】その理由は、パターンの継ぎのすべてに於
いて、のりしろをポイントビームで塗りつぶす方法では
膨大なショット数の増加を招き、また、可変成形ビーム
を少しずつずらしながら重ね露光する方法では可変成形
ショット数が数倍になり、従って描画に要する時間も数
倍になってしまうからである。The reason for this is that in all of the joints of the patterns, the method of filling the margin with a point beam causes a huge increase in the number of shots, and the method of overlapping exposure while gradually shifting the variable shaping beams causes variable shaping. This is because the number of shots is several times, and therefore the time required for drawing is also several times.
【００１７】第２の問題点は、部分一括転写パターン間
及び部分一括転写パターンと可変成形パターンとの継ぎ
部分では、のりしろを設けたり少しずつずらして重ね露
光すると所望のパターンが形成されないということであ
る。A second problem is that a desired pattern is not formed when a margin is provided or overlapped exposure is performed by slightly shifting the area between the partial batch transfer patterns and the joint between the partial batch transfer patterns and the variable molding pattern. is there.
【００１８】その理由は、部分一括転写部には既に凹凸
のある複雑な複数の所望のパターンが形成されている。
部分一括パターンを少しずらして重ね合わせると、所望
のパターンが少しずつずれて重ね合わされる為、所望の
パターンでなくなってしまうからである。The reason is that a plurality of desired complicated patterns having irregularities are already formed in the partial batch transfer portion.
This is because if the partial batch patterns are overlapped with a slight shift, the desired patterns are overlapped with a slight shift, and the desired patterns are lost.
【００１９】第３の問題点は、部分一括パターンが所望
の寸法よりも小さい場合には従来の方法は適用できない
ことである。その理由は、のりしろを設けてぬりつぶす
ポイントビーム法で用いる露光装置は構造が異なる為に
部分一括パターンを形成できないからである。The third problem is that the conventional method cannot be applied when the partial batch pattern is smaller than the desired size. The reason for this is that the exposure apparatus used in the point beam method of providing a margin and squeezing it out cannot form a partial batch pattern because of its different structure.
【００２０】本発明の目的は、部分一括パターン間の継
ぎ合わせ及び部分一括パターンと可変成形パターン間の
継ぎ合わせを精度良く行ない、転写されるパターンが正
常に形成され、しかも処理能力を低下させることのない
電子線露光方法を提供することにある。An object of the present invention is to accurately join a partial batch pattern and a partial batch pattern to a variable molding pattern so that a pattern to be transferred is normally formed and the processing ability is lowered. It is an object of the present invention to provide an electron beam exposure method that does not have the above.
【００２１】[0021]
【課題を解決するための手段】第１の発明の電子線露光
方法は、複数のパターンを転写する部分一括転写法と任
意の大きさの矩形ビームによりパターンを描画する可変
成形描画法とを用い所定の転写縮小率により所望のパタ
ーンをウェハー上に形成されたレジスト膜に転写する電
子線露光方法において、部分一括転写時の前記転写縮小
率を変更して露光することを特徴とするものである。The electron beam exposure method of the first invention uses a partial batch transfer method for transferring a plurality of patterns and a variable shaping drawing method for drawing a pattern with a rectangular beam of an arbitrary size. In an electron beam exposure method for transferring a desired pattern to a resist film formed on a wafer at a predetermined transfer reduction rate, the transfer reduction rate at the time of partial batch transfer is changed to perform exposure. .
【００２２】第２の発明の電子線露光方法は、複数のパ
ターンを転写する部分一括転写法と任意の大きさの矩形
ビームによりパターンを描画する可変成形描画法とを用
い所望のパターンをウェハー上に形成されたレジスト膜
に転写する電子線露光方法に於いて、部分一括転写部あ
るいは可変成形描画部あるいは両者を露光する為の露光
量を変化させて露光することを特徴とするものである。The electron beam exposure method of the second invention uses a partial batch transfer method for transferring a plurality of patterns and a variable shaping drawing method for drawing a pattern with a rectangular beam of an arbitrary size to form a desired pattern on a wafer. In the electron beam exposure method of transferring to the resist film formed in step 1, the exposure is performed by changing the exposure amount for exposing the partial batch transfer part, the variable shaping drawing part, or both.
【００２３】第３の発明の電子線露光方法は、複数のパ
ターンを転写する部分一括転写法と任意の大きさの矩形
ビームによりパターンを形成する可変成形描画法とを用
い所望のパターンをウェハー上に形成されたレジスト膜
に転写する電子線露光方法に於いて、部分一括転写パタ
ーンのうち部分一括転写部間あるいは部分一括転写部と
可変成形描画部との接続部近傍のパターンをあらかじめ
所望の寸法よりも大きく形成されたアパーチャを用いて
露光することを特徴とするものである。The electron beam exposure method of the third invention uses a partial batch transfer method for transferring a plurality of patterns and a variable shaping drawing method for forming a pattern with a rectangular beam of an arbitrary size to form a desired pattern on a wafer. In the electron beam exposure method for transferring to the resist film formed on the substrate, the pattern of the partial batch transfer pattern between the partial batch transfer parts or in the vicinity of the connection part between the partial batch transfer part and the variable shaping drawing part is desired in advance. It is characterized in that exposure is performed by using an aperture formed larger than the above.
【００２４】[0024]
【作用】部分一括転写パターンが小さい場合には縮小率
を小さく、部分一括転写パターンが大きい場合には縮小
率を大きくすることにより、ウェーハ上に転写される部
分一括パターンが所望の大きさになるようにする。これ
により、部分一括転写パターン間及び部分一括転写パタ
ーンと可変成形描画パターン間でパターンが所望のパタ
ーン通りに形成される。When the partial batch transfer pattern is small, the reduction rate is small, and when the partial batch transfer pattern is large, the reduction rate is large so that the partial batch pattern transferred onto the wafer has a desired size. To do so. As a result, patterns are formed as desired between the partial batch transfer patterns and between the partial batch transfer patterns and the variable-shaped drawing patterns.
【００２５】また、部分一括転写パターン部と可変成形
描画部との露光量をそれぞれ独立に設定することによ
り、両パターン部とも所望のパターンが形成される。Further, by setting the exposure amounts of the partial batch transfer pattern portion and the variable shaping drawing portion independently, a desired pattern is formed in both pattern portions.
【００２６】さらに、部分一括パターンの接続部近傍の
パターンを大きくしておくことにより、部分一括転写パ
ターン間あるいは部分一括転写パターンと可変成形パタ
ーンとが所望の位置より離れて露光されても、パターン
間に隙間ができず、接続される。この時、接続部のパタ
ーン間のパターンの幅の寸法差によって、パターンを大
きくする程度を適宜変化させることにより、接続部に節
が生じないようにするとができる。Further, by enlarging the pattern in the vicinity of the connection portion of the partial batch pattern, even if the partial batch transfer patterns are exposed or the partial batch transfer pattern and the variable molding pattern are exposed apart from a desired position, the pattern is exposed. There is no gap between them and they are connected. At this time, a knot can be prevented from occurring in the connecting portion by appropriately changing the degree of increasing the size of the pattern depending on the difference in the width of the pattern between the patterns of the connecting portion.
【００２７】[0027]
【発明の実施の形態】次に、本発明の実施の形態につい
て図面を参照して詳細に説明する。図１（ａ）〜（ｃ）
は本発明の第１の実施の形態を説明するための半導体基
板の縦断面図である。以下図３を併用して説明する。Next, embodiments of the present invention will be described in detail with reference to the drawings. 1 (a) to 1 (c)
FIG. 3 is a vertical cross-sectional view of a semiconductor substrate for explaining the first embodiment of the present invention. A description will be given below in combination with FIG.
【００２８】図１（ａ）に示すように、第２アパーチャ
４を通過した電子ビーム８は半導体基板７上に塗布され
たレジスト膜３０の中心付近の高さｈ1 の位置に部分一
括パターン焦点位置２９がくるように通常転写される。
この時、部分一括パターンの寸法は所定の寸法ｘ1 で転
写される。部分一括パターンが何らかの理由により焦点
位置でｘ2 と小さなことが検査により判明した場合、図
１（ｂ）に示すように、焦点位置２９をｈ1 より下のｈ
2 に、あるいは図１（ｃ）に示すように、ｈ1より上の
ｈ3 に合わせることにより所定の寸法ｘ1 でレジスト膜
３０に転写される。As shown in FIG. 1A, the electron beam 8 which has passed through the second aperture 4 is focused on the partial collective pattern at a position of height h 1 near the center of the resist film 30 coated on the semiconductor substrate 7. It is normally transferred so that the position 29 comes.
At this time, the size of the partial batch pattern is transferred with a predetermined size x 1 . If the inspection reveals that the partial batch pattern is as small as x 2 at the focus position for some reason, as shown in FIG. 1B, the focus position 29 is set to h below h 1.
2 or as shown in FIG. 1 (c), it is transferred to the resist film 30 with a predetermined dimension x 1 by adjusting to h 3 above h 1 .
【００２９】次に、高さｈ2 ，ｈ3 の求め方について図
２を参照して説明する。図２（ａ），（ｂ）は部分一括
パターンが所定の寸法ｘ1 よりも小さな寸法ｘ2 の時、
所定の寸法のレジストパターンを得るために、焦点位置
２９をどの程度高く、あるいは低くすれば良いかを示し
たグラフである。Next, how to obtain the heights h 2 and h 3 will be described with reference to FIG. 2A and 2B show that when the partial batch pattern has a dimension x 2 smaller than a predetermined dimension x 1 ,
6 is a graph showing how high or low the focal position 29 should be in order to obtain a resist pattern of a predetermined size.
【００３０】図２（ａ）は焦点位置２９を低くする場合
である。ｘ1 とｘ2 との比（ｘ1 ／ｘ2 ）を横軸に焦点
の高さｈ1 とｈ2 との比（ｈ1 ／ｈ2 ）は直線関係にあ
る。従ってビーム入射後の（ｘ1 ／ｘ2 ）の値から直ち
に（ｈ1 ／ｈ2 ）の値、即ちｈ2 を読みとることが可能
である。図２（ｂ）は焦点位置２９を上方に持っていく
場合であり、（ｘ1 ／ｘ2 ）から（ｈ3 ／ｈ1 ）、即ち
ｈ3 を直ちに求めることが可能である。FIG. 2A shows the case where the focal position 29 is lowered. The ratio (h 1 / h 2 ) between the focal heights h 1 and h 2 is in a linear relationship with the horizontal axis representing the ratio between x 1 and x 2 (x 1 / x 2 ). Therefore, it is possible to immediately read the value of (h 1 / h 2 ), that is, h 2 from the value of (x 1 / x 2 ) after beam incidence. FIG. 2B shows a case where the focus position 29 is brought upward, and (h 3 / h 1 ), that is, h 3 can be immediately obtained from (x 1 / x 2 ).
【００３１】図３は本発明の第２の実施の形態を説明す
るための電子線露光装置の模式図である。FIG. 3 is a schematic view of an electron beam exposure apparatus for explaining the second embodiment of the present invention.
【００３２】第２アパーチャ４に形成されたパターンは
縮小レンズ５によりウェハー上に縮小転写される。縮小
率は通常１／２５に固定されているが、装置によっては
１／１００等他の縮小率で設計されているものもある。
ここで、縮小レンズ５に流す電流を変化させることによ
り倍率を数％変化させることが可能である。部分一括パ
ターンの寸法が一度検査した結果所定の値よりも大きな
場合は流す電流を多くし転写縮小率を所定の値より高く
する。また逆に部分一括パターンの寸法が検査した結果
所定の値よりも小さな場合は流す電流を小さくして転写
縮小率を低くする。電流と倍率はほぼ直線的に変化す
る。従って、所定の寸法のパターンを得ることは容易で
ある。The pattern formed on the second aperture 4 is reduced and transferred onto the wafer by the reduction lens 5. The reduction ratio is usually fixed at 1/25, but some devices are designed with other reduction ratios such as 1/100.
Here, the magnification can be changed by several% by changing the current flowing through the reduction lens 5. When the size of the partial batch pattern is once inspected and is larger than a predetermined value, the amount of current flowing is increased and the transfer reduction rate is made higher than the predetermined value. On the other hand, if the size of the partial batch pattern is smaller than a predetermined value as a result of the inspection, the flow current is reduced to reduce the transfer reduction rate. The current and the magnification change almost linearly. Therefore, it is easy to obtain a pattern having a predetermined size.
【００３３】図４は第３の実施の形態を説明するための
半導体基板上に形成されたメモリ素子のパターンの一部
の上面図であり、部分一括パターン９と可変成形パター
ン１０をそれぞれ異なる露光量で露光したものである。
部分一括パターン部は部分一括パターン９が所定の寸法
で露光される露光量（最適露光量）、可変形成部は可変
成形パターン１０が所定の寸法で露光される露光量で露
光したものである。露光量は半導体基板上への電子線照
射時間を変化させたり、あるいは図３における第１アパ
ーチャ２上に照射する電子線の電流密度を変化させるこ
とにより行なう。部分一括パターン部の最適露光量Ｄは
斜線を引いたパターン部３１の面積（電子線が照射され
る部分）Ｓによって異なる。FIG. 4 is a top view of a part of the pattern of the memory element formed on the semiconductor substrate for explaining the third embodiment, in which the partial batch pattern 9 and the variable molding pattern 10 are exposed differently. Amount exposed.
The partial batch pattern portion is an exposure amount (optimum exposure amount) with which the partial batch pattern 9 is exposed with a predetermined dimension, and the variable forming portion is exposed with an exposure amount such that the variable molding pattern 10 is exposed with a predetermined dimension. The exposure amount is set by changing the electron beam irradiation time on the semiconductor substrate, or by changing the current density of the electron beam irradiated on the first aperture 2 in FIG. The optimum exposure amount D of the partial batch pattern portion varies depending on the area (portion to which the electron beam is irradiated) S of the pattern portion 31 which is shaded.
【００３４】図５はパターン部３１の面積Ｓと最適露光
量Ｄとの関係を示したものである。パターン部３１の面
積Ｓが大きいと最適露光量Ｄは大きくなる。FIG. 5 shows the relationship between the area S of the pattern portion 31 and the optimum exposure amount D. The larger the area S of the pattern portion 31 is, the larger the optimum exposure amount D is.
【００３５】図６（ａ），（ｂ）は第４の実施の形態を
説明するための半導体基板上に形成されたメモリ素子パ
ターンの一部上面図である。あらかじめ検査した結果、
ウェハー上にパターンが所定の寸法よりも小さく形成さ
れてしまう場合、図６（ａ）に示すように、部分一括パ
ターン９Ａを所定の寸法ｘ3 よりも横方向にやや大きな
ｘ4 で作成してあるアパーチャを用いる。何らかの理由
により、部分一括パターン９Ａが小さく転写されても、
ｘ3 より小さくならないようにしておくことにより、図
１０（ｂ）で示したように隙間１３，１４ができること
はない。図６（ｂ）は実際にパターンを継いだ時に形成
されるレジストパターンを示したものである。部分一括
パターン９Ａ間及び部分一括パターン９Ａと可変成形パ
ターン１０間ともに良好に接続される。FIGS. 6A and 6B are partial top views of the memory element pattern formed on the semiconductor substrate for explaining the fourth embodiment. The result of the inspection in advance,
When the pattern is formed smaller than the predetermined size on the wafer, as shown in FIG. 6A, the partial batch pattern 9A is formed with a size x 4 which is slightly larger than the predetermined size x 3 in the lateral direction. Use an aperture. Even if the partial batch pattern 9A is transferred small for some reason,
As long as it is not smaller than x 3 , the gaps 13 and 14 will not be formed as shown in FIG. 10B. FIG. 6B shows a resist pattern formed when patterns are actually continued. The partial collective patterns 9A and the partial collective patterns 9A and the variable molding pattern 10 are well connected.
【００３６】図７（ａ），（ｂ）は第５の実施の形態を
説明するための半導体基板上に形成されたメモリ素子パ
ターンの一部上面図である。第４の実施の形態で説明し
たように、部分一括パターンの接続部近傍の部分をあら
かじめ大きくしておけば、接続部に隙間は生じない。と
ころが、大きくしすぎると、図７（ａ）に示すように、
パターンが重なる領域でパターンに節３２が生じてしま
う。また、図１０（ａ）に示したように、部分一括パタ
ーンが何らかの理由により大きく転写されてしまう場合
も同様に節が生じる。このため、あらかじめ、アパーチ
ャのパターンを大きくしておく寸法には制限が生じる。
また、この制限は接続するパターン間の寸法差にも依存
する。図７（ａ）は接続するパターンの幅の寸法が左右
どちらもｔ1 であり、寸法差がゼロである。部分一括パ
ターン９Ｂは所定の寸法ｘ3 よりも横方向にｘ5 だけ大
きく作成されている。この時、節３２が生じている。一
方、図７（ｂ）に示すように、接続されるパターンの幅
の寸法がそれぞれｔ2 ，ｔ1 と異なる場合、部分一括パ
ターン９Ｃの接続部における横方向の寸法がｘ5 だけ大
きく作成されていても節は生じない。従って、接続され
るパターン間の幅の寸法によって、部分一括パターンを
あらかじめ大きくする寸法を変化させることにより、種
々のパターンで節を生じさせることなく接続することが
可能である。FIGS. 7A and 7B are partial top views of a memory element pattern formed on a semiconductor substrate for explaining the fifth embodiment. As described in the fourth embodiment, if the portion in the vicinity of the connecting portion of the partial batch pattern is made large in advance, no gap will be formed in the connecting portion. However, if it is made too large, as shown in FIG.
Knots 32 occur in the patterns in the areas where the patterns overlap. Also, as shown in FIG. 10A, when the partial batch pattern is largely transferred for some reason, a node similarly occurs. Therefore, the size of the aperture pattern to be enlarged in advance is limited.
This limit also depends on the dimensional difference between the connected patterns. In FIG. 7A, the width dimension of the pattern to be connected is t 1 on both the left and right sides, and the dimension difference is zero. The partial batch pattern 9B is made larger than the predetermined dimension x 3 by x 5 in the lateral direction. At this time, the node 32 is generated. On the other hand, as shown in FIG. 7B, when the width dimensions of the pattern to be connected are different from t 2 and t 1 , respectively, the lateral dimension of the connection portion of the partial batch pattern 9C is made larger by x 5. However, no clause occurs. Therefore, by changing the dimension for enlarging the partial batch pattern in advance according to the width dimension between the patterns to be connected, it is possible to connect the various patterns without causing knots.
【００３７】図８は接続されるパターン間の幅の寸法差
Δｔと、接続部で節が生じないように部分一括パターン
を横方向に大きくできる最大の寸法Δｘとの関係を示し
たものである。どの様なパターンでも、このデータを用
いることにより節を生じさせることなく良好なパターン
を形成可能である。FIG. 8 shows the relationship between the width difference Δt between the patterns to be connected and the maximum size Δx at which the partial batch pattern can be enlarged in the lateral direction so that no node is generated at the connection portion. . With any pattern, a good pattern can be formed by using this data without causing a node.
【００３８】尚、上述した第１〜第５の実施の形態では
すべて、露光すべきパターンのショット数が増加するこ
とがない為、電子線露光装置の処理能力が低下すること
はない。In all of the above-described first to fifth embodiments, the number of shots of the pattern to be exposed does not increase, so the processing capability of the electron beam exposure apparatus does not decrease.
【００３９】[0039]
【発明の効果】第１の効果は、部分一括パターン間及び
部分一括パターンと可変成形パターン間の継ぎ合せが精
度よく行なわれ、転写されるパターンが正常に形成され
るということである。これにより、所望のパターンが得
られる為、半導体デバイスの歩留りが向上する。その理
由は、部分一括パターンの転写時に、ウェハー上への転
写縮小倍率を縮レンズの倍率や焦点位置を変えて変更す
ることによりパターン接続部に隙間や節を生じないから
である。The first effect is that the partial batch pattern and the partial batch pattern and the variable molding pattern are spliced with high accuracy, and the transferred pattern is normally formed. As a result, a desired pattern is obtained, so that the yield of semiconductor devices is improved. The reason is that when the partial batch pattern is transferred, the transfer reduction magnification on the wafer is changed by changing the magnification of the reduction lens or the focal position, so that no gaps or nodes are formed in the pattern connecting portion.
【００４０】第２の効果は、部分一括パターンと可変成
形パターンの両者が所望の寸法、形状で形成されている
ということである。これにより、所望のパターンが得ら
れる為、半導体デバイスが高歩留りで得られる。その理
由は、部分一括転写パターンと可変成形パターンとを別
々に、それぞれ最適の露光量で形成するからである。The second effect is that both the partial batch pattern and the variable molding pattern are formed in desired sizes and shapes. As a result, a desired pattern can be obtained, so that semiconductor devices can be obtained with a high yield. The reason is that the partial batch transfer pattern and the variable molding pattern are separately formed with optimum exposure amounts.
【００４１】第３の効果は、どんなパターンでも所望の
形状で形成されるということである。これにより、所望
のパターンが得られ、半導体デバイスが高歩留りで得ら
れる。その理由は、接続部のパターンの寸法差により所
定よりも大きな寸法で形成された部分一括パターンを有
するアパーチャを用いて転写することにより、接続部に
隙間も節も生じないからである。The third effect is that any pattern can be formed in a desired shape. As a result, a desired pattern can be obtained, and semiconductor devices can be obtained with a high yield. The reason is that, by performing transfer using an aperture having a partial batch pattern formed with a size larger than a predetermined size due to a difference in pattern of the connection part, neither a gap nor a node is formed in the connection part.
【００４２】第４の効果は電子線露光装置の処理能力の
低下がなく、所望のパターンが得られることである。こ
れにより半導体デバイスを安価に大量供給できるように
なる。その理由は新たに露光すべきパターンが不要であ
るからである。The fourth effect is that a desired pattern can be obtained without lowering the processing capacity of the electron beam exposure apparatus. As a result, a large number of semiconductor devices can be inexpensively supplied. The reason is that a new pattern to be exposed is unnecessary.
【図１】本発明の第１の実施の形態を説明する為の半導
体チップの断面図。FIG. 1 is a cross-sectional view of a semiconductor chip for explaining a first embodiment of the present invention.
【図２】本発明の第１の実施の形態を説明する為の焦点
位置の比とパターン寸法の比との関係を示す図。FIG. 2 is a diagram showing a relationship between a focus position ratio and a pattern size ratio for explaining the first embodiment of the present invention.
【図３】本発明の第２の実施の形態を説明する為の電子
線露光装置の構成を示す斜視図。FIG. 3 is a perspective view showing a configuration of an electron beam exposure apparatus for explaining a second embodiment of the present invention.
【図４】本発明の第３の実施の形態を説明する為のメモ
リ素子パターンの上面図。FIG. 4 is a top view of a memory element pattern for explaining a third embodiment of the present invention.
【図５】本発明の第３の実施の形態を説明する為のパタ
ーン面積と露光量との関係を示す図。FIG. 5 is a diagram showing a relationship between a pattern area and an exposure amount for explaining a third embodiment of the present invention.
【図６】本発明の第４の実施の形態を説明する為のメモ
リ素子パターンの上面図。FIG. 6 is a top view of a memory element pattern for explaining a fourth embodiment of the present invention.
【図７】本発明の第５の実施の形態を説明する為のメモ
リ素子パターンの上面図。FIG. 7 is a top view of a memory element pattern for explaining a fifth embodiment of the present invention.
【図８】本発明の第５の実施の形態を説明する為のパタ
ーン間の幅の寸法差とパターンを大きくできる最大寸法
との関係を示す図。FIG. 8 is a diagram showing a relationship between a dimensional difference in width between patterns and a maximum size with which a pattern can be enlarged, for explaining a fifth embodiment of the present invention.
【図９】メモリ素子パターンの上面図。FIG. 9 is a top view of a memory element pattern.
【図１０】従来例の問題点を説明する為のメモリ素子パ
ターンの上面図。FIG. 10 is a top view of a memory element pattern for explaining the problems of the conventional example.
【図１１】従来の露光方法を説明する為のレジストパタ
ーンの上面図。FIG. 11 is a top view of a resist pattern for explaining a conventional exposure method.
【図１２】従来の他の露光方法を説明する為のレジスト
パターンの上面図。FIG. 12 is a top view of a resist pattern for explaining another conventional exposure method.
１ 電子銃 ２ 第１アパーチャ ３ 偏向器 ４ 第２アパーチャ ５ 縮小レンズ ６ 位置決め偏向器 ７ 半導体基板 ８ 電子ビーム ９，９Ａ〜９Ｃ 部分一括パターン １０ 可変成形パターン １１，１２，３２ 節 １３〜１５ 隙間 １６ ポイントビーム １７ パターン １８〜２８ 可変成形パターン ２９ 部分一括パターン焦点位置 ３０ レジスト膜 ３１ パターン部 DESCRIPTION OF SYMBOLS 1 Electron gun 2 1st aperture 3 Deflector 4 2nd aperture 5 Reduction lens 6 Positioning deflector 7 Semiconductor substrate 8 Electron beam 9,9A-9C partial collective pattern 10 Variable shaping pattern 11,12,32 Section 13-15 Gap 16 Point beam 17 patterns 18 to 28 variable molding pattern 29 partial collective pattern focus position 30 resist film 31 pattern portion
Claims (6)
法と任意の大きさの矩形ビームによりパターンを描画す
る可変成形描画法とを用い所定の転写縮小率により所望
のパターンをウェハー上に形成されたレジスト膜に転写
する電子線露光方法において、部分一括転写時の前記転
写縮小率を変更して露光することを特徴とする電子線露
光方法。1. A desired pattern is formed on a wafer at a predetermined transfer reduction rate by using a partial batch transfer method for transferring a plurality of patterns and a variable shaping drawing method for drawing a pattern with a rectangular beam of an arbitrary size. In the electron beam exposure method for transferring onto a resist film, the exposure is performed while changing the transfer reduction rate at the time of partial batch transfer.
を変更する請求項１記載の電子線露光方法。2. The electron beam exposure method according to claim 1, wherein the reduction ratio of the reduction lens is changed to change the transfer reduction ratio.
ウェハー面に垂直な軸方向に移動させて転写縮小率を変
更する請求項１記載の電子線露光方法。3. The focus position of the pattern on the wafer is
2. The electron beam exposure method according to claim 1, wherein the transfer reduction ratio is changed by moving the transfer reduction ratio in an axial direction perpendicular to the wafer surface.
法と任意の大きさの矩形ビームによりパターンを描画す
る可変成形描画法とを用い所望のパターンをウェハー上
に形成されたレジスト膜に転写する電子線露光方法に於
いて、部分一括転写部あるいは可変成形描画部あるいは
両者を露光する為の露光量を変化させて露光することを
特徴とする電子線露光方法。4. A desired pattern is transferred onto a resist film formed on a wafer by using a partial batch transfer method for transferring a plurality of patterns and a variable shaping drawing method for drawing a pattern with a rectangular beam of an arbitrary size. In the electron beam exposure method, the exposure is performed by changing the exposure amount for exposing the partial batch transfer part, the variable shaping drawing part, or both.
法と任意の大きさの矩形ビームによりパターンを形成す
る可変成形描画法とを用い所望のパターンをウェハー上
に形成されたレジスト膜に転写する電子線露光方法に於
いて、部分一括転写パターンのうち部分一括転写部間あ
るいは部分一括転写部と可変成形描画部との接続部近傍
のパターンをあらかじめ所望の寸法よりも大きく形成さ
れたアパーチャを用いて露光することを特徴とする電子
線露光方法。5. A desired pattern is transferred onto a resist film formed on a wafer by using a partial batch transfer method for transferring a plurality of patterns and a variable shaping drawing method for forming a pattern with a rectangular beam of an arbitrary size. In the electron beam exposure method, the pattern is formed between the partial batch transfer parts of the partial batch transfer pattern or in the vicinity of the connection part between the partial batch transfer part and the variable shaping drawing part with an aperture formed in advance to a size larger than a desired size. An electron beam exposure method, which comprises exposing with an electron beam.
ターンの大きさの割合は、接続されるパターン同志の幅
の寸法差によって定められる請求項５記載の電子線露光
方法。6. The electron beam exposure method according to claim 5, wherein the size ratio of the pattern in the vicinity of the connection portion formed in the aperture is determined by the difference in width between the patterns to be connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7409896A JP2956577B2 (en) | 1996-03-28 | 1996-03-28 | Electron beam exposure method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7409896A JP2956577B2 (en) | 1996-03-28 | 1996-03-28 | Electron beam exposure method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09266153A true JPH09266153A (en) | 1997-10-07 |
| JP2956577B2 JP2956577B2 (en) | 1999-10-04 |
Family
ID=13537380
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7409896A Expired - Fee Related JP2956577B2 (en) | 1996-03-28 | 1996-03-28 | Electron beam exposure method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2956577B2 (en) |
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