JPH09247444A - Method and device for binarizing image - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate moire in the case of binarizing a dot image and to speed up processing time. SOLUTION: As to an error caused by binarizing a noted picture element, some picture elements before binarization and in existence in the vicinity of the noted picture element are selected as error sum object picture elements. When the result of binarizing the noted picture element is zero, a maximum value smaller than an upper limit of a picture element value range is selected from an error sum object picture element as a sum object. Then the error is added to the picture element. When the result of binarizing the noted picture element is 1, a minimum value larger than a lower limit of the picture element value range is selected from the error sum object picture element as a sum object. Then the error is added to the picture element. The shape as dots is maintained by adding the error caused in the noted picture element to unprocessed picture elements before binarization in existence in the vicinity of the noted picture element in this way and no moire is produced. When the addition of the error generated from the noted picture element is finished, since the binarization processing with respect to the noted picture element is finished, high speed processing is attained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image binarization method and device for converting an original image given as an array of pixels into a binary duplicated image signal that can be output to an image output device.

[0002]

2. Description of the Related Art Conventionally, in order to obtain a binary signal again from the obtained image signal by scanning and reading a once recorded halftone image, the analog image signal value obtained by scanning is fixed. A method of simply binarizing was used in comparison with the threshold value. In this simple binarization method, interference between the grayscale period and the scanning period of the original image itself causes interference fringes called so-called moire, which is a cause of impairing the quality of the recorded image.

As a method for removing such moire, the method disclosed in Japanese Patent Publication No. 1-29349 is known.

[0004]

[Problems to be Solved by the Invention] Japanese Patent Publication No. 1-29349
In the technique disclosed in Japanese Patent Laid-Open Publication No. 2000-242242, an original image having a periodicity of density such as a halftone dot image is scanned, and when a binarized image signal is obtained, pixel values are redistributed once by matrix scanning. , Then, each pixel must be binarized. Therefore, such a conventional technique has two problems.
Since it requires processing in stages, it has a drawback that it takes a lot of time to complete the processing.

In view of the above problems, it is an object of the present invention to provide an image binarization method and apparatus capable of satisfactorily removing moire and performing high-speed processing.

[0006]

According to a first aspect of the present invention, a target pixel is sequentially selected from an original image given as an array of pixels to be binarized, which corresponds to the logic level after binarization. A method of performing binarization for each pixel of the original image while adding the error of the pixel value before binarization from the pixel value to the pixel value of the pre-binarization pixel in the vicinity of the target pixel Among the plurality of pre-binarized pixels existing in the vicinity of the pixel of interest, the error is preferentially given to a pixel having a pixel value farther than a pixel having a pixel value close to the pixel value of the pixel of interest after binarization. Is added.

According to a second aspect of the present invention, in the method of the first aspect, among the plurality of pre-binarized pixels, a pixel value far from a pixel value corresponding to a binarized logical level of the target pixel. When the pixel value of the first addition candidate pixel specified according to the order exceeds a predetermined pixel value range allowed for the image value of the original image by the addition, A portion of the error that exceeds the pixel value range for the first addition candidate pixel is carried over to the second addition candidate pixel that is the next candidate in the order.

According to a third aspect of the present invention, in the method of the second aspect, the logic level after the binarization is 1 or 0, and the logic level after the binarization for the target pixel is 1. In one case, among the plurality of pre-binarized pixels,
When the order of the addition candidate pixels is specified in the ascending order of pixel values and the logic level after the binarization of the target pixel is 0, the pixel values in the descending order of the pixel values among the plurality of pre-binarization pixels are set. The order of the addition candidate pixels is specified.

According to a fourth aspect of the present invention, in the method according to any one of the first to third aspects, the original image is an image obtained by photoelectrically reading a halftone dot image.

According to a fifth aspect of the present invention, there is provided an apparatus for binarizing an original image given as an array of pixels for each pixel, wherein the pixel value of a target pixel selected from the array of pixels is binary. Binarizing means for binarizing, error calculating means for calculating the error of the pixel value before binarization from the pixel value corresponding to the logic level after binarization for the target pixel, and in the vicinity of the target pixel. Among a plurality of pixels that are present and have not yet been binarized, a specific pixel is selected according to an order having a pixel value far from a pixel value corresponding to the logic level of the pixel of interest after binarization. Specific pixel selecting means for selecting, error adding means for updating the pixel value of the specific pixel by adding the error to the pixel value of the specific pixel, and each pixel of the original image as the target pixel in order. Select the target of the binarization In addition, if the newly selected pixel of interest is the pixel after the addition as the specific pixel, the binarization is performed based on the pixel value after the update 2 And binarizing and repeating means.

According to a sixth aspect of the present invention, in the apparatus according to the fifth aspect, the specific pixel selection means corresponds to the logic level of the target pixel after binarization among the plurality of pre-binarization pixels. Ordering means for deciding the order of the addition candidate pixels in the order distant from the pixel value to be processed, and the first order specified according to the order.
When the pixel value of the addition candidate pixel exceeds a predetermined pixel value range allowed for the image value of the original image by the addition, a portion of the error that exceeds the pixel value range of the first addition candidate pixel, It has a carry-over addition means for carrying over and adding to the second addition candidate pixel which is the next candidate in the above order.

According to a seventh aspect of the present invention, in the apparatus according to the sixth aspect, the logic level after the binarization is 1 or 0, and the order determining means after the binarization for the pixel of interest. When the logic level of 1 is 1, the plurality of 2
Means for determining the order of the addition candidate pixels in ascending order of pixel values among the pre-valued pixels;
And a means for determining the order of the addition candidate pixels in descending order of the pixel value among the plurality of pre-binarized pixels when the logic level after the binarization is 0.

The invention described in claim 8 is the apparatus according to any one of claims 5 to 7, wherein the original image is an image obtained by photoelectrically reading a halftone image.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION

<Overall Structure> FIG. 1 is a block diagram showing an embodiment of the present invention. As the image input device 1 of FIG. 1, an original image recorded as a halftone image is scanned for photoelectric reading, and an image scanner or the like is used in this embodiment. Also, the image output device 4
In this embodiment, an ink jet printer or the like is used. The original image is read for each pixel by the image input device 1, and the obtained image signal is stored in the memory 3 as a multi-tone digital signal. The CPU 2 reads the stored image signal for each pixel and binarizes it. Here, the pixel read from the memory 3 by the CPU 2 and being binarized at that time is called a target pixel. The binarization result of the pixel of interest and the error compensation result (described later) associated therewith are stored in the memory 3 again. Then, when the binarization is completed for all the pixels of the image signal, the binary image signal is transferred to the image output device 4.

<Principle of Binarization and Error Distribution> A multi-valued image signal obtained by reading a halftone image with the image input apparatus 1 is as shown in FIG. FIG. 2 is a diagram showing an array of pixels forming an image signal, and shows a signal value (pixel value) of each pixel when one halftone dot P in the original image is read. In this embodiment, the dynamic range of pixel values (pixel value range) is 0 to 255. As shown in FIG. 2, when one pixel (for example, the pixel in the second row and the second column) is entirely covered with the halftone dot P, the pixel value is 2
55. On the other hand, one pixel (for example, the 0th row,
If there is no portion where the pixel in the 0th column) and the halftone dot P intersect, the pixel value becomes 0. When there is a portion that intersects with the halftone dot P in one pixel (for example, the pixel in the 0th row and the first column), the pixel value is the area of the entire pixel and the area of the portion that intersects with the halftone dot P. It becomes a value corresponding to the ratio. In the following description, a pixel in the m-th row and the n-th column (m and n are both 0 or a natural number) is a pixel (m, n).

First, in the image signal shown in FIG. 2, the pixel of interest is pixel (0,0). The pixel of interest is a pixel (0,
From 0) in the X direction (main scanning direction) in the figure,
The original image is binarized. When the pixel of interest reaches the pixel (0, n), the pixel of interest is moved by one in the Y direction (sub-scanning direction), and again from the 0th column in the main scanning direction X.
It will be valued. When the target pixel is scanned in this way and the binarization of the pixel (m, n) is completed, the binarization of all the pixels is completed.

When the pixel of interest is actually binarized in the embodiment of the present invention, 128 is used as the binarization threshold value. Therefore, if the pixel value before binarization is less than 50% of the pixel value range (127 or less in this embodiment), the result of binarization is 0, and 0 in the pixel value range before binarization. Corresponding to. If the pixel value before binarization is 50% or more of the pixel value range (128 or more in this embodiment), the binarization result is 1 and the pixel value range before binarization is 255. Correspond.

The error generated in the binarized result is determined as follows. That is, when the error is E and the pixel value of the pixel of interest before binarization is S, and the binarization result is 0, E = S, and when the binarization result is 1 Is E = S-255. Consider now some examples in FIG. When the pixel of interest is pixel (0, 1), the pixel value is 15, so 2
The digitized result is 0. However, in this case, 15 pieces of information originally held by this pixel are lost. This is the error, and the error E here is +1
It becomes 5. Next, when the pixel of interest is pixel (1, 1),
Since the pixel value is 180, the binarized result is 1. In this case, this pixel originally had 18
It means that 75 is added more than 0 information. That is, the error E is -75. When the pixel value of the pixel of interest before binarization is 0 or 255, the error E is of course 0.

The error generated by the binarization loses the signal contained in the original image or adds an extra signal, so that the halftone dots in the original image are deformed. Therefore, by adding this error to the pixel before binarization existing in the vicinity of the pixel of interest, it is possible to reduce the deformation of the halftone dots. That is, when a part of the signal included in the original image is lost as a result of binarizing the pixel of interest, only the lost signal is added to the pixel before binarization existing in the vicinity of the pixel of interest and the original signal is added. When an extra signal not included in the image is added, the extra signal is subtracted from the pixel before binarization existing in the vicinity of the pixel of interest. Since the subtraction in the latter case is equivalent to “addition of error having a minus sign”, such error compensation can be generally considered as “addition of error”.

In this embodiment, as shown in FIG. 3A, the pixels before binarization existing in the vicinity of the pixel of interest are 4 pixels, and the error is to be added. When the pixel of interest scans in the main scanning direction X or the sub scanning direction Y, the number of error addition targets naturally changes. FIG. 3B shows an addition target of the error when the pixel of interest is located in the 0th column (excluding the pixel (m, 0)), and FIG. 3C shows that the pixel of interest is the nth pixel.
It is the addition target of the error when it is located in the column (excluding the pixel (m, n)). FIG. 3D shows the case where the pixel of interest is located in the m-th row (excluding the pixel (m, n)). However, in this case, there is only one pixel before binarization, so it is inevitable. The pixel is also targeted for the addition of the error. FIG.
(E) is when the pixel of interest is the pixel (m, n). In this case, since the binarization is completed for all the pixels, the error generated here is discarded. Note that FIGS. 3B to 3E are exceptional among the pixels of the original image, so that the case of FIG. 3A can be mainly considered.

Next, the error addition will be described. FIG.
(A) is an example of the pixel value of the pixel of interest Za and the four pixels Z1, Z2, Z3, and Z4 before binarization that exist in the vicinity thereof. The pixel value of the pixel of interest Za is 192, and the four pixels Z1, Z2, Z3, and Z4 before binarization are 224 and 1 respectively.
60, 32, 96. At this time, if the pixel of interest Za is binarized, the value becomes 1, and the resulting error is -63. When the binarization result of the pixel of interest Za is 1, 4 pixels Z before binarization
Among Z1, Z2, Z3 and Z4, the one having the smallest pixel value is set as the addition candidate, and the error -63 is added. Then, as a result of addition (specifically, subtracting 63), when the pixel value of the addition candidate pixel is smaller than the lower limit value 0 of the pixel value range, the pixel value of the addition candidate pixel is set to the lower limit value 0 and remains. The error is added to the next addition candidate pixel. In the case of FIG. 4A, since the pixel Z3 has the minimum value 32, the error −63 is added to this pixel value. Then, the pixel value of the pixel Z3 becomes 0, but the error -31 still remains. Therefore, the remaining error of −31 is added to the smallest one of the remaining three pixels Z1, Z2, and Z4 before binarization. FIG. 4B shows the result of binarizing the pixel of interest Za in FIG. 4A and adding and distributing the generated error in this way. The pixel values of the pixels Z3 and Z4 before binarization are updated.

Further, consider FIG. 5A. The pixel value of the target pixel Zb is 64, and the 4 pixel Z5 before binarization
Z6, Z7, and Z8 are 160, 224, 32, and
96. At this time, if the pixel of interest Zb is binarized, it becomes 0, and the resulting error is 64. When the binarization result of the target pixel Zb is 0, the four pixels Z5, Z6, Z before binarization
Of Z7 and Z8, the pixel having the largest pixel value is set as an addition candidate pixel, and the error 64 thereof is added. Then, as a result of the addition, the pixel value of the addition candidate pixel is the upper limit value 25 of the pixel value range.
When it becomes larger than 5, the pixel value of the addition candidate pixel is set to the upper limit value 255, and the remaining error is added to the next addition candidate pixel. In the case of FIG. 5A, since the pixel Z6 has the maximum value 224, the error 64 is added to this pixel value. Then, the pixel value of the pixel Z6 becomes 255, but the error 33
Is the state that remains. Therefore, the remaining error 33 is similarly added to the largest one of the remaining three pixels Z5, Z7, and Z8 before binarization. FIG. 5B shows the result of binarizing the pixel of interest Zb in FIG. 5A in this way and adding and distributing the generated error. Pixels Z5 and Z6 before binarization
The pixel value of has been updated.

As a result of advancing the error distribution as described above, when four pixels are used up as addition candidate pixels even though there are still errors to be distributed, the error is Is added to the pixel to be binarized. As a result, the pixel value of the pixel to be binarized next overflows from the pixel value range (value larger than 255).
Alternatively, underflow (value smaller than 0) may be performed. That is, the pixel value of the pixel to be binarized next can be any value regardless of the pixel value range. This is to reduce information loss in the vicinity of the pixel of interest as much as possible, and thus is not applied when the pixel of interest is in the n-th column.

<Specific Example> Here, a state in which the pixel value of each pixel is updated in the process of performing the binarization processing according to the present invention will be described. Consider the pixels located in the range from the 0th row to the 4th row and the 0th column to the 5th column from the image signal shown in FIG. 2, and it is assumed that other pixels do not exist.

◎ Target pixel (0, 0) First, when the target pixel is the pixel (0, 0), the pixel value is 0, so the binarization result is 0. Since the error here is 0, other pixels are not updated. The result of this binarization is shown in FIG.

[Pixel of interest (0, 1)] Next, the pixel of interest moves to pixel (0, 1). At this time, since the pixel value is 15, the binarization result is 0, and an error of 15 occurs. Pixels for which this error is added are pixel (0, 2), pixel (1, 0), pixel (1,
1) and pixel (1, 2), and the pixel having the largest pixel value is pixel (1, 2). However, the pixel value of the pixel (1, 2) is 255, which is the upper limit value of the pixel value range. For this reason, it is not possible to add an error to the pixel (1, 2), so that the pixel having the largest pixel value among the pixel (0, 2), the pixel (1, 0), and the pixel (1, 1) is added. To do.
Here, the pixel (1, 1) has the maximum pixel value of 180, and thus is a candidate for addition, and an error of 15 is added. The result of this process is shown in FIG.

[Pixel of interest (0, 2)] Next, the pixel of interest moves to pixel (0, 2). Since this pixel value is 121, the binarization result is 0,
An error of 1 occurs. First, 60 of the error 121 is added to the pixel (1,1) that is the addition candidate pixel, and the pixel value of the pixel (1,1) becomes 255. The remaining error 61 is added to the pixel (0, 3) that is the second addition candidate. The result of this processing is shown in FIG.

◎ Target pixel (0, 3) Next, the target pixel moves to the pixel (0, 3). Since this pixel value is 222, the binarization result is 1 and the error is −
33. This error is due to pixel (0,4), pixel (1,
2), the pixel (1, 3), and the pixel (1, 4) are added to the pixel (0, 4) having the smallest pixel value. As a result, the pixel value of the pixel (0,4) is updated to 120. The result of this processing is shown in FIG.

[Pixel of interest (0,4)] Next, the pixel of interest moves to pixel (0,4). Since this pixel value is 120, the binarization result is 0 and the error is 120. This error has a pixel value of 255 for pixel (1,3) and pixel (1,4).
5) is added. The result of this processing is shown in FIG.

◎ Target pixel (0, 5) Next, the target pixel moves to the pixel (0, 5). Since this pixel value is 16, the binarization result is 0 and the error is 16. In this case, only two pixels, pixel (1,4) and pixel (1,5), can be added, but pixel (1,5) is the smaller of these two pixels. The error is added to the pixel. The result is shown in FIG.

(2) Subsequent processing Although the binarization of the 0th row is completed as described above, the same processing is subsequently performed from the 1st row to the 4th row to binarize all the pixels. FIG. 12 shows the result. FIG.
As a result of binarizing the pixel (4, 5) in 2, an error of -47 occurs as shown on the right of the pixel, but since this error does not exist in the addition target, the pixel to be binarized next to add. Although the binarization process is completed in this way, as shown in FIG. 12, a binarization result of 1 forms a cluster and a binarization result of 0 is obtained. Form several joined masses. This means
That is, it indicates that the shape of the original image as a halftone dot is well maintained.

<Processing Flow in Device> Next, FIGS. 13 and 14 show a processing flow performed by the CPU 2 of FIG.
FIG. 13 is a flow of the whole processing for binarizing all pixels. FIG. 14 is a flowchart illustrating in detail the process of adding and distributing the error (step S5) in FIG.

First, in FIG. 13, the pixel of interest is set to pixel (0, 0) in step S1, and the pixel value of the pixel to which the error generated when the pixel of interest is binarized is added is read out in step S2. Then, the target pixel is binarized in step S3, and the pixel value of the target pixel is set to 2 in step S4.
Update to the quantification result. Then, in step S5, the additional distribution of the error is performed. From FIG. 14, an error E generated as a result of binarizing the target pixel is calculated in step S10, and it is determined in step 11 whether this error E is 0 or not. If E = 0, the process of the additional distribution of error (step S5) is completed,
If the error E is not 0, the process proceeds to step S12.

In step S12, it is determined whether the error E is 0 or more. If the error E is E> 0, in step S13, pixels with a pixel value of 254 or less are extracted from the error addition target pixels, and if not extracted (step S14), the pixel to be binarized with the error (next Pixels) (step S21), and the error addition and distribution process (step S5) ends. If it has been extracted, the one with the maximum pixel value is further selected (step S15). Then, the error E is added to the pixel with 255 being the upper limit, and the pixel is updated (step S16). Then, the process is returned to step S11 again. If the error E is not E> 0 in step S12, the pixel whose pixel value is 1 or more is extracted from the error addition target pixels in step S17. If not extracted (step S18), the error is then binarized. Pixel (Next pixel)
(Step S21), and the error addition and distribution process (step S5) ends. If the pixel values have been extracted, the one with the smallest pixel value is selected (step S19). Then, the error E is added to the pixel with the lower limit being 0, and the pixel is updated (step S20). Then, similar to the above, the process is returned to step S11. With such a flow, the error is added and distributed (step S5).

Returning to FIG. 13, when step S5 is completed, the pixel of interest is scanned in steps S6, S7 or steps S8, S9. And 2 for all pixels
When the value conversion is completed, all the processing is completed.

In the above description, four pixels as shown in FIG. 3A are selected as the pixels existing in the vicinity of the target pixel before binarization and which can be the targets of error addition. Twelve pixels may be selected as indicated by the shaded area in FIG. Further, other pixel configurations may be used as long as they are pixels before binarization existing near the target pixel.

<Generalization of Processing> The embodiment of the present invention has been described above. The generalization of such processing is as follows.

That is, in the example of FIG. 4, the error caused by binarization of the pixel of interest Za: E = 192−255 = −63 is set to a plurality of pre-binarized pixels Z1 to Z4 existing in the vicinity of the pixel of interest Za. Of these, a pixel (Z1 = 22) having a pixel value close to the pixel value 255 (output logic level = 1) after binarization of the target pixel Za.
4), etc.-Preferentially adding to a pixel having a far pixel value (Z3 = 32, etc.).

Specifically, in the order of the pixel values far from the binarized pixel value 255 of the pixel of interest Za (32, 96,
...) designates the order of addition candidate pixels. Then, the first addition candidate pixel (Z3 = 32) designated in the above order
The pixel value of the
If it exceeds ~ 255 (less than 0 in this case), the part of error -63 that exceeds this range -31
Is the second candidate pixel Z4 which is the next candidate in the above order.
To the pixel value 96 of.

The same expression can be used in the case of FIG. That is, an error caused by binarization of the pixel of interest Zb: E = 64-0 = 64, among the plurality of pre-binarization pixels Z5 to Z8 existing in the vicinity of the pixel of interest Zb: 2 of the pixel of interest Zb Pixels having pixel values close to the pixel value 0 (output logic level = 0) after binarization (Z7 = 32, etc.) are preferentially added to pixels having far pixel values (Z6 = 224, etc.).

Specifically, in the order of the pixel values farther from the pixel value 0 after binarization of the target pixel Zb (224, 160,
...) designates the order of addition candidate pixels. Then, the first addition candidate pixel (Z6 = 22) designated according to the above order.
When the pixel value of 4) exceeds the pixel value range of 0 to 255 (in this case, becomes larger than 255) due to the addition of the error 64, the portion 3 of the error 64 that exceeds this range 3
3 is the second candidate pixel Z which is the next candidate in the above order.
5 is added to the pixel value 160.

As described above, according to the present invention, "the error (E) caused by the binarization of the target pixel is determined to be 2 of the target pixel among the plurality of pre-binarized pixels existing in the vicinity of the target pixel.
Pixels having a pixel value closer to the pixel value (0 or 255) corresponding to the logic level (0 or 1) after binarization,
It can be generally expressed in the form of "addition is preferentially applied to pixels having distant pixel values". However, the values in the parentheses are examples of the case where the dynamic range is 0 to 255.

[0043]

According to the invention described in claim 1 or 5, when the binarization result is 1, for example, the error is distributed so that 0 is increased in the pixels in the vicinity thereof. There is. Therefore, good consistency is maintained before and after binarization.

Further, according to the inventions of claim 2, claim 3, claim 6 and claim 7, even if the addition candidate pixel exceeds the pixel value range due to the addition of the error, the error is not truncated and Since it is added to the addition candidate pixel of, the error signal lost due to the generated error is minimized. For this reason, the consistency before and after the binarization can be maintained even better than in the case of claim 1 or claim 5.

That is, as a result of the above, the shape as a halftone dot can be maintained, and moire does not occur.

Further, if the addition and distribution of the error generated by binarizing the pixel of interest is completed, the binarization process for the pixel of interest is completed at that point, so high-speed processing is possible.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a diagram showing an array of pixels forming an image signal.

FIG. 3 is a diagram showing a configuration of a pixel of interest and a pixel before binarization existing in the vicinity thereof according to the embodiment of the present invention.

FIG. 4 is a pixel of interest when the binarization result is 1, and
It is a figure which shows the pixel value with four pixels before binarization which exist in the vicinity.

FIG. 5 is a pixel of interest when the binarization result is 0,
It is a figure which shows the pixel value with four pixels before binarization which exist in the vicinity.

FIG. 6 is a diagram showing a result of binarizing a target pixel (0, 0).

FIG. 7 is a diagram showing a result of binarizing a target pixel (0, 1).

FIG. 8 is a diagram showing a result of binarizing a target pixel (0, 2).

FIG. 9 is a diagram showing a result of binarizing a target pixel (0, 3).

FIG. 10 is a diagram showing a result of binarizing a pixel of interest (0, 4).

FIG. 11 is a diagram showing a result of binarizing a pixel of interest (0, 5).

FIG. 12 is a diagram showing a result of binarizing a pixel of interest (4,5).

FIG. 13 is a flowchart showing an overall processing flow according to the embodiment of the present invention.

FIG. 14 is a flowchart showing a flow of processing of error addition and distribution according to the embodiment of the present invention.

FIG. 15 is a diagram showing another example of the configuration of a pixel of interest and a pixel existing in the vicinity thereof before binarization.

[Explanation of symbols]

 P halftone dot of original image X main scanning direction of target pixel Y sub-scanning direction of target pixel 1 image input device 2 CPU 3 memory 4 image output device

Claims (8)

[Claims] 1. An error of a pixel value before binarization from a pixel value corresponding to a logical level after binarization by sequentially selecting a pixel of interest from an original image given as an array of pixels and binarizing it. Is a method of performing binarization for each pixel of the original image while adding to the pixel value of the pre-binarization pixel in the vicinity of the target pixel, wherein a plurality of binarization existing in the vicinity of the target pixel is performed. Of the previous pixel
Binary image, characterized in that the error is preferentially added to a pixel having a pixel value far from a pixel value having a pixel value close to the pixel value corresponding to the logic level of the pixel of interest after binarization. Method. 2. The method according to claim 1, wherein among the plurality of pre-binarization pixels, addition candidate pixels are arranged in the order of having a pixel value far from a pixel value corresponding to the logic level of the pixel of interest after binarization. When the pixel value of the first addition candidate pixel specified by the order exceeds the predetermined pixel value range allowed for the image value of the original image by the addition, the first of the errors is determined. A method for binarizing an image, characterized in that a portion of the addition candidate pixel that exceeds the pixel value range is carried over to the second addition candidate pixel which is the next candidate in the order. 3. The method according to claim 2, wherein the logic level after the binarization is 1 or 0, and the logic level after the binarization for the target pixel is 1.
, The order of the addition candidate pixels is specified in the ascending order of pixel values among the plurality of pre-binarized pixels, and the logic level after binarization of the target pixel is 0.
And the order of the addition candidate pixels is specified in the descending order of pixel values among the plurality of pre-binarized pixels. 4. The binarization of an image according to claim 1, wherein the original image is an image obtained by photoelectrically reading a halftone dot image. Method. 5. An apparatus for binarizing an original image given as an array of pixels for each pixel, the binarizing unit binarizing a pixel value of a target pixel selected from the array of pixels. Error calculation means for calculating an error of a pixel value before binarization from a pixel value corresponding to the logic level after binarization for the pixel of interest, and the error calculation unit existing in the vicinity of the pixel of interest and still A specific pixel selecting means for selecting a specific pixel according to an order having a pixel value far from a pixel value corresponding to the binarized logic level of the pixel of interest among a plurality of pixels which are not to be binarized; Error adding means for updating the pixel value of the specific pixel by adding the error to the pixel value of the specific pixel, and each pixel of the original image is sequentially selected as the pixel of interest to select the binary value. As well as new If the selected pixel of interest is one that has already been subjected to the addition as the specific pixel, a binarization repeating unit that performs the binarization based on the pixel value after receiving the update. An image binarization device comprising: 6. The apparatus according to claim 5, wherein the specific pixel selection means adds the plurality of pre-binarized pixels in an order from a pixel value corresponding to a binarized logic level of the pixel of interest. Order determining means for determining the order of the candidate pixels, and when the pixel value of the first addition candidate pixel specified according to the order exceeds a predetermined pixel value range allowed for the image value of the original image by the addition, An image is characterized by further comprising a carry-over addition means for carrying over and adding a portion of the error exceeding the pixel value range for the first addition candidate pixel to the second candidate candidate pixel for addition in the order. Binarization device. 7. The apparatus according to claim 6, wherein the logic level after the binarization is 1 or 0, and the order determining means sets the logic level after the binarization for the target pixel to be 1.
And a means for determining the order of the addition candidate pixels in the ascending order of the pixel value among the plurality of pre-binarized pixels, and the logic level after the binarization for the target pixel is 0.
And a means for determining the order of the addition candidate pixels in descending order of pixel value among the plurality of pre-binarized pixels. 8. The binarization of an image according to claim 5, wherein the original image is an image obtained by photoelectrically reading a halftone dot image. apparatus.