JPH09246510A - Infrared ray solid-state image sensing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make the best of performance of a Schottky barrier thermistor by forming a semiconductor substrate and a metallic silicide layer of a member wherein an accumulated time of signal charge of a Schottky barrier thermistor is specific. SOLUTION: In a silicon 1, n-type silicon wherein a surface azimuth of an element formation surface (a formation surface of a metallic silicide layer 11, etc.) is a <111> surface is used. In an SBT 10, the metallic silicide layer 11 is formed on an upper surface of the silicon substrate 1. In the process, the semiconductor substrate 1 forming a Schottky barrier thermistor and the metallic silicide layer 11 are formed of a member wherein an accumulated time of signal charge of a Schottky barrier thermistor is 1/30sec. or less and close to 1/30sec. Therefore, it is possible to make the best of performance of a Schottky barrier thermistor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an infrared solid-state image pickup device, for example, an infrared solid-state image pickup device capable of obtaining an infrared image by using a Schottky barrier thermistor in a light receiving portion.

[0002]

2. Description of the Related Art In recent years, Pt has been used in the field of infrared detection.
Development of a quantum infrared image sensor using a substance such as Si, InSb, or HgCdTe for photoelectric conversion is in progress. However, these quantum infrared image sensors must cool the device. On the other hand, a thermal infrared sensor such as a pyroelectric type does not require cooling, but its sensitivity is poor.

However, in recent years, with the development of micromachine technology, a technology for creating a space under the light receiving portion has been developed,
The sensitivity of the thermal infrared sensor has been greatly improved, and it has become possible to convert various thermal infrared sensors into image sensors.

A Schottky barrier thermistor (M. Kimura "Schott" is one of various thermal sensors.
ky Barrier Thermistor on
the Micro-Air-Bridge ”The
7th International Conference
ence on Solid-State Senso
rs and Actuators pp 746-74
9). This is MoSi ₂ , NiSi, and Pt
The fact that the reverse current that flows when a reverse bias voltage is applied to a Schottky barrier diode such as Si largely changes depending on the temperature of the element is used.

FIG. 7 shows an example of the structure of a conventional Schottky junction temperature sensor. This Schottky junction temperature sensor uses a thermally oxidized SiO ₂ film as a mask on a silicon (Si) substrate having an n-type epitaxial layer 201a on a high-impurity concentration n-type substrate 201 to form boron (B).
Is doped into the n-type epitaxial layer 201a in a donut shape by thermal diffusion of impurities to form a p-type region 204, whereby a pn junction is formed. Also, S
An ohmic lower electrode 206 is formed by etching the thermally-oxidized SiO ₂ film under the i substrate, depositing aluminum (Al) by vapor deposition, and sintering.

Of the upper thermally-oxidized SiO ₂ film 205, a portion inside a circle having a diameter at an intermediate portion between the inner diameter and the outer diameter of the donut-shaped p-type region 204 is removed by photolithography, and then aluminum is removed. Top metal electrode 2 of Schottky junction diode after vapor deposition and patterning
By forming 03, the Schottky junction 202
Are formed. The diameter of this Schottky junction portion 202 can be set to 0.5 mm, for example.

Further, the operational amplifier (OP amplifier) 20 is added to the Schottky junction diode.
7, the reverse voltage Va is always applied from the power source (E) 206. The constant application of the reverse voltage to the Schottky junction diode in this manner is referred to as "current mode" here.

A current flowing through the Schottky junction diode flows into the feedback resistor (Rf) 208 attached to the OP amplifier 207, and the voltage drop across the feedback resistor 208 is equal to the output voltage Vo of the OP amplifier 207. By measuring the output voltage Vo, the current flowing through the Schottky junction diode can be measured.

FIG. 8 shows the voltage (V) of the Schottky junction diode when the temperatures are T1 and T2 (T1 <T2).
-A graph showing an outline of current (I) characteristics. In this case, when the reverse direction applied voltage Va becomes larger (deeper) than about −3 V (V), the reverse current such as the current based on the applied voltage dependency of the image force, the tunnel current, and the leakage current flowing around the junction is reversed. A large amount of current other than the directional saturation current Is flows.

N-type Si at room temperature (T = about 300 K)
In the Schottky junction diode of, the reverse applied voltage V
It is considered that the reverse saturation current Is is sufficiently high when a is around -0.5V. Thus, the reverse saturation current Is
In this case, the initial region in which the current of the so-called Schottky junction diode, in which the currents other than the above can be ignored, is regarded as the reverse saturation current Is, is considered to be approximately -0.3V to -3.0V.

From the above, the voltage of the power supply 206 in FIG. 7 is an initial region where the current of the Schottky junction diode can be regarded as the reverse saturation current Is, for example, -1.0V.
If set to, the reverse applied voltage Va to the Schottky junction diode is also set to -1.0V. This is because the voltage drop at the input terminal of the OP amplifier can be ignored, and in the circuit shown in FIG. 7, the voltage of the power supply 206 is all the reverse applied voltage Va to the Schottky junction diode.

A Schottky junction diode is fixed to the Schottky junction diode as described above, for example, a reverse applied voltage Va of -1.0 V.
It was applied, as shown in FIG. 8, the reverse saturation current Is ₁ at the temperature T _1, the reverse saturation current Is at temperature T ₂
By obtaining ₂ from the measurement of the output voltage Vo of the OP amplifier 7, these exponential temperature T dependences (the reverse saturation current Is is proportional to the value of exp (e · φb / kT). , E is the elementary charge, φb is the Schottky barrier height, and k is the Boltzmann constant), and a predetermined output voltage Vo is obtained.
The temperature T corresponding to can be obtained.

On the other hand, there are various types of image sensors for visible light. Among them, in a MOS type image sensor, pixels (photodiodes) arranged in a matrix form are arranged vertically and horizontally by address lines. It is possible to select and read a signal corresponding to the electric charge accumulated in the pixel.

[0014]

By the way, B is a value generally used as a value indicating the performance of the thermistor.
There is a value called a constant. The B constant is a numerical value indicating the rate of change of resistance with respect to the temperature change of the thermistor, and the larger the value, the higher the detection sensitivity of the thermistor. The B constant of a Schottky barrier thermistor (hereinafter referred to as SBT) composed of a Schottky junction diode is
It is expressed by the following equation (1).

B = q · φb / k (1)

Here, q is the amount of electron charge, φb is the Schottky barrier height (barrier height of the Schottky junction), and k.
Is Boltzmann's constant. That is, the B constant of the SBT is uniquely determined by the height of the Schottky barrier of the SBT.

For example, the conventionally used MoSi ₂ / n-
SBT Schottky barrier height φb made of Si <100>
Is 0.68 eV, and the B constant of this SBT is 7900
Degree.

As is clear from the above formula (1), the B constant becomes larger as the Schottky barrier height φb becomes higher. Further, the larger the B constant, the higher the detection sensitivity of the SBT. Therefore, the SBT having a high Schottky barrier height φb has a high detection sensitivity.

However, if the Schottky barrier height φb is increased to improve the SBT detection sensitivity,
The value of the reverse saturation current Is (value used for temperature detection) that is proportional to exp (e · φb / kT) becomes small, and it becomes difficult to detect it as an electric signal, so that the performance of the SBT cannot be effectively used. There is.

The present invention has been made in view of such a situation, and an object thereof is to effectively utilize the performance of the SBT.

[0021]

According to another aspect of the present invention, there is provided an infrared solid-state image pickup device, wherein a semiconductor substrate forming a Schottky barrier thermistor and a metal silicide layer respectively have a signal charge accumulation time of the Schottky barrier thermistor. Is 1/30 seconds or less, and is formed by a member having a time close to 1/30 seconds.

In the infrared solid-state image pickup device according to the first aspect, the semiconductor substrate and the metal silicide layer forming the Schottky barrier thermistor each have a signal charge accumulation time of 1/3 of the Schottky barrier thermistor.
It is formed of a member having a time of 0 second or less and close to 1/30 second.

[0023]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram of one pixel showing the configuration of an embodiment of an infrared solid-state image pickup device to which the present invention is applied.
In the embodiment shown in the figure, Japanese Patent Application No.
Basically the same as the embodiment shown in -289543,
The SBT 10 and the source region (S) of the MOS switch 20 are connected. The gate region (G) of the MOS switch 20 is connected to a scanning circuit (not shown), and the drain region (D) is connected to a read circuit (not shown) via a read line. The MOS switch 20 is adapted to turn on when a read pulse (high level signal voltage) is applied to its gate region.

In the infrared solid-state image pickup device of this embodiment, the charges generated in the light receiving section (SBT10) are not immediately read out, but the charges are accumulated in the light receiving section and its peripheral circuits for a certain period of time, and the accumulated charges are read out. (This is called "integration mode"). By using this "integration mode", the signal charge is increased even when the Schottky barrier height φb is increased (that is, the value of the reverse current Is is decreased) in order to increase the detection sensitivity of the SBT. Is stored, the value (electrical signal) used for measuring the temperature can be reliably detected, and the performance of the SBT can be effectively used.

Incidentally, FIG. 1 shows an infrared solid-state image pickup device 1
The configuration of pixels is shown, and actually, a plurality of pixels are formed in the infrared solid-state imaging device.

By the way, in a normal solid-state image pickup device, the frame rate is set to 1/30 sec. Therefore, the signal charge storage time in the SBT is 1/30
It must be shorter than sec.

However, if the Schottky barrier height φb is increased in order to increase the SBT detection sensitivity, S
Since the accumulation time of the signal charges in BT becomes long, the Schottky barrier height φb cannot be increased without limit.

That is, in order to make the best use of the performance of the SBT, the signal storage time should be around 1/30 sec (however, 1
It is desirable to increase the height of the Schottky barrier (increase the detection sensitivity) while keeping the value within / 30 sec).

The Schottky barrier height (barrier height of the Schottky barrier junction generated at the interface between the metal silicide layer and the semiconductor substrate) φb is the material of the metal silicide and impurities near the interface between the metal silicide layer of silicon and It is determined by the impurity concentration. Further, in recent research, there is also a report that the Schottky barrier height φb is also affected by the plane orientation of silicon on which the metal silicide layer is formed (plane orientation of silicon crystal). Therefore, a configuration example of the infrared solid-state imaging device in consideration of the above is shown below.

FIG. 2 is a sectional view showing a configuration example of one pixel of the infrared solid-state image pickup device shown in FIG. In the infrared solid-state imaging device according to the present embodiment, the silicon substrate 1 is made of n-type silicon whose plane orientation of the element formation surface (the formation surface of the metal silicide layer 11 and the like) is the <111> plane. There is. In the SBT 10, the metal silicide layer 11 is formed on the upper surface of the silicon substrate 1. In this embodiment, the metal silicide layer 11 is a platinum silicide layer. Lower part of the metal silicide layer 11 (silicon substrate 1
Donut-shaped guard ring 21 (p
A mold region (which also serves as the source region of the MOS switch 20) is formed.

On the other hand, in the MOS switch 20 formed adjacent to the SBT 10, the silicon thermal oxide film 2 is used.
3 is formed on the upper surface of the silicon substrate 1, and a polysilicon gate electrode 24 (gate region of the MOS switch 20) is formed on the upper surface of the silicon oxide film 23. Lower part of the silicon thermal oxide film 23 (silicon substrate 1
As described above, the guard ring 21 that also serves as the source region of the MOS switch 20 is formed in the middle, and the p-type diffusion layer 22 (the MOS switch 20) is provided at a position facing the guard ring 21. Drain region) is formed. In addition, under the silicon thermal oxide film 23,
The p-type region is not formed in the position corresponding to the formation position of the polysilicon gate electrode 24, and the n-type silicon substrate 1 is formed as it is. Further, a part of the p-type diffusion layer 22 which is the drain region of the MOS switch 20 is
It is in contact with the aluminum electrode 26.

A phosphorus-doped silicon oxide film (hereinafter referred to as PSG) 25 is formed on the MOS switch 20.
Are formed.

Next, the read operation of the signal charge of the infrared solid-state image pickup device of this embodiment will be described (however, for one pixel).

First, in the initial state, a low level signal voltage is applied to the polysilicon gate electrode 24 (gate of the MOS switch 20) and the MOS switch 20 is turned off. At this time, the SBT 10 and the MOS
In the source area (guard ring 21) of the switch 20,
It is assumed that signal charges are not accumulated.

When a voltage of, for example, +5 V is applied to the n ⁺ diffusion layer (not shown) in the silicon substrate 1 (SBT10
When a reverse bias is applied to the SBT 10), a reverse current corresponding to the height of the Schottky barrier of the SBT 10 flows over the depletion layer (between the guard ring 21 below the metal silicide layer 11) and the SBT 10 and the MOS switch 20 Electric charges corresponding to the received infrared rays are accumulated in the source region (guard ring 21).

This reverse current flows until the voltage due to the signal charge accumulated in the source region (guard ring 21) of the SBT 10 and the MOS switch 20 becomes 5 V (5 V
Will stop flowing). Here, the state in which the reverse current does not flow is called the saturation state, and the time from the start of the flow of the reverse current to the saturation state is the saturation time. In the infrared solid-state imaging device of the present embodiment, half the saturation time is the accumulation time of the signal charge of one pixel.

Then, a high-level voltage signal is applied to the gate (polysilicon gate electrode 24) of the MOS switch 20, and the MOS switch 20 is turned on. Then S
The signal charge accumulated in the source (guard ring 21) of the BT 10 and the MOS switch 20 is transferred to the drain region (p
It is output to the aluminum electrode 26 via the mold diffusion layer 22) and further supplied to a read circuit (not shown).

When the output of the signal charge is completed, the MOS switch 20 is turned off, and the accumulation of the signal charge is repeated again.

In the infrared solid-state image pickup device of this embodiment, as described above, the metal silicide 11 is the platinum silicide layer, and the silicon substrate 1 has the plane orientation of the formation surface of the metal silicide layer 11 of <111. The n-type silicon which is the> plane is used. When the silicon substrate 1 and the metal silicide layer 11 are formed of the above members, the above-mentioned saturation time (saturation time of one pixel) is set to 60 msec (when the element temperature is 25 ° C.). That is, the accumulation time of the signal charge of one pixel of the infrared solid-state imaging device of the present embodiment is set to 30 msec (half time of 60 msec).

The storage time of this signal charge is 30 mse
c is 1/30 sec (= reading period of the solid-state imaging device), which is the time for one frame of the normal video output system (=
It matches well with about 33 msec). Further, the B constant of this SBT is 9400, which means that the Mo
It is larger than the B constant of 7900 of the SBT of Si ² / n-Si <100>. Therefore, in this embodiment, the infrared detection sensitivity of the SBT can be maximized within the range where the signal charge storage time does not exceed 1/30 sec.

Further, in the solid-state image pickup device of the present embodiment, the signal charge storage time (30 msec) matches well with the normal signal read cycle (1/30 sec). Therefore, it is not necessary to provide an additional signal processing circuit for reading a signal, the size of the device can be reduced, the manufacturing cost can be suppressed, and the power consumption can be suppressed low.

FIG. 3 is a table showing the relationship among the members of the SBT (the members of the silicon substrate 1 and the metal silicide layer 11), the accumulation time of the signal charges of the SBT, the B constant and the Schottky barrier height. As is clear from the figure, in the case of the present embodiment (when n-type silicon having the crystal plane orientation of the element formation surface is the <111> plane is used for the silicon substrate 1 and platinum is used for the metal silicide layer 11), From the viewpoint of the charge accumulation time and the B constant (high detection sensitivity), it can be seen that it is most effective.

Further, the respective members of the silicon substrate 1 and the metal silicide layer 11 can be formed by members different from those in the above embodiment.

That is, the crystal plane orientation of the element formation surface is <1.
When the SBT 10 is formed by using n-type silicon of the 11> plane for the silicon substrate 1 and nickel for the metal silicide layer 11, as shown in FIG.
0 msec. Therefore, even in this case, S
The BT signal charge storage time is 1/30 sec or less, which is the normal frame rate, and 1/30 sec.
And the B constant (= 8900) becomes relatively large (the detection sensitivity is improved).

Further, as shown in FIG. 3, it is presumed that the Schottky barrier height φ should be set to about 0.75 eV to 0.80 eV so that the performance of the SBT can be used relatively effectively. It

Furthermore, the infrared solid-state image pickup device of the present invention comprises:
The configuration is not limited to that shown in FIG. 2, and other configurations are possible. For example, in order to improve the detection sensitivity of the infrared light receiving unit (SBT), the infrared light receiving unit (SBT) has a heat insulating structure (the heat capacity of the infrared light receiving unit is reduced) to increase the detection sensitivity. The present invention is applicable.

FIG. 4 is a sectional view showing the structure of another embodiment of the infrared solid-state image pickup device to which the present invention is applied. The configuration of the infrared solid-state imaging device of this embodiment is basically the same as that of the infrared solid-state imaging device shown in FIG.
The (infrared light receiving portion) has a diaphragm structure.

That is, in the infrared solid-state image pickup device of the present embodiment, the silicon substrate 1A is formed of n-type silicon whose crystal plane orientation of the element formation surface is the <111> plane, and the SBT 10A and the MOS switch 20A are formed. It is formed at a distant position. In this SBT 10A, a metal silicide layer 11A made of platinum silicide is formed on the upper surface of the silicon substrate 1A. A guard ring 21 is formed on the lower peripheral portion of the metal silicide layer 11A.
A-1 (p-type region) is formed.

Further, a substantially trapezoidal air gap (space) 100A is formed below the guard ring 21A-1, and the SBT 10A and the MOS switch 20 are separated by the air gap 100A.

Further, the n ⁺ diffusion layer 101A for applying the reverse bias to the SBT 10A is the guard ring 21.
The aluminum electrode 102A is formed on the outer side of A-1 and is connected to the upper part of the n ⁺ diffusion layer 101A.

The MOS switch 20 of this embodiment is
The p-type diffusion layer 21A-2, which is the source region, is formed in almost the same manner as the case shown in FIG.
Separately from A-1, it is formed independently (ie, S
The guard ring 21A-1 of the BT 10A does not also serve as the source region of the MOS switch 20). The p-type diffusion layer 21A-2 and the guard ring 21A-1 are connected to the aluminum electrode 21.
It is connected via A-3.

Next, the signal charge reading operation of the infrared solid state image pickup device shown in FIG. 4 will be described. The signal charge reading operation of the infrared solid-state imaging device of this embodiment is almost the same as that shown in FIG.

That is, in the initial state, a low level signal voltage is applied to the polysilicon gate electrode 24 and the MOS switch 20 is turned off. Then
It is assumed that no signal charge is stored in the source region (p-type diffusion layer 21A-2) of the SBT 10A and the MOS switch 20.

Next, a voltage of about +5 V is applied to the aluminum electrode 10.
2A is applied to the n ⁺ diffusion layer 101A (that is, the SBT 10A is reverse-biased). At this time, a reverse current corresponding to the Schottky barrier height of the SBT 10A is a depletion layer (a depletion layer formed under the metal silicide layer 11A (between the guard rings 21A-1)).
And flows to the source region (p-type diffusion layer 21A-2) of the SBT 10A and the MOS switch 20 to accumulate signal charges.

This reverse current flows to the SBT 10A and the MOS.
When the voltage due to the signal charges accumulated in the source region (p-type diffusion layer 21A-2) of the switch 20 reaches 5V, the current stops flowing (that is, the saturation state). The signal charge storage time of this embodiment is half the saturation time (the time from the start of signal charge storage to the saturation state), as in the case of the embodiment shown in FIG.

When a high level signal voltage is applied to the gate region (polysilicon gate electrode 24) of the MOS switch 20, the MOS switch 20 is turned on. Then, the signal charges accumulated in the source region (p-type diffusion layer 21A-2) of the SBT 10A and the MOS switch 20 are output to the aluminum electrode 26 via the drain region (p-type diffusion layer 22), and further, FIG. It is supplied to a readout circuit (not shown).

Also in the infrared solid-state image pickup device of this embodiment, since the silicon substrate 1A is made of n-type silicon having a crystal plane orientation of the <111> plane of the element formation surface and the metal silicide layer 11A is a platinum silicide layer. As in the case of the embodiment shown in FIG. 2, the signal charge accumulation time is 30 mse.
It becomes c. In addition, in the present embodiment, the infrared light receiving portion (SBT 10A) has a heat insulating structure, so that the infrared detection sensitivity is further enhanced.

FIG. 5 is a sectional view showing the structure of still another embodiment of the infrared solid-state image pickup device to which the present invention is applied. The configuration of the infrared solid-state imaging device of this embodiment is basically the same as the configuration of the infrared solid-state imaging device shown in FIG.
The difference is that 10B has an air bridge structure.

That is, the SBT 10B of the infrared solid-state image pickup device of this embodiment is formed on the silicon substrate 1B different from the silicon substrate 1 on which the MOS switch 20 is formed. For the silicon substrates 1 and 1B, n-type silicon whose crystal plane orientation of the element formation surface is the <111> plane is used.

Both ends of the silicon substrate 1B on which the SBT 10B is formed are supported by the bridge legs 103B, and the bridge legs 103B are fixed on the silicon substrate 1. An air gap (space) 100B is formed between the silicon substrate 1B and the silicon substrate 1 (between the bridge legs 103B). This SB
At T10B, the metal silicide layer 11B made of platinum silicide is formed on the upper surface of the silicon substrate 1B. In the outer peripheral portion below the metal silicide layer 11B,
A guard ring 21B-1 (p-type region) is formed.

The n ⁺ diffusion layer 101B for applying a reverse bias to the SBT 10B is the guard ring 21.
It is formed on the outside of B-1, and the aluminum electrode 102B is connected to the n ⁺ diffusion layer 101B.

The p-type diffusion layer 21B-2, which is the source region of the MOS switch 20, is formed separately from the guard ring 21B-1 unlike the case shown in FIG.
Both of them are connected via an aluminum electrode 21B-3.

Next, a signal charge reading operation of the infrared solid-state image pickup device shown in FIG. 5 will be described. The signal charge reading operation of the infrared solid-state imaging device of this embodiment is almost the same as that shown in FIG.

That is, in the initial state, a low level signal voltage is applied to the polysilicon gate electrode 24 and the MOS switch 20 is turned off. At this time, it is assumed that no signal charge is stored in the SBT 10B and the p-type diffusion layer 21B-2 (source region of the MOS switch 20).

Next, a voltage of about +5 V is applied to the aluminum electrode 10.
It is applied to the n ⁺ diffusion layer 101B via 2B (that is, the SBT 10B is reverse-biased). At this time, a reverse current corresponding to the height of the Schottky barrier of the SBT 10B flows over the depletion layer (the depletion layer formed in the lower portion of the metal silicide layer 11B (between the guard rings 21B-1)) and becomes SBT 10B. MOS switch 2
Signal charges are accumulated in the 0 source region (p-type diffusion layer 21B-2).

This reverse current is applied to the SBT 10B and the MOS.
When the voltage due to the signal charges accumulated in the source region (p-type diffusion layer 21B-2) of the switch 20 reaches 5V, the current stops flowing (that is, the saturation state). The signal charge storage time is half the saturation time (the time from the start of signal charge storage to the saturation state), as in the case of the embodiment shown in FIG.

When a high level voltage signal is applied to the gate (polysilicon gate electrode 24) of the MOS switch 20, the MOS switch 20 is turned on. Then, the signal charges accumulated in the source region (p-type diffusion layer 21B-2) of the SBT 10B and the MOS switch 20 are output to the aluminum electrode 26 via the drain region (p-type diffusion layer 22), and further, It is supplied to a readout circuit (not shown).

Also in the infrared solid-state imaging device of this embodiment, since the silicon substrate 1B is made of n-type silicon having a crystal plane orientation of the <111> plane of the element formation surface and the metal silicide layer 11B is a platinum silicide layer. As in the case of the embodiment shown in FIG. 2, the signal charge accumulation time is 30 mse.
It becomes c. Further, in the present embodiment, the infrared ray receiving portion (SBT10B) has a heat insulating structure, so that the infrared ray detection sensitivity is further enhanced.

FIG. 6 is a sectional view showing the configuration of still another embodiment of the infrared solid-state image pickup device to which the present invention is applied. The configuration of the infrared solid-state imaging device of this embodiment is basically the same as the configuration of the infrared solid-state imaging device shown in FIG.
The configuration of 10C is slightly different.

That is, the SBT10C in this embodiment
Has a backside etching structure. This SBT10C
2 is basically similar to that of the SBT 10 shown in FIG. 2, and the lower side of the silicon substrate 1 (metal silicide layer 11
A trapezoidal air gap 100C is formed by etching on the side opposite to the surface on which C is formed.

Next, the signal charge reading operation of the infrared solid-state imaging device of this embodiment will be described. The signal charge reading operation of this infrared solid-state imaging device is almost the same as that of the embodiment shown in FIG.

First, as an initial state, a low-level voltage signal is applied to the polysilicon gate electrode 24 (gate of the MOS switch 20), and the MOS switch 20 is turned off. At this time, SBT10
Source of C and MOS switch 20 (guard ring 21
It is assumed that no signal charge is stored in C).

Next, a voltage of, for example, +5 V is applied to the n ⁺ diffusion layer (not shown) in the silicon substrate 1 (SBT1
Reverse bias on 0C). Then SBT10
The reverse current corresponding to the height of the Schottky barrier of C is the depletion layer (the guard ring 2 below the metal silicide layer 11C).
1C) and the signal charges are accumulated in the source region (guard ring 21C) of the SBT 10C and the MOS switch 20.

This reverse current is applied to the SBT 10C and the MOS.
When the voltage due to the signal charges accumulated in the source region (guard ring 21C) of the switch 20 reaches 5V, the current stops flowing (that is, the saturation state). The signal charge storage time is the saturation time (the time from the start of the signal charge storage to the saturation state) as in the case of the embodiment shown in FIG.
Half the time.

When a high-level voltage signal is applied to the gate (polysilicon gate electrode 24) of the MOS switch 20, the MOS switch 20 is turned on. Then, the signal charge accumulated in the source region (guard ring 21C) of the SBT 10C and the MOS switch 20 becomes
Aluminum electrode 2 through the drain region (p-type diffusion layer 22)
6 and is supplied to a read circuit (not shown).

Also in the infrared solid-state imaging device of this embodiment, since the silicon substrate 1C is made of n-type silicon having a crystal plane orientation of the <111> plane of the element formation surface and the metal silicide layer 11C is a platinum silicide layer. As in the case of the embodiment shown in FIG. 2, the signal charge accumulation time is 30 mse.
It becomes c. In addition, in this embodiment, the infrared ray receiving section (SBT10C) has a heat insulating structure, so that the infrared ray detection sensitivity is further enhanced.

[0078]

As described above, according to the infrared solid-state image pickup device of the present invention, the semiconductor substrate and the metal silicide layer of the Schottky barrier thermistor have a signal charge accumulation time of 1/30 seconds or less. ,And,
Since the structure is made of a member having a time close to 1/30 seconds, the performance of the Schottky barrier thermistor can be maximized.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an electrical configuration of an embodiment of an infrared solid-state imaging device to which the present invention is applied.

FIG. 2 is a cross-sectional view showing the configuration of the infrared solid-state imaging device shown in FIG.

FIG. 3 is a diagram showing a relationship among a member forming the SBT 10 shown in FIG. 2, a signal charge accumulation time, a B constant, and a Schottky barrier height.

FIG. 4 is a sectional view showing the configuration of another embodiment of the infrared solid-state imaging device to which the present invention is applied.

FIG. 5 is a sectional view showing a configuration of still another embodiment of the infrared solid-state imaging device to which the present invention is applied.

FIG. 6 is a cross-sectional view showing the configuration of still another embodiment of the infrared solid-state imaging device to which the present invention is applied.

FIG. 7 is a circuit diagram showing a configuration of an example of a conventional Schottky junction temperature sensor.

8 is a graph showing an outline of voltage V-current I characteristics of a Schottky junction diode which constitutes the Schottky junction temperature sensor of FIG.

[Explanation of symbols]

1,1B Silicon substrate 10,10A, 10B, 10C SBT 11,11A, 11B, 11C Metal silicide layer 20 MOS switch 21,21A-1,21B-1,21C Guard ring 21A-2,21B-2 p-type diffusion layer (Source region) 22 p-type diffusion layer (drain region) 23 silicon thermal oxide film 24 polysilicon gate electrode 25 PSG 26 aluminum electrode 100A, 100B, 100C air gap 101A, 101B, 101C n ⁺ diffusion layer 102A, 102B, 102C aluminum Electrode 201 Substrate 201a n-type epitaxial layer 202 Schottky junction 203 Upper metal electrode 204 P-type region 205 Thermally oxidized SiO ₂ film 206 Lower electrode 207 OP amplifier 208 Resistance

Claims (4)

[Claims] 1. An infrared solid-state imaging device comprising a Schottky barrier thermistor in which a metal silicide layer is formed on a predetermined surface of a semiconductor substrate, wherein the semiconductor substrate and the metal silicide layer are respectively formed of the Schottky barrier thermistor. An infrared solid-state imaging device, which is formed of a member that has a signal charge accumulation time of 1/30 seconds or less and a time close to 1/30 seconds. 2. The barrier height of a Schottky junction formed at the interface between the semiconductor substrate and the metal silicide layer of the Schottky barrier thermistor is 0.75 eV to 0.
The infrared solid-state imaging device according to claim 1, wherein the infrared solid-state imaging device is formed of a member having a voltage of 85 eV. 3. The semiconductor substrate is an n-type silicon substrate in which the plane direction of the predetermined surface on which the metal silicide layer is formed is a <111> plane, and the metal silicide layer is a platinum silicide layer. The infrared solid-state imaging device according to claim 1, wherein 4. The semiconductor substrate is an n-type silicon substrate in which the plane direction of the predetermined surface on which the metal silicide layer is formed is a <111> plane, and the metal silicide layer is a nickel silicide layer. The infrared solid-state imaging device according to claim 1, wherein