JPH09232878A - High frequency circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To miniaturize a delay line by reducing the delay time of a circuit. SOLUTION: In the polarity reversion amplifier of the one signal (4) of the two signal to be subtracted by a synthesizer, a reverse amplifier 4 using a concentrated constant circuit is provided. In the delay line controlling the delay of the other signal(2), the delay line 2 corresponding to the delay amount by the reverse amplifier 4 is provided. The subtractions of these two signals are performed by using a synthesizer 3. An input signal (1) is distributed to signals (2) and (4) by a distributor 1. The polarity of the signal(4) is inverted by the reverse amplifier 4, the signal (4) is amplified up to the level correcting the loss in the distributor 1 and a signal (5) is outputted. The other signal (2) passes the delay line 2 and the signal (2) is delayed to the delay time of the signal corresponding to the delay amount of the output signal (5) that the signal (4) delays in the reverse amplifier 4. Thus, the signals (3) and (5) match in phases. In the synthesizer 3, the signals (3) and (5) are inputted, a signal which is the same in a phase and different in a polarity is added and a signal (6) is outputted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency circuit for subtracting two signals having a relatively low frequency by using a synthesizer and reducing the delay time to downsize the delay line.

[0002]

2. Description of the Related Art FIG. 3 shows a system diagram of a high-frequency circuit that subtracts two signals by using a combiner. 1 is a distributor for distributing the signal, 32 is a delay line for delaying the distributed signal, 3 is a combiner for combining the two signals, 34 is an inverting amplifier for amplifying the signal to a required level and inverting the polarity. Is.

The input signal is two signals from the distributor 1,
Distributed to The polarity of the signal is inverted by the inverting amplifier 34, and the signal is amplified to a level necessary to correct the loss in the distributor 1 and the like to obtain the signal. One of the signals passes through the delay line 32, corrects the delay time generated in the inverting amplifier 34, and outputs the signal. After that, the signal is input to the combiner 3, and signals having the same phase but different polarities are added and output as a signal.

Conventionally, a distributed constant circuit is generally used for a high-frequency circuit because of its ease of manufacture, reduction of the number of parts, reduction of cost, and the like. The lower the frequency of the high-frequency circuit, the larger the circuit tends to be, and in that case, the wiring pattern becomes longer and the delay time becomes longer. As before,
When a distributed constant circuit is used for the polarity inverting amplifier 34, the delay amount of the circuit such as the inverting amplifier 34 is large, and the length of the delay line 32 for correcting the delay amount is extremely long. I needed a long cable.

[0005]

When using such a long delay line 32, the delay line is housed by spirally winding it. This requires a lot of space,
As a result, miniaturization of the device was hindered.

In view of the problems of the prior art, an object of the present invention is to reduce the delay time and realize the miniaturization of the delay line.

[0007]

The above objective is accomplished by the use of lumped constant circuits in the construction of polarity inverting amplifiers. Since the lumped constant circuit can reduce the delay amount,
The delay line that corrects the delay time of the signal can be made compact.

[0008]

Embodiments of the present invention will be described below. FIG. 1 shows an embodiment of the present invention, and the same symbols as in FIG. 3 indicate the same parts. An inverting amplifier 4 using a lumped constant circuit is provided in the polarity inverting amplifier of one signal. The delay line that controls the delay of the other signal is provided with the delay line 2 corresponding to the delay amount of the inverting amplifier 4. And
The subtraction of these two signals is performed using the synthesizer 3.

The operation of this circuit is as follows. The input signal is distributed to the signal by the distributor 1. The polarity of the signal is inverted by the inverting amplifier 4, amplified to a level for compensating for the loss in the distributor 1, and the amplified signal is output. One signal passes through the delay line 2 and is delayed by a signal delay time corresponding to the delay amount of the output signal delayed by the inverting amplifier 4. As a result, the signal has the same phase and inverted polarity. The signal and the signal are input to the combiner 3, and signals having the same phase but different polarities can be added and output.

Since a lumped constant circuit is used in the circuit configuration of the inverting amplifier 4, the delay amount can be made extremely small. Therefore, the delay line 2 for correcting the delay amount can be made small. Since a coaxial cable is used in a high frequency circuit as an actual delay circuit, the delay amount is proportional to the length, and the smaller the delay amount, the shorter and the cable can be made smaller.

FIG. 2 shows another embodiment of the present invention, in which the difference between two input signals is taken, the difference voltage is inverted and amplified by an inverting amplifier, and the other is inputted as it is, and both signals are combined. To get the output.

The coupler 21 calculates the difference from the input signal,
The polarity of the difference voltage is inverted by the inverting amplifier 4 and its level is amplified to obtain an output. One signal is passed through the coupler 21 as it is, and delayed by the inverting amplifier 4 through the delay line 2 to obtain a delayed output. The two output signals have the same delay amount and phase, and are combined by the coupler 23 to obtain the output.

In this embodiment, for example, if the input signal is a signal distorted by interference and the input signal is a signal not interfered, the signal is taken by the coupler 21 and distorted by the interference. A signal comes out. The distorted signal component is inverted and amplified by the inverting amplifier 4 to obtain an inverted amplified signal component of the distorted signal. By combining this with a delayed signal obtained by delaying a signal distorted due to interference with the delay line 2, the coupler 23 cancels the distorted signal to obtain a signal without distortion. Obtained as output.

By using a lumped constant circuit for the inverting amplifier 4 which amplifies the difference between the distorted signal and the undistorted signal, the delay amount by the inverting amplifier 4 can be reduced, whereby the delay line 2 is miniaturized. Can be converted.

In the figure, the distortion component signal passes through the coupler 23, and the passage signal is output to the terminator 24.

[0016]

As described above, according to the present invention, since the delay amount of the circuit is reduced, the delay line becomes short and it is not necessary to spirally wind the delay line. Therefore, it is possible to downsize the device without requiring a large space for disposing the delay line.
Further, since the delay amount is small and the delay line is short, the delay line can be constructed at low cost.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 is a configuration diagram of another embodiment of the present invention.

FIG. 3 is a conventional configuration diagram.

[Explanation of symbols]

1 ... Distributor, 2 ... Delay line, 3 ... Combiner, 4 ... Inversion amplifier, 21, 23 ... Coupler, 24 ... Terminator.

Claims (1)

[Claims] 1. One of the two signals is inverted and amplified using a polarity inverting amplifier, the other signal is delayed through a delay line that corrects the delay time of the polarity inverting amplifier, and the two signals are combined by a combiner. In a high frequency circuit for synthesis, a lumped constant circuit having a small signal delay time is used for the polarity inverting amplifier.