JPH09232398A - Ferroelectric film evaluator and its method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To estimate the deterioration property of a dielectric film by enabling the deterioration test of polarization of the dielectric film to be performed easily and quickly. SOLUTION: A transfer gate TG1 is set to on-condition and a transfer gate TG2 is set to off-condition by control signals applied to input terminals T1 and T2 , and a fixed voltage is applied to a measurement terminal T3 , and pulse signals generated by a ring oscillator ROSC in which a plurality of inverters are connected in series and besides in circular form on the same semiconductor substrate are applied in a specified time to the electrode of the ferroelectric capacitor C1 connected to a node ND2 through a buffer BUF and a transfer gate TG1 , and then the transfer gate TG1 is switched to off condition and the transfer gate TG2 to on condition so as to stop the application of the pulse signal to the ferroelectric capacitor C1 , and the property of the ferroelectric capacitor C1 is measured through a measurement terminal T3 and an output terminal TOUT.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus and method for evaluating a ferroelectric film constituting a memory element of a ferroelectric semiconductor memory device, for example.

[0002]

2. Description of the Related Art In recent years, a ferroelectric film memory device using polarization of a ferroelectric film for data storage has attracted attention as a nonvolatile semiconductor memory device. In general, the polarization speed of a ferroelectric film is as fast as several tens of nanoseconds (10 ⁻⁹ seconds), so a nonvolatile semiconductor memory device using a ferroelectric film has an access speed comparable to that of a DRAM, It is highly expected as a universal element that can realize a nonvolatile semiconductor memory device.

FIG. 3 is a circuit diagram showing the structure of a memory cell of a semiconductor memory device using a ferroelectric film. In FIG. 3, C ₁ and C ₂ are ferroelectric capacitors, and TR ₁ and TR _{2 are}
Is a selection transistor, WL is a word line, DL is a drive line, BL ₁ and BL ₂ are bit lines, and SAMP is a sense amplifier.

Ferroelectric capacitors C ₁ and C in this example
Reference numeral ₂ is a capacitor formed by sandwiching a ferroelectric film between metal electrodes. The metal electrode is made of, for example, Pt, and the ferroelectric film is made of, for example, PZT (Pb (Zr _0.4 T
i _0.6 ) O ₃ ) or Y ₁ (SrBi ₂ Ta ₂ O ₉ ). In this example, one storage unit is composed of a pair of memory cells composed of a ferroelectric capacitor and a selection transistor,
One bit of data is stored by such one storage unit. Then, when data is stored, two memory cells in the same storage unit always have opposite polarizations, and contradictory data are stored respectively.

As shown, the select transistors TR ₁ ,
The gate electrode of TR ₂ is connected to the word line WL, one electrode of the ferroelectric capacitors C ₁ and C ₂ is connected to one diffusion layer of the select transistors TR ₁ and TR ₂ , and the other electrode is the drive line DL. It is connected to the. The selection other diffusion layer of the transistor TR _1, TR ₂ is connected to the bit lines BL _1, BL _2, respectively, the bit lines BL _1, B
L ₂ is connected to the sense amplifier SAMP. Also,
Although not shown, the word line WL is connected to the row decoder and the drive line DL is connected to the drive line driver.

FIG. 4 is a circuit diagram showing the bias state of the memory cell at the time of writing and reading data in this memory cell. FIG. 4A is a circuit diagram showing a bias state at the time of writing to the memory cell.
(B) is a circuit diagram showing a bias state at the time of reading the memory cell.

As shown in FIG. 4A, for example, when the storage unit shown in the figure is selected and data "1" is written to it, the word line WL is selected by the row decoder and the selection transistors TR ₁ and TR ₂ are selected. Both are set to the conductive state, and the drive line DL is set to 2V. Since a voltage of 5V is applied to the bit line BL ₁ , the node ND
₁ is raised to about 4V. On the other hand, since the voltage of 0V is applied to the bit line BL ₂ , the node ND ₂ is held at 0V in the memory cell on the opposite side.

[0008] Therefore, in the ferroelectric capacitor C ₁ 2
A voltage of V is applied, the ferroelectric film is polarized so as to relax the electric field, and data "1" is written. On the other hand, in the ferroelectric capacitor C _2, the voltage of -2V is applied, thereby, the strength opposite polarization is generated between the dielectric capacitor C _1, the data "0" is written.

At the time of reading data, as shown in FIG. 4B, the word line WL is selected by the row decoder, and the selection transistors TR ₁ and TR ₂ are both set to the conductive state. Then, the drive line DL is held at 0V by the drive line driver. Bit line BL ₁ , B
Both L ₂ are equalized to 0V.

Here, the bit line BL₁, BL_TwoTogether
Set to floating state, drive line DL is raised to 2V
Can be Therefore, the ferroelectric capacitor C₁, C_TwoThrough
Bit line BL due to coupling₁, BL_TwoNo electricity
The rank will rise. And caused by the polarization of the ferroelectric film
Memory in which data "1" is written due to hysteresis
The effective capacitor capacity on the cell side is larger than the other
Bit line BL ₁Data of "0" is written as the potential of
Bit line BL on the embedded memory cell side_TwoHigher.
This bit line BL₁, BL_TwoIs the sense amplifier S
The data detected by the AMP and stored in the storage unit.
Data is read.

Incidentally, at the time of reading, the data on the "1" side is destroyed and both memory cells are in the "0" state. However, due to the amplification of the sense amplifier SAMP, the bit line BL ₁ on the "1" side is changed. By raising the voltage to 5 V and rewriting the memory cell, the data “1” before reading is held.

In the above-mentioned example, one data storage unit is composed of a pair of memory cells composed of a ferroelectric capacitor and a selection transistor.
Although 1-bit data is stored, it is also possible to store 1-bit data by one memory cell by a measure such as connecting a dummy cell to one end of the differential sense amplifier. The degree of integration can be further increased.

[0013]

By the way, in the above-mentioned conventional ferroelectric memory device, since the original data is held when the data is read, it is necessary to rewrite the data, and it is not necessary to rewrite the data. Even in the case of storing the program code, rewriting is always performed and the polarization inversion is repeated. However, there is a problem that the ferroelectric film is slightly fatigued due to polarization reversal, and the data retention capability is reduced. Therefore, some guarantee is required. For example, since the read cycle of a normal program is about 200 nanoseconds, 10
In order to guarantee the annual use, it is necessary to guarantee rewriting about 10 ¹⁵ times.

In the conventional test for guaranteeing the fatigue of the ferroelectric film in the development stage, a pulse is externally applied to the test pattern of the ferroelectric capacitor by a pulse generator to repeatedly generate polarization inversion,
The deterioration characteristic of the ferroelectric film is measured. But in this case,
Since the prober and wiring have a lot of parasitic capacitance and the clock signal of the pulse generator itself has a limit, the pulse width thereof is at least about 1 microsecond (1 μs). Therefore, it is difficult to guarantee a sufficient system due to the problem of the examination period.

On the other hand, when an actual memory chip is manufactured and tested in a memory cell, it takes time to manufacture a sample, and the output result is judged only by correct / incorrect binary values, so that the degree of deterioration is accurately determined. There is a problem that cannot be estimated. Furthermore, even in this case, the rewriting speed cannot be accelerated, so it is difficult to estimate a long time of 10 years.

Further, since the deterioration of the ferroelectric film has a small temperature dependency, it is difficult to estimate the deterioration even if an accelerated test is performed in a high temperature state.

The present invention has been made in view of the above circumstances, and an object thereof is to easily and rapidly perform a polarization deterioration test of a ferroelectric film and to estimate the deterioration characteristic of the ferroelectric film. It is to provide a ferroelectric film evaluation apparatus and a method thereof.

[0018]

In order to achieve the above object, the present invention is formed on the same semiconductor substrate as a capacitor having a ferroelectric film sandwiched between first and second electrodes. A pulse oscillator, and the first electrode of the capacitor is connected to the output terminal of the pulse oscillator.

Further, in the present invention, the pulse oscillator is composed of an odd number of inverters connected in series and annularly.

Further, according to the present invention, the first capacitor
And a transfer gate whose conduction state is controlled by an external signal, the transfer gate being provided between the electrode and the output terminal of the pulse oscillator.

Further, according to the present invention, the first capacitor
And a transfer gate whose conduction state is controlled by an external signal, the transfer gate being provided between the electrode and the measurement terminal.

In the present invention, the first capacitor of the above
Is connected to the gate electrode of the transistor whose one terminal is connected to the measurement terminal.

Further, in the present invention, the above-mentioned capacitor is a memory element of a ferroelectric memory device.

Further, according to the present invention, there is provided a ferroelectric film evaluation method for evaluating a ferroelectric film using the above-mentioned ferroelectric film evaluation apparatus, wherein the pulse obtained by the pulse oscillator is a first pulse. Then, the ferroelectric film is repeatedly polarized to generate the accelerated polarization deterioration test.

According to the present invention, for example, a high-speed pulse signal is generated by a ring oscillator constituted by connecting an odd number of inverters in series and in a ring shape on the same semiconductor substrate as a ferroelectric capacitor. Then, for example, a pulse signal is applied to the first electrode of the ferroelectric capacitor via the transfer gate set to the conductive state by the control signal during the deterioration test of the ferroelectric capacitor, and, for example, the ferroelectric capacitor is used. The second electrode of is held at a fixed potential. As a result, in the ferroelectric capacitor, polarization in the ferroelectric film is repeatedly performed at high speed according to the pulse signal.

After the deterioration test, the transfer gate is switched from the conducting state to the non-conducting state by the control signal, the application of the pulse signal to the ferroelectric capacitor is stopped, and the ferroelectric capacitor is turned on via the measuring terminal. The property is measured.

Further, by connecting the first electrode of the ferroelectric capacitor to the gate electrode of the transistor,
The characteristic of the ferroelectric capacitor is indirectly expressed as a current through the transistor, and the deterioration characteristic of the ferroelectric capacitor is indirectly evaluated by measuring the current.

[0028]

BEST MODE FOR CARRYING OUT THE INVENTION First Embodiment FIG. 1 is a circuit diagram showing a first embodiment of a ferroelectric film evaluation apparatus according to the present invention. In FIG. 1, ROSC is a ring oscillator, INV ₁ , INV _{2 to} INV ₆ ... Are inverters that form the ring oscillator ROSC, and BUF.
Is a buffer circuit, INV _B1 and INV _B2 are buffers BUF
, TG ₁ is an nMOS transistor forming a transfer gate, TG ₂ is an output nMOS transistor, C ₁ is a ferroelectric capacitor, ND ₁ and ND ₂ are nodes, T ₁ and T ₂ are control signal input terminals, T ₃ is a measuring terminal, and T _OUT is an output terminal.

As shown in the figure, in the circuit of the ferroelectric film evaluation apparatus of this embodiment, odd-numbered stages, for example, 101 stages of inverters INV ₁ , INV _{2 to} INV ₆ ... ROSC is configured. Then, for example, the output terminal of the inverter INV ₄ forming the ring oscillator ROSC is connected to the input terminal of the inverter INV _B1 forming the buffer circuit BUF, and the node ND ₁ is formed by these connection points.

The buffer circuits BUF are connected in series.
Inverter INV_B1, INV_B2It is constituted by.
Inverter INV_B2Output terminal of transfer gate TG₁One
Transfer gate TG connected to the other input / output terminal₁The other of
Input / output terminal and transfer gate TG _TwoOne of the input and output terminals
Connected by these connection points node ND_TwoIs composed
And transfer gate TG_TwoThe other input / output terminal is the output terminal
T_OUTIt is connected to the. The transfer gate TG₁Be composed
The gate electrode of the formed nMOS transistor is the input terminal T
₁Connected to the transfer gate TG_TwoNMOS transistor
The gate electrode of the transistor is the input terminal T_TwoConnected to
You.

One electrode of the ferroelectric capacitor C ₁ is connected to the node ND ₂ and the other electrode is connected to the measuring terminal T ₃ . During the deterioration test of the ferroelectric capacitor C ₁ ,
A constant voltage, for example, a voltage of 2.5V is applied to the measuring terminal T ₃ .

In the above structure, the power supply voltage is, for example, 5
When set to V, the ring oscillator ROSC composed of an odd number of inverters generates a pulse signal that oscillates at a high speed between 0V and 5V.
The pulse period is, for example, several nanoseconds. Then, the pulse signal taken out from the node ND ₁ is transferred to the buffer BU.
Through F, through transfer gate TG ₁ and node ND ₁
Is input to

During the deterioration test of the ferroelectric capacitor, first,
A high-level control signal is input to the gate electrode of the transfer gate TG ₁ via the input terminal T ₁ . by this,
The transfer gate TG ₁ is set in the conductive state, and the continuous pulse signal generated by the ring oscillator ROSC is input to the node ND ₂ via the transfer gate TG ₁ in the conductive state, and one electrode of the ferroelectric capacitor C ₁ Applied to.

At this time, the voltage level of the control signal applied to the gate electrode of the transfer gate TG ₁ is, for example,
Since it is set to 7V, the transfer gate TG ₁ is set to the full conduction state, and the 0V or 5V pulse signal generated by the ring oscillator ROSC is fully applied to the electrode of the ferroelectric capacitor C ₁ .

Further, a constant voltage of, for example, 2.5 V is applied to the measuring terminal T ₃ to which the other electrode of the ferroelectric capacitor C ₁ is connected, whereby the ferroelectric capacitor C ₁
A voltage of ± 2.5V is continuously applied to both electrodes of
The polarization is repeated.

Further, the transfer gate TG₁Is set to the conductive state.
Transfer gate TG _TwoMark on the gate electrode
Applied non-conducting state by applied control signal
You. For example, input terminal T_TwoLow level (0V level
Control signal is input, that is, the transfer gate TG
_TwoA low-level voltage is applied to the gate electrode of the
TG_TwoAre set to a non-conductive state.

Therefore, the capacity of the node ND ₂ is kept very small. Therefore, rewriting for about 10 nanoseconds can be easily realized, and since it is only necessary to apply a constant voltage from the outside, the ferroelectric capacitor C ₁ can be evaluated very easily.

After a pulse signal is applied to the ferroelectric capacitor C ₁ for a certain period of time, the control signal applied to the input terminal T ₁ is switched from high level to low level and applied to the input terminal T ₂ . The control signal is switched from low level to high level. As a result, the transfer gate TG ₁ is switched to the non-conductive state and the transfer gate TG ₂ is switched to the conductive state, so that the continuous pulse generated by the ring oscillator ROSC is stopped from being applied to the ferroelectric capacitor C ₁ . The electrode of the ferroelectric capacitor C ₁ connected to the node ND ₂ is connected to the measurement output terminal T _OUT via the transfer gate TG ₂ in the conductive state.

In this case, the measuring terminal T_ThreeAnd output terminal T
_OUTThrough the ferroelectric capacitor C ₁Directly measure the characteristics of
The ferroelectric capacitor C₁The deterioration characteristics of
Can be easily evaluated.

As described above, according to this embodiment, the transfer gate TG _{1 is set} to the conductive state and the TG ₂ is set to the non-conductive state by the control signals applied to the input terminals T ₁ and T ₂ , and the odd number Of the pulse signal generated by the ring oscillator ROSC, which is configured by connecting the inverters in series and annularly, to the buffer BUF, and further to the transfer gate TG _1.
After applying the voltage to the electrode of the ferroelectric capacitor C ₁ connected to the node ND ₂ for a predetermined time via the transfer gate TG ₁ , the transfer gate TG ₁ is turned off by the control signal.
Since G ₂ is switched to the conductive state, application of the pulse signal to the ferroelectric capacitor C ₁ is stopped, and the characteristics of the ferroelectric capacitor C ₁ can be measured via the measurement terminal T ₃ and the output terminal T _OUT , High-speed rewriting of the ferroelectric capacitor C ₁ can be realized, and the ferroelectric film can be easily evaluated.

Second Embodiment FIG. 2 is a circuit diagram showing a second embodiment of the ferroelectric film evaluation apparatus according to the present invention. As shown, the ferroelectric film evaluating apparatus according to the second embodiment differs from the evaluation apparatus of the first embodiment shown in FIG. 1, the node ND ₂ and nMO
Since the connection form with the S-transistor is different and the configurations of the other circuits are all the same, only the differences between the second embodiment and the above-described first embodiment will be described.

As shown in FIG. 2, the node ND_TwoIs nMO
NMO connected to the gate electrode of the S-transistor NTR
The diffusion layers of the S-transistor NTR are the measurement terminals.
T_Four, T _FiveIt is connected to the.

In this circuit configuration, the characteristics of the ferroelectric film, which are expressed as the potential of the node ND ₂ , are indirectly observed by the current between the diffusion layers of the nMOS transistor NTR, so that the measurement terminals T ₄ and T ₅ are connected to each other. By measuring the current of the nMOS transistor NTR by using it, the deterioration characteristic of the ferroelectric film can be known.

In the measuring apparatus of the second embodiment, CV evaluation cannot be performed directly, but even if the capacitance of the ferroelectric capacitor C ₁ is very small and direct capacitance measurement is difficult, The characteristics of the capacitor C ₁ can be estimated indirectly.

In the first and second embodiments described above, for example, the ring oscillator ROSC is formed on the same semiconductor substrate as the ferroelectric capacitor for deterioration test, and the pulse signal generated by this is formed. A deterioration test of the ferroelectric capacitor is performed using the ferroelectric capacitor to evaluate the deterioration characteristic of the ferroelectric capacitor. In a semiconductor memory device using an actual ferroelectric capacitor, for example , Ring oscillator ROSC
It is needless to say that the deterioration characteristic of each ferroelectric memory element forming the semiconductor memory device can be evaluated by forming a pulse signal and generating a pulse signal.

[0046]

As described above, according to the ferroelectric film evaluation apparatus and method of the present invention, the stress deterioration test period of the ferroelectric film can be shortened from 1/10 to 1/100 of the conventional one. Moreover, there is an advantage that a detailed deterioration characteristic can be estimated by a simple operation.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of a ferroelectric film evaluation apparatus according to the present invention.

FIG. 2 is a circuit diagram showing a second embodiment of the ferroelectric film evaluation apparatus according to the present invention.

FIG. 3 is a circuit diagram showing a configuration of a memory cell of a semiconductor memory device using a ferroelectric film.

FIG. 4 is a circuit diagram showing a bias state at the time of writing and reading of a semiconductor memory device using a ferroelectric film.

[Explanation of symbols]

ROSC ... ring oscillator _{INV 1, INV 2 ~INV 6,} INV B1, INV B2 ...
Inverter BUF ... buffer circuit TG _1, TG ₂ ... transfer gate C ₁ ... ferroelectric capacitor ND _1, ND ₂ ... node T _1, T ₂ ... control signal input terminals _{T 3, T 4, T 5} ... measurement terminal T _OUT ... Output terminals TR ₁ , TR ₂ ... Select transistor WL ... Word line DL ... Drive line BL ₁ , BL ₂ ... Bit line SAMP ... Sense amplifier V _CC ... Power supply voltage GND ... Ground potential

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI Technical display location H01L 27/10 491 H01L 27/10 491 27/108 651 21/8242

Claims (7)

[Claims] 1. A capacitor having a ferroelectric film sandwiched between first and second electrodes, and a pulse oscillator formed on the same semiconductor substrate as the capacitor, wherein the first electrode of the capacitor is A ferroelectric film evaluation device connected to the output terminal of the pulse oscillator. 2. The ferroelectric film evaluation apparatus according to claim 1, wherein the pulse oscillator is composed of an odd number of inverters connected in series and annularly. 3. The ferroelectric film evaluation according to claim 1, further comprising a transfer gate which is provided between the first electrode of the capacitor and the output terminal of the pulse oscillator and whose conduction state is controlled by an external signal. apparatus. 4. The ferroelectric film evaluation apparatus according to claim 1, further comprising a transfer gate which is provided between the first electrode of the capacitor and the measurement terminal and whose conduction state is controlled by an external signal. 5. The ferroelectric film evaluation apparatus according to claim 1, wherein the first electrode of the capacitor is connected to the gate electrode of the transistor whose one terminal is connected to the measurement terminal. 6. The ferroelectric film evaluation apparatus according to claim 3, wherein the capacitor is a memory element of a ferroelectric memory device. 7. A ferroelectric film evaluation method for evaluating a ferroelectric film by using the ferroelectric film evaluation apparatus according to claim 1, wherein a pulse obtained by the pulse oscillator is a first pulse. Applied to the electrode of to repeatedly generate polarization of the ferroelectric film,
A method for evaluating a ferroelectric film that performs an accelerated deterioration test.