JPH09222476A - Radar device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a radar device capable of measuring a distance up to a target with wide measuring range by effectively using all digits of a shift- register. SOLUTION: Received signal formed in a reflection pulse signal receiver part 12 is sampled in a sampling circuit 14 at phase positions of every sampling pulse input from a control circuit 13 and forms binary signals of 16 bits. In an addition circuit 15, the binary signals of 16 bits are added many times for individual bits. A judgment circuit 16 makes 20 sampling pulses increased by 4 to 16 output from the control circuit 13, pushes out the binary signals of flip-flop A13' to A16 and adds binary signals more distant than ordinary measuring range to the flip-flop A1 to A4. Binary signals of poorer value due to delay and the like on the circuit are avoided and whole 16 digits become a measuring range.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a radar device for radiating a transmission pulse of radio waves, light, ultrasonic waves, etc. into space and detecting a reflection signal of a target of the transmission pulse.

[0002]

2. Description of the Related Art A radar device for a vehicle has been developed which diffuses and emits a pulse of a laser beam or the like to a space in front of the vehicle to detect a reflected signal of the pulse of the pulse emitted from a target such as a preceding vehicle. In a vehicle radar device, a weak reflected signal is detected to form a received signal, and a noise component is canceled by digital signal processing or analog signal processing to extract the amplitude of the reflected signal. Then, the peak position of the reflection signal is calculated based on the amplitude of the extracted reflection signal, and the distance to the target is calculated based on the phase difference between the peak of the reflection signal and the transmitted pulse.

Japanese Patent Laid-Open No. 7-072237 discloses an example of a method of processing a received signal in a vehicle radar device. In one example, the received signal is binarized at a plurality of phase positions synchronized with the transmission pulse, accumulated in a shift register having a predetermined number of digits, and the accumulated sampling data is added for a large number of consecutive transmission pulses. Then, by providing a dedicated logic circuit that is independent of the determination circuit that calculates the distance to the target using the arithmetic element, and processes the received signal,
A series of processing corresponding to one pulse-shaped signal is executed at a level of several microseconds, and even if the addition of about 10,000 times is included, 100 m
The distance to the target is measured every second at a repetition rate of less than a second. Also, the peak value is obtained with a resolution higher than the sampling interval by interpolating two added values before and after the peak.

In another example, a plurality of integrator circuits are used to integrate the received signal at a plurality of consecutive phase positions of equal length and different from each other. This integration is continuously executed over a large number of output pulses, regarding the average value of the noise component as the origin.

[0005]

In a radar device for a vehicle that forms amplitude data of a received signal for each transmitted pulse by using a shift register having a predetermined number of digits, the distance transmitted by the transmitted pulse at a sampling interval is determined by the digit of the shift register. The distance multiplied by the number (the number of sampling data) corresponds to the measurement range. Therefore, if it is attempted to obtain the peak position more accurately by shortening the sampling interval, if the number of digits in the shift register is the same, the measurement range becomes short and a distant target cannot be detected. In addition, if the target is located outside the measurement range restricted by the number of digits in the shift register, even if the reflected signal of the transmitted pulse has sufficient intensity (SN ratio) for peak detection, The distance can not be identified, let alone the presence or absence of a target.

On the other hand, if the sampling interval is expanded, the measurement range multiplied by the number of digits of the shift register is extended, but if the sampling interval is expanded beyond the length of the transmission pulse, the amplitudes of a plurality of phase positions are interpolated. It becomes difficult to obtain the peak position. Even if it is less than the length of the sending pulse,
The increase of the sampling interval impairs the detection accuracy of the peak position by the interpolation processing.

Here, if the number of digits of the shift register is increased,
It is possible to maintain the measurement range and shorten the sampling interval, or to extend the measurement range without impairing the accuracy of peak position detection by interpolation processing, but it is necessary to remake the extraction circuit that performs sampling and addition as a whole. Further, when the number of digits of the shift register is increased, the individual processing time including the data accumulation in the shift register is gradually increased, and the number of additions of sampling data that can be repeated within a fixed time is decreased. Then, when the number of additions decreases, JP-A-7-7
As described in Japanese Patent No. 2237, the cancellation of the noise component is incomplete, and the detection accuracy of the peak position of the reflected signal deteriorates. However, if the number of additions is maintained while the processing time is extended, the time required for one distance measurement is extended, resulting in impairing the followability of the distance measurement value with respect to a change in the target position visually. .

By the way, in a vehicle radar device in which sampling by a shift register is started at the same time as the transmission of the transmission pulse, the time from the trigger until the transmission pulse is output, the time until the transmission pulse is received and becomes a reception signal, Also, there is a problem that several bits of data on the head side of the shift register are wasted due to the time taken until the received signal is sampled and accumulated in the shift register.

For example, the time required for sampling may reach several tens of nanoseconds because it includes the inversion time of the outputs of some switching elements. If this time corresponds to two sampling intervals, The amplitude of the reflection signal due to the target existing at a distance of 0 m ahead appears in the third and subsequent bits from the beginning of the shift register. As a result, the remaining number of bits excluding the first two bits of the shift register becomes the distance measurement range, and the measurement range becomes shorter than when the total number of bits of the shift register is effectively used.

The present invention provides a radar apparatus which can effectively utilize the total number of bits of a shift register as a measurement range and which does not impair the detection accuracy of a peak position even if the measurement range is expanded without increasing the number of digits of the shift register. It is intended to be provided.

[0011]

According to a first aspect of the present invention, there is provided a pulse signal transmitting means for continuously transmitting a transmission pulse to a space at an interval, and a reflection signal from a target of the transmission pulse is detected and received. Reflected pulse signal receiving means for forming a signal, the reception signal is detected at a plurality of phase positions synchronized with the transmission pulse, and addition or integration is performed over a plurality of transmission pulses at each phase position to obtain the plurality of In a radar device having extraction means for extracting the amplitude of the reflection signal at the phase position and determination means for calculating the peak position based on the amplitude of the extracted reflection signal, a plurality of the phase positions of the transmission pulse A first phase delaying means for moving the amplitude extraction range to a far side;
The adjustment means is provided.

According to a second aspect of the present invention, the extraction means in the configuration of the first aspect includes a shift register having a predetermined number of digits, which transfers sampling data by consecutive equally-spaced sampling pulses input for each of the sending pulses, The first adjusting means changes the number of inputs of the sampling pulse according to the calculated peak position and pushes out unnecessary sampling data from the shift register.

According to a third aspect of the present invention, a pulse signal transmitting means for continuously transmitting a transmission pulse to a space at intervals, and a reflection pulse for forming a reception signal by detecting a reflection signal of the transmission pulse by a target. The signal receiving means and the reception signal are detected at a plurality of phase positions synchronized with the transmission pulse, and addition or integration is performed over the plurality of transmission pulses at each phase position to obtain a reflection signal at the plurality of phase positions. In a radar device having an extracting means for extracting an amplitude and a determining means for calculating a peak position of the reflected signal on the basis of the amplitude of the reflected signal, mutual detection of the plurality of phase positions when the target is detected. Second adjusting means is provided for shortening the interval to improve the detection accuracy of the peak position.

In a fourth aspect of the present invention, the extraction means in the third aspect includes a shift register having a predetermined number of digits for transferring the sampling data by the sampling pulses which are input at every transmission pulse and which are consecutively spaced at equal intervals. The second adjusting means increases the sampling frequency and at the same time,
The sampling pulse is increased by the number corresponding to the calculated peak position, and the amplitude extraction range is guided toward the peak position.

According to a fifth aspect of the present invention, the second adjusting means in the configuration of the third or fourth aspect lengthens the mutual interval between the plurality of phase positions when the target is not detected to extract the amplitude. Is to be expanded.

[0016]

According to the radar apparatus of the present invention, the noise component is canceled by detecting the amplitude of the received signal at a plurality of phase positions synchronized with the transmission pulse and performing addition or integration on a large number of continuous transmission pulses. To extract the amplitude of the reflected signal. Therefore, the head of the plurality of phase positions is the closest measurement limit at which the amplitude of the reflected signal can be detected to obtain the peak position, and the end of the plurality of phase positions is the farthest measurement limit. The first adjusting means shifts this measurement range to the far side by increasing the phase delay (time) from the transmission pulse to the start of a plurality of phase positions.

According to another aspect of the radar apparatus of the present invention, a binary signal of a predetermined number of digits extracted from the received signal by using a shift register is independently added at each digit, thereby canceling noise components and amplitude of the reflected signal. To extract. Of the binary signals of a predetermined number of digits that are stored in the shift register in correspondence with one transmission pulse, the first digit is the farthest end of the measurement range, and the last digit is the closest end. A sampling pulse exceeding the number of digits of the shift register pushes out the binary signal of the last digit for each one and adds a new binary signal to the first digit.

In the radar device of the third aspect, when the target is detected in the measurement range, the received signal is detected again at the finer phase position and the peak position is specified with higher accuracy.

According to another aspect of the radar apparatus of the present invention, when the measurement range of the binary signal of the predetermined digit number accumulated in the shift register becomes shorter as the frequency of the sampling pulse increases,
The second adjusting means adjusts the number of sampling pulses to shift the measurement range to the far side so that the peak position does not deviate from the measurement range.

In the radar device according to the fifth aspect, when the target is not detected in the measurement range, the received signal is detected up to continuous and distant positions with coarser intervals, and the presence or absence of the target is confirmed.

[0021]

BEST MODE FOR CARRYING OUT THE INVENTION A vehicle radar apparatus according to a first embodiment will be described with reference to FIGS. FIG. 1 is an explanatory diagram of a configuration of a vehicle radar device, FIG. 2 is a time chart of processing a received signal, and FIG. 3 is a time chart of control of a sampling pulse.

As shown in FIG. 1, the pulse signal transmitting section 11
Keeps sending laser light sending pulses to the space in front of the vehicle at intervals of 4 μs. The reflected pulse signal receiving unit 12 receives a reflected signal of a sending pulse from a preceding vehicle or the like and forms a received signal. The reflected pulse signal receiving unit 12 amplifies the received signal with a predetermined amplification gain to remove amplitude components above a certain level, and is further binarized through a comparator process and input to the sampling circuit 14. The binarized received signal is subjected to signal processing through the sampling circuit 14 and the addition circuit 15 to cancel the noise component, and the signal component corresponding to the reflected signal is extracted.

The judgment circuit 16 is composed of a microcomputer circuit, takes in a signal component corresponding to the reflection signal at a timing of every 100 msec, judges the presence or absence of the target, and calculates the distance to the target. The control circuit 13 includes the pulse signal transmission unit 1
1 is controlled by a trigger to generate a transmission pulse at a predetermined timing. Further, various synchronization signals are formed to synchronize a series of signal processings through the sampling circuit 15, the addition circuit 16 and the determination circuit 17 with the transmission timing of the transmission pulse.

The details of the pulse signal sending section 11, the reflected pulse signal receiving section 12, the sampling circuit 15, the adding means 16, the judging circuit 17, and the control circuit 13 are described in JP-A-7-0.
The circuit is basically similar to that of the circuit disclosed in Japanese Patent No. 72237, and similar control and signal processing are executed. As shown in FIG. 2B, the received signal is a noise component RN caused by thermal noise of the light receiving element of the reflected pulse signal receiving unit 12 or the like.
including. Also, at the phase position corresponding to the distance to the target,
It has a component (hereinafter referred to as a reflection signal HS) corresponding to the reflected light of the transmitted pulse reflected by the target.

The sampling circuit 14 is driven by a sampling pulse input from the control circuit 13 1
It has a 6-bit shift register. The received signal binarized by the reflected pulse signal receiving unit 12 is sampled by the flip-flop A1 every time the sampling pulse is input to the shift register, and the flip-flops A2-1
6 are transferred in order. As shown in FIGS. 2A and 2C, the control circuit 13 generates the first sampling pulse at the same time as the trigger of the transmission pulse. Since the shift register of the sampling circuit 14 has 16 digits, 16
Flip-flop A by the sampling pulse
When 1 finishes sampling, the first sampled data is transferred to the 16th flip-flop A16.

The adder circuit 16 adds the 16-bit sampling data formed by the sampling circuit 15 N times (several hundreds to thousands) to form 16 sampling addition values. Since the probability of appearance of 1 and 0 in the noise component is 50%, the sampling addition value at the phase position where no reflection signal exists is uniformly N / 2. (D) of FIG.
As shown in, when the noise component of each sampling data is canceled, a reflected signal which is a reliable bias component emerges, and amplitude data of the reflected signal at 16 phase positions is extracted.

The determination circuit 17 reads the sampling addition output from the addition circuit 16 every 100 msec and outputs N / 2.
Deduct. Then, as shown in FIG. 2 (e), four consecutive sampling addition values including the maximum value and the second one are extracted, and two sampling addition outputs are connected by a straight line to obtain an intersection point. . By this interpolation processing, peak detection is performed, and 1/2 of the phase difference (time TD) between the rising edge of the transmission pulse and the peak position is multiplied by the speed of light to obtain the distance to the target. The mutual interval between consecutive sampling pulses corresponds to a distance of 10 m depending on the speed of light, but the distance to the target is specified in units of 1 m through interpolation processing.
When the sampling addition value is read by the determination circuit 17, the sampling addition value of the addition circuit 16 is reset, and N times of additions for the next 100 msec are restarted from 0.

By the way, as shown in FIG. 3C, when the control circuit 13 outputs 16 sampling pulses for each transmission pulse, the first sampling pulse to the 16th sampling pulse are output. Sampling addition values are obtained for the 16 phase positions up to.

However, as a result of the experiment with the target at the distance Om,
As shown in (b) of FIG. 3, the reflection signal HS0 from the target at the distance Om rises first at the third sampling pulse, and its peak position is between the fourth and fifth sampling pulses. It was found that the output pulse was delayed by the time Toff from the rising edge of the pulse. Therefore, of the 16 sampling added values, the first to fourth values do not correspond to the distance measurement range, and only 120 m corresponding to the remaining 12 sampling pulses can be secured as the distance measurement range. That is, the received signal is formed from the received reflected signal,
The process of binarizing the received signal, reading it into the flip-flop A1 and transferring it is delayed by two sampling pulses. Then, the sampling added values corresponding to the third and fourth sampling pulses are positioned before the peak of the reflection signal HS0 (for interpolation processing for obtaining the peak position together with the fifth and sixth sampling added values). Used), it is outside the range of distance measurement.

Therefore, in the first embodiment, as shown in FIG. 3D, the number of sampling pulses input from the control circuit 13 to the sampling circuit 14 for each transmission pulse is increased by 4 to 20. Thus, the data corresponding to the first to the fourth sampling pulses is pushed out from the 16-bit shift register so that all the 16-bit digits are within the distance measuring range.

When the 17th sampling pulse is input to the sampling circuit 14, the binary signal taken in by the first sampling pulse is lost from the flip-flop A16, and 10 times more than the 16th sampling pulse.
The received signal corresponding to m away is fetched by the flip-flop A1. In the eighteenth sampling pulse, the binary signal captured by the second sampling pulse is lost from the flip-flop A16, and the reception signal corresponding to a distance of 20 m farther than the sixteenth sampling pulse is captured by the flip-flop A1. Be done. In this manner, four binary signals located outside the distance measuring range are discarded to newly secure four sampling data, and when the 16 sampling pulses are used, the distance measuring range of 120 m is 40 m. It has been expanded to a distance of 160 m.

However, when the target is detected within 40 m, the determination circuit 16 outputs 20 from the control circuit 13.
As shown in FIG.
The sampling addition values corresponding to the third and fourth sampling pulses shown in (3) are restored and the peak can be detected by the interpolation processing shown in FIG. When the number of sampling pulses output from the control circuit 13 is reduced to 16, the determination circuit 16 performs correction to reduce the peak position calculated from the sampling addition output of the addition circuit 15 by a distance of 40 m corresponding to four sampling pulses. , Ensure the continuity of the displayed and output distance.

Further, when the target is not detected within 100 m, the determination circuit 16 sets the sampling pulse number to 20.
Alternate between 25 and 25 pieces. When the number of sampling pulses is increased to 25, as shown in (e) of FIG. 3, the distance measurement range in the case of 20 is shifted to 50 m away as a whole, and the target up to 210 m can be detected. When the number of sampling pulses is returned to 20, when the number of sampling pulses is 25, the nearest range from 0 to 50 m, which deviates from the distance measurement range, is included in the distance measurement range. When the number of sampling pulses is increased to 25, five more binary signals are discarded through the flip-flop A16 of the sampling circuit 14 than in the case of 20 and five sampling pulses are stored in the flip-flops A1 to A5 ( A binary signal in the range of 0 to 50 m) is secured. When the number of sampling pulses output from the control circuit 13 is increased to 25, the determination circuit 16 adds the peak position calculated from the sampling addition output of the addition circuit 15 by a distance of 50 m corresponding to five sampling pulses. , Correct the displayed distance. Note that the sampling addition outputs corresponding to the 15th digit and the 16th digit of the shift register can be connected to perform interpolation processing between the sampling addition outputs corresponding to the 14th digit and the 15th digit. ), There are 16, 20, or 2 sampling pulses, as shown as reflected signals HS1, HS2, HS3 in FIG.
In any of the cases where the number is 5, the final distance detection range is shorter than the above-mentioned numerical value by 2 units by 20 m.

FIG. 4 is a flow chart of a series of processes in the vehicle radar system of the first embodiment. Step 1
In 11, the transmission pulse is output from the pulse signal transmission unit 11 triggered by the control circuit 13. In step 112, the reflected pulse signal receiver 12 forms a received signal. In step 113, the sampling circuit 14 samples the received signal. In step 114, the addition circuit 15 adds the sampling data N times. In step 115, the determination circuit 1
According to 6, the distance to the target is calculated based on the sampling addition value.

At step 116, it is identified whether or not the target is detected. If the target is detected, step 1
Proceed to 17 and the distance to the target is two thresholds (40
m and 100 m). On the other hand, if the target is not detected, the process proceeds to step 120. Distance to target is 4
If it is 0 m or less, the process proceeds to step 118 and the control circuit 1
The number of sampling pulses output from 3 is reduced from 20 to 16. Distance from target is 40m to 1
If it is in the range of 00 m, the process proceeds to step 120 and the number of sampling pulses is maintained at 20. If the distance to the target is 100 m or more, proceed to step 119,
The number of sampling pulses is increased from 20 to 25. After steps 118, 119, and 120, the process returns to step 111 and moves to the next cycle. In the flow shown in FIG. 4, step 111 is the pulse signal transmitting means of the present invention,
Step 112 is the reflected pulse signal receiving means of the present invention, steps 113 and 114 are the extraction means of the present invention, step 1
Reference numeral 15 corresponds to the determining means of the present invention, and steps 116 to 120 correspond to the first adjusting means of the present invention.

According to the vehicle radar device of the first embodiment,
Since the number of sampling pulses is increased by four to 20, the binary signal that is out of the distance measurement range due to the output inversion of the switch element or the interpolation process is discarded from the shift register, and the four phase positions in the far distance are discarded. Binary signals are newly available. Therefore, 16 digits of the shift register can be utilized more effectively than when 16 sampling pulses are used, and the substantial distance measurement range is expanded by 40 m.
Further, when the target object approaches within 40 m, the number of sampling pulses is reduced to 16 so that the normal interpolation processing can be performed even for the target object at the immediately preceding position. There is no. Also, the target is 100m
If it does not exist, the number of sampling pulses is set to 2
Since it is possible to measure the distance even with a distant target by increasing the number to five, the range in which the distance can be measured as a whole of the device is substantially expanded to the range of 0 to 210 m.

More specifically, as shown in FIG. 3B, in the case of 16 sampling pulses, the reflection signal HS1 corresponding to the phase difference TB from the transmission pulse is the limit of peak detection. On the other hand, in the case of 20 pieces, the reflection signal HS2 corresponding to the phase difference TC and in the case of 25 pieces, the reflection signal HS3 corresponding to the phase difference TD is the peak detectable range. Further, as for the pulse signal transmitting unit 11, the reflected pulse signal receiving unit 12, the sampling circuit 14, and the adding circuit 15, the circuit in the case of using 16 sampling pulses can be diverted as it is, and the control circuit 13
Since it can be implemented by only adding a small amount of circuits in and a small amount of programs in the determination circuit 16, it is possible to provide a small and lightweight radar device with high reliability at low cost.

In the first embodiment, the number of sampling pulses is increased from 16 to 20, and from 20 to 25, and the distance measuring range is shifted to the far side. As in the example, the control circuit 1 controls 16 sampling pulses by delaying from the trigger of the transmission pulse by the time corresponding to 4 and 5 sampling pulses, respectively.
It is also possible to adopt a configuration in which the signal is input to the sampling circuit 14 from 3.

FIG. 5 is an explanatory diagram of the configuration of the vehicle radar device of the second embodiment, FIG. 6 is an explanatory diagram of peak detection processing, and FIG. 7 is a flowchart of processing of received signals. In the second embodiment, when the target is detected at a position close to the host vehicle, the frequency of the sampling pulse input to the sampling circuit 14 is increased to improve the accuracy of peak detection.

As shown in FIG. 5, in the second embodiment, as shown in FIG.
The pulse sending section 11, the reflected pulse signal receiving section 12, the sampling circuit 14, and the adding circuit 15 of the first embodiment shown in FIG.
Is used as is. The control circuit 21 trigger-controls the pulse signal transmission unit 11 to control the generation timing of the transmission pulse. The control circuit 21 forms various synchronization signals including the sampling pulse input to the sampling circuit 14. As a result, the sampling circuit 14,
Each stage of processing the received signal in the adder circuit 15 and the determination circuit 22 is synchronized with the transmitted pulse. The determination circuit 22 is composed of a microcomputer circuit and reads the sampling addition output from the addition circuit 15 every 100 msec to detect peaks.

As shown in (e) and (h) of FIG. 6, the decision circuit 22 uses the four sampling addition values located before and after the peak of the reflected signal to perform the same interpolation processing as in the first embodiment. Then, the peak position of the reflected signal shown in (b) of FIG. 6 that appears in the received signal corresponding to the transmitted pulse shown in (a) of FIG. 6 is calculated. Then, when the target is not detected in the distance measurement range, the sampling frequency is lowered to extend the length of the distance measurement range so that the target can be detected farther than in the case of the normal sampling frequency.

Further, the target is 3/8 (60) of the distance measuring range.
m), and the peak is calculated with up to the 8th sampling addition value (for example, the straight line connecting the 7th and 8th sampling addition values is the 6th and 5th sampling lines). In the case of interpolating the peak position between the added values), as shown in (f) of FIG. 6, in the process of obtaining the next sampling added value, the frequency of the sampling pulse output from the control circuit 21 is doubled as usual. Value of. As a result, in the normal state, as shown in (d) of FIG. 6, the sampling added value obtained every 10 m corresponding to 16 sampling pulses becomes 5 m every 5 m as shown in (g) of FIG. As a result, as shown in FIG. 6H, the accuracy of the peak position obtained through the interpolation process using the continuous four sampling addition values increases.

During the processing of the second embodiment shown in FIG. 7, the processing of steps 111 to 116 is performed by the processing of steps 111 to 116 shown in FIG.
Since each processing is the same as that of 116, detailed description thereof will be omitted. In step 116, the determination circuit 22 identifies whether or not the target is detected in the distance measurement range.
If no target is detected, the process proceeds to step 124, where the frequency of the sampling pulses is lowered and the mutual interval of the sampling pulses is expanded to the length of the output pulse. As a result, the length of the distance measurement range is expanded, and the target can be detected at a position far away from the normal frequency. If the target is detected, the process proceeds to step 121.

In step 121, the distance to the target obtained in step 115 is compared with the threshold value of 60 m.
If the distance to the target is 60 m or less, step 122
Then, a value twice the normal value is selected as the frequency of the sampling pulse in the next N times of addition processing. If it exceeds 60 m, if the sampling frequency is doubled to the normal value, it becomes impossible to capture the peak position in the distance measurement range, so the process proceeds to step 123, and the frequency of the sampling pulse in the next N times of addition processing is the normal value. Maintained at.
In the flow shown in FIG. 7, steps 116, 124,
And steps 121, 122 and 123 correspond to the second adjusting means of the invention.

According to the vehicle radar device of the second embodiment,
When a target is present near the host vehicle, the sampling pulse frequency is increased to improve the accuracy of distance measurement, so highly important information such as the increase or decrease in the distance between the target and the host vehicle can be obtained without error. To be Also, if a target exists near the vehicle, the distance measurement range is practically limited to half to prevent detection of a distant target. The situation that is measured by Furthermore, when the target is not detected within the distance measurement range by the sampling pulse of the normal frequency, the sampling frequency is lowered to enable detection of the target further away, so that the reflection signal from the target is detected sufficiently. Even though the level is possible (SN ratio), the situation that the range is out of the range due to the restriction on the number of digits of the shift register is avoided, and the amount of information obtained from the radar device is increased.

FIG. 8 is an explanatory view of the construction of the vehicle radar system of the third embodiment, and FIG. 9 is a flow chart of the processing of the received signal. In the third embodiment, when the target exists on the far side of the distance measurement range, the frequency measurement is switched to a high frequency to improve the measurement accuracy of the distance to the target and at the same time increase the number of sampling pulses to increase the distance measurement range. Shift to the position.

As shown in FIG. 8, in the third embodiment, as shown in FIG.
The pulse sending section 11, the reflected pulse signal receiving section 12, the sampling circuit 14, and the adding circuit 15 of the first embodiment shown in FIG.
Is used as is. The control circuit 23 triggers the pulse signal transmission unit 11 to control the generation timing of the transmission pulse. The control circuit 23 forms various kinds of synchronization signals including sampling pulses, and the sampling circuit 1
4, the processing of each stage of the adder circuit 15 and the determination circuit 24 is synchronized with the transmission pulse. The determination circuit 24 is composed of a microcomputer circuit, periodically reads the sampling addition output from the addition circuit 15, and performs peak detection by the same interpolation processing as in the first and second embodiments.

The determination circuit 24 outputs a sampling pulse having a normal frequency from the control circuit 23 to detect the target in the distance measurement range of the 16-digit shift register of the sampling circuit 14. When the target is detected through the process using the sampling pulse of the normal frequency, the determination circuit 24 controls the control circuit 23 in the process of performing the next N additions.
The frequency of the sampling pulse output from
The number of sampling pulses for each output pulse is changed according to the distance to the target, and the distance measurement range is adjusted so as to cover the position of the target.

For example, in the time chart shown in FIG. 6, when the peak of the reflected signal is detected at the 12th to 16th phase positions of the sampling pulse of the normal frequency, the sampling pulse is switched when the sampling frequency is doubled. The distance becomes 1/2 and the entire distance measurement range becomes 1/2, so that the peak of the reflected signal is outside the distance measurement range. However, at this time, the determination circuit 24 determines that the control circuit 2
The number of sampling pulses output for each transmission pulse from 3 is increased from 16 to 32, and 16 binary signals are pushed out from the 16-bit shift register of the sampling circuit 14 and discarded. As a result, the distance measurement range is shifted to the far side as described in the first embodiment, and the shift register can secure the sampling values before and after the peak of the reflected signal. That is, the amplitudes of the received signals at the 17th to 32nd sampling pulse phase positions are accumulated in the shift register, and sampling addition values corresponding to the amplitudes of the reflected signals are formed at these phase positions.

The decision circuit 24 reads the 16 sampling addition values and obtains the peak position by the same interpolation processing as in the first embodiment. Then, the shift amount of the distance measurement range corresponding to the 16 binary signals pushed out from the shift register is corrected to calculate the distance to the target.

During the processing of the third embodiment shown in FIG. 9, the processing of steps 111 to 116 is the same as the processing of steps 111 to 116 shown in FIG.
Since each processing is the same as that of 116, detailed description thereof will be omitted. If the target is not detected in step 116, the series of flows is terminated and the sampling frequency is not changed. When the target is detected, both the sampling frequency and the number of sampling pulses are adjusted through the processing of step 126 and subsequent steps. In step 126, the distance to the target obtained in step 115 is compared with two threshold values. The distance to the target is 3 of the normal distance measurement range.
If it is / 8 or less, the same operation as in the second embodiment is performed, and the process proceeds from step 127 to step 128. Control circuit 23
The frequency of the sampling pulse output from is doubled, while the number of sampling pulses is maintained at 16.

The distance to the target is 3 in the normal distance measurement range.
If the range is from / 8 to 6/8, the process proceeds from step 131 to step 132, the frequency of the sampling pulse output from the control circuit 23 is doubled, and at the same time, the number of sampling pulses is increased by 8 to 24. It is said that If the distance to the target exceeds 6/8 of the normal distance measurement range, the process proceeds from step 129 to step 130, the frequency of the sampling pulse output from the control circuit 23 is doubled, and at the same time, the sampling pulse 16 pieces are added to make 32 pieces. In the flow shown in FIG. 9, steps 126 to 132 correspond to the second adjusting means of the invention.

According to the vehicle radar device of the third embodiment,
After the target is detected, the frequency of the sampling pulse is increased and the number of sampling pulses is increased according to the distance to the target.Therefore, where the target is located in the normal distance measurement range. Also, the distance to the target can be accurately calculated by using the sampling addition value in fine increments.

FIG. 10 is an explanatory view of the structure of the vehicle radar device of the fourth embodiment, and FIG. 11 is a time chart of the processing of the received signal. In the fourth embodiment, the integrating circuit 27 shown in FIG.
The noise component is canceled by the A / D conversion circuit 28 and the reflected signal is extracted. As disclosed in Japanese Patent Laid-Open No. 7-072237, digital signal processing for adding binarized sampling data a number of times is performed by analog signal processing using a plurality of integration circuits (mean value of noise at a plurality of phase positions). Can be replaced with an integration process with the origin as. Then, in the fourth embodiment, by adjusting the timing at which the switch elements G1 to G16 of the integrating circuit 27 are first closed, the distance in which 16 pieces of amplitude information of the received signal are effectively used is adjusted as in the first embodiment. Measurement is made.

As shown in FIG. 10, the reflected pulse signal receiving section 12B forms a received signal by detecting the reflected signal from the target of the transmitted pulse. The received signal containing the noise component is
It is input to the integrating circuit 27 and integrated over a large number of output pulses. In the 16 integrating circuits included in the integrating circuit 27, as shown in FIG. 11, the switch elements G1 to G16 are closed at different timings when 16 pieces have the same length. As a result, the received signals at the same phase position of a large number of transmitted pulses are input to the resistors R1 to 16 in the capacitors C1 to C16.
Through the battery.

As shown in FIG. 11, it is assumed that the reflected signal HS continues to exist in the closed phase range of the switch elements G5 to G8. At this time, the capacitors C5 to C8 are charged and discharged in excess of the average voltage NL of the noise component for each output pulse by the reflected signal which is a reliable bias component, and a steady state in which the charge and discharge are balanced through a number of output pulses. The integrated output (amplitude information of the reflected signal) corresponding to the sampling addition value in the first embodiment is held. For example, the integrated output of the capacitor C7 is held at the average voltage of the reflected signal at the phase position where the switch element G7 is closed. The integrated outputs of the capacitors C1 to C4 and C9 to C16 are held at the average voltage NL of the noise component by canceling the unevenness of the noise component. When the target approaches and the reflected signal HS moves to the left, the integrated output of the capacitor C4 increases and the integrated output of the capacitor C8 decreases.

The AD conversion circuit 28 reads 16 integrated outputs (analog voltage) from the capacitors C1 to C16 at intervals of several tens of milliseconds and converts them into digital values. The determination circuit 29 replaces the sampling addition value of the first embodiment with the digitally converted integrated output to perform interpolation processing, obtains the peak position of the reflected signal, and calculates the distance to the target.

Even when the received signals are added by the integrating circuit without using the shift register, the reflected signal of the target object located at 0 m is at a phase position considerably delayed from the output pulse due to signal delay on the circuit. It is detected for the first time. Therefore, the determination circuit 29 delays the phase position at which the switch element G1 is closed by the time Toff from the rise of the output pulse,
The peaks can be detected by effectively using the integrated outputs of all the capacitors C1 to C16.

According to the vehicle radar system of the fourth embodiment,
Since the phase position at which the switch element G1 is closed is delayed by Toff from the rising edge of the transmission pulse, it is possible to avoid the situation where the integrated outputs of the capacitors C1, C2, etc. are wasted due to the signal delay on the circuit, etc. It is possible to obtain the distance to the target in a wide range of distance measurement that uses the circuit without waste. In addition, in the fourth embodiment, the distance measuring range by the 16 integrating circuits is shifted to the far side by the time Toff. However, the distance measuring range is shifted by a longer predetermined time and the normal distance measuring range is maintained. A target farther than the distance measurement range may be detected. Also,
Since the phase difference in which the adjacent switch elements (G1, G2, etc.) are closed corresponds to the mutual interval of the sampling pulses in the first embodiment, the phase difference in which the adjacent switch elements are closed is shortened to make a finer step than usual. The peak position may be obtained with, and the phase difference at which the adjacent switch elements are closed may be lengthened to detect the target in a distance measurement range longer than usual.

Although the vehicle radar device using the pulse of the laser light has been described through the above embodiments, ultrasonic waves, radio waves,
The present invention can also be implemented in a vehicle radar device using a pulse of infrared rays or the like, or a radar device for other purposes such as a ship.

[0061]

According to the first aspect of the present invention, since the phase relationship of a plurality of phase positions with respect to the transmission pulse is delayed to shift the detection range of the reflected signal to the far side, the number of data handled by the extraction means is increased, A distant target outside the normal detection range can be detected without lowering the detection accuracy of the peak position. Also, by delaying the phase relationship of a plurality of phase positions with respect to the transmitted pulse, it is possible to eliminate the amplitude information of the reflected signal that is outside the detection range due to the delay on the circuit or the interpolation processing, so the number of digits in the shift register and the integration A predetermined number of pieces of amplitude information limited by the number of circuits can be effectively used, and the distance to the target can be measured in a wider detection range than when not delayed.

According to the second aspect of the present invention, the number of sampling pulses is increased and the detection range of the received signal by the shift register is shifted to the far side. Therefore, it is not necessary to change the shift register or the sampling data adding circuit. Therefore, it is possible to measure the distance to a distant target without significantly changing the circuit configuration or increasing the signal processing time.

According to the third aspect of the present invention, the mutual interval of the plurality of phase positions is shortened to obtain the amplitude information of the reflected signal in fine steps. Therefore, the peak position is accurately specified and the distance to the target is accurately determined. Can be calculated to

According to the fourth aspect of the present invention, since the detection range shortened by increasing the frequency of the sampling pulse is guided to the peak position, no matter where the target is located in the normal detection range, it is more than normal. Can accurately calculate the distance to the target.

According to the fifth aspect of the invention, when the target does not exist in the normal detection range, the mutual detection interval of the plurality of phase positions is lengthened to extend the detection range. The target can be detected up to the position.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a configuration of a vehicle radar device according to a first embodiment.

FIG. 2 is a time chart of processing a received signal.

FIG. 3 is a time chart of control of sampling pulses.

FIG. 4 is a flowchart of a process in the first embodiment.

FIG. 5 is an explanatory diagram of a configuration of a vehicle radar device according to a second embodiment.

FIG. 6 is a time chart of processing a received signal.

FIG. 7 is a flowchart of a process in a second embodiment.

FIG. 8 is an explanatory diagram of a configuration of a vehicle radar device according to a third embodiment.

FIG. 9 is a flowchart of a process in a third embodiment.

FIG. 10 is an explanatory diagram of a configuration of a vehicle radar device according to a fourth embodiment.

FIG. 11 is a time chart of processing a received signal.

[Explanation of symbols]

 11 pulse signal sending part 12, 12B reflected pulse receiving part 13, 21, 23, 26 control circuit 14 sampling circuit 15 adder circuit 16, 22, 24, 29 determination circuit 27 integration circuit 28 A / D conversion circuit

Claims (5)

[Claims] 1. A pulse signal transmitting means for continuously transmitting a transmission pulse to a space at intervals, and a reflection pulse signal receiving means for detecting a reflection signal of the transmission pulse by a target and forming a reception signal, Extraction that detects the reception signal at a plurality of phase positions synchronized with the transmission pulse, performs addition or integration over a plurality of transmission pulses at each phase position, and extracts the amplitude of the reflected signal at the plurality of phase positions In the radar device having means and a determination means for calculating the peak position of the reflected signal based on the amplitude of the reflected signal, the extraction range of the amplitude is delayed by delaying the phase relationship of the plurality of phase positions with respect to the transmitted pulse. A radar device comprising a first adjusting means for moving to a distant side. 2. The extracting means includes a shift register having a predetermined number of digits for transferring the sampling data by continuous sampling pulses of equal intervals input for each of the sending pulses, and the first adjusting means calculates the calculated 2. The radar device according to claim 1, wherein the number of sampling pulses is changed according to the peak position to push unnecessary sampling data out of the shift register. 3. A pulse signal transmitting means for continuously transmitting a transmission pulse to a space at intervals, and a reflection pulse signal receiving means for detecting a reflection signal of the transmission pulse by a target and forming a reception signal, Extraction that detects the reception signal at a plurality of phase positions synchronized with the transmission pulse, performs addition or integration over a plurality of transmission pulses at each phase position, and extracts the amplitude of the reflected signal at the plurality of phase positions In the radar device having a means and a determination means for calculating a peak position of the reflected signal based on the amplitude of the reflected signal, shortening the mutual interval of the plurality of phase positions when the target is detected. A radar device comprising a second adjusting means for improving the detection accuracy of the peak position. 4. The extracting means includes a shift register having a predetermined number of digits for transferring sampling data by successive sampling pulses at equal intervals input for each of the sending pulses, and the second adjusting means increases the sampling frequency. At the same time, the sampling pulse is increased by the number corresponding to the calculated peak position, and the extraction range of the amplitude is guided toward the peak position. 5. The second adjusting means enlarges the extraction range of the amplitude by lengthening the mutual interval of the plurality of phase positions when the target is not detected.
Alternatively, the radar device according to item 4.