JPH09214883A - Video cd reproducing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To display moving images recorded in a video CD as a digest picture easy to watch. SOLUTION: A CD decoder/servo control circuit 3, a 1st CPU 6 and an MPEG /photo CD decoder 9 successively reproduce and reduce I pictures recorded in the video CD and when displaying the next I picture after the prescribed number of I pictures are displayed, the I pictures in other areas are erased. Besides, the I pictures recorded in the video CD are reproduced while jumping, reduced corresponding to the number of I pictures to be displayed, and written in a buffer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video CD (compact disc) on which digital moving image signals and the like are recorded.
The present invention relates to a video CD playback device for playing back.

[0002]

2. Description of the Related Art A PBC (playback control) menu image is usually recorded on a video CD on which a digital moving image signal or the like is recorded. Since this information is composed of character information that briefly describes the contents of videos, etc.,
The user can look at the reproduced image and find a desired moving image or the like. By the way, on this menu screen,
Since it is not possible to play back and display the actual moving images that are compressed and recorded as they are, the actual moving images and the like are sequentially played back and the digest screen reduced according to the display number is displayed as shown in FIG. If you can do it, it will be easier for the user to check the content of the video,
It is convenient.

As a conventional example of displaying a digest screen, there is known one applied to a digital still camera as disclosed in, for example, Japanese Patent Laid-Open Nos. 7-236109 and 7-236110. . FIG.
Indicates the former method, and when the release button is turned on (step S101), it is determined whether normal shooting or continuous shooting is performed (step S102). Then, in the case of normal shooting, one frame control is performed (step S103), and recording is performed in the buffer memory (steps S104 and S105). Also,
In the case of continuous shooting, the number of continuous shooting frames n'is determined and n'frame control is performed (steps S106 and S107) and recorded in the buffer memory (steps S104 and S105).

[0004]

However, FIG.
As shown in Fig. 1, when the actual movie etc. is played back in sequence and the digest screen reduced according to the number of displayed images is displayed,
As shown in FIGS. 2 (d) and (e), since the plurality of images displayed on the screen are rewritten one after another, the context of the plurality of images becomes unclear for the user, and the content of the moving image can be confirmed on the contrary. There is a problem that it becomes difficult and inconvenient. Further, when a plurality of images are reproduced and displayed on one digest screen, there is a problem that normal reproduction takes time and a long waiting time. Further, as hardware for realizing these functions, there is desired hardware that can simplify a circuit configuration such as a memory and process a moving image at high speed to create a digest screen.

Further, Japanese Patent Laid-Open Nos. 7-236109 and 7-236110 are applied to a digital still camera to display a plurality of still images on a single screen as a digest, so that an intra-frame code like a video CD is displayed. It cannot be applied to a medium in which an I picture that is a coded image, a P picture that is an inter-frame coded image, and a B picture that is a bidirectional predictive coded image are recorded. That is, the P picture and the B picture cannot reproduce the image only with the frame.

In view of the above-mentioned conventional problems, it is an object of the present invention to provide a video CD reproducing apparatus capable of displaying a moving image recorded on a video CD on a digest screen which is easy to see. Another object of the present invention is to provide a video CD reproducing device capable of displaying a digest screen of a moving image recorded on a video CD in a short time.

[0007]

In order to achieve the above object, the present invention is directed to reproducing an I picture recorded on a video CD in order to reduce the size, displaying a predetermined number, and then displaying the next I picture. In addition, I pictures in other areas are erased. The present invention also relates to the I recorded on a video CD.
The picture is jumped and played back, and the picture is reduced according to the number of displayed pictures and written in the buffer. That is,
According to the invention, a predetermined number of I's reproduced from a video CD
A buffer for displaying a picture on the digest screen and an I picture recorded on a video CD are sequentially reproduced, reduced according to the display number, arranged and written in the buffer, and after writing the predetermined number. A video CD reproducing apparatus having a control means for erasing an I picture in another area when writing the next I picture is provided. Also,
According to a preferred embodiment of the present invention, the control means is characterized by overwriting the color data in order to erase the I picture.

Further, according to the present invention, a buffer for displaying a predetermined number of I pictures reproduced from the video CD on the digest screen and the I pictures recorded in the video CD are jumped and reproduced, and There is provided a video CD reproducing apparatus having control means for reducing and arranging in the buffer according to the number of displays and writing. Further, according to a preferred embodiment of the present invention, the I picture is jumped and reproduced after the elapse of the set time.

[0009]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a video CD reproducing apparatus according to the present invention, and FIG. 2 is an M of FIG.
A block diagram showing the PEG / Photo CD decoder in detail,
3 is an explanatory diagram showing a digest screen, FIG. 4 is an explanatory diagram showing a configuration of a frame buffer memory, FIG. 5 is an explanatory diagram showing transfer processing of an I picture on the frame buffer memory of FIG. 4, and FIG. 6 is a digest screen. 7 is a flowchart for explaining the filling process, FIG. 7 is a flowchart for explaining the I-picture decoding process, and FIG. 8 is a flowchart for explaining the digest screen display process.
FIG. 9 is an explanatory diagram showing an example of the digest screen.

The video CD reproducing apparatus shown in FIG. 1 is, for example, a dual-purpose machine capable of reproducing a CD dedicated to music. Video C
The information recorded on the disc D of the CD for music or music is read by the pickup 1, the signal is amplified by the RF amplifier 2, and then applied to the CD-decoder / servo control circuit 3. The CD-decoder / servo control circuit 3 causes the SP (spindle) / servo control circuit 11 to perform rotation control of the disk motor, focus control of the pickup 1, and the like, demodulates the EFM signal from the RF amplifier 2, Read subcode data.

The second CPU 4 uses the TOC (Ta
It has a memory for temporarily storing the data read out from the ble of content area in a predetermined table format, takes in the subcode data, and controls the CD-decoder / servo according to the input information from the input instruction section 5. The circuit 3 is controlled. The input instruction section 5 is, for example, a PLAY button, STOP button, FF button, RF
Button, DIGEST button, JUM
It has a P (jump) button and the like, and the display unit 20 displays an operation mode, a device abnormality, and the like. The audio signal processing circuit 15 converts the reproduced digital audio signal into an analog signal and performs de-emphasis processing. The above circuit is a circuit for reproducing a CD dedicated to music.

The circuit system shown within the one-dot chain line is a video CD additionally provided to the signal system of the music-only CD.
Signal system for the first CPU6, ROM7, DRA
M8, MPEG / photo CD decoder 9, video signal processing circuit (SSG) 10, NTSC / PAL encoder 2
3, crystal oscillators 21, 24, 25. First CP
The U6 controls the entire device by controlling the second CPU 4 and the MPEG / photo CD decoder 9, and in particular, when the DIGEST button of the input instructing section 5 is pressed, a digest command as described later is sent to the decoder 9. Output.

The MPEG / photo CD decoder 9 is an RO in which a program for controlling the entire apparatus is stored in advance.
An M7 and a DRAM 8 for storing a compressed signal for a video CD input from the CD-decoder / servo control circuit 3 via a 4-bit data bus b1 are provided, and the compressed signal is displayed in a normal one screen. It restores the necessary image data and expands the audio signal. The decoder 9 also uses the video C when displaying the digest screen as described later.
When the next I picture is displayed after a predetermined number of I pictures recorded in D are sequentially reproduced and displayed, a process for erasing the I picture in the other area is performed.

An 8-bit data bus b2 is provided between the MPEG / photo CD decoder 9 and the first CPU 6 for transmitting mode information and for obtaining status which is the processing status of the program in the decoder 9. , A 7-bit data bus b3 for transmitting / receiving data address information and transmitting a control signal for controlling the decoder 9, and a 1-bit data bus b4 for obtaining input information of a data string to be input to the decoder 9, It is connected via a 3-bit data bus b5 for audio status.

The video signal processing circuit 10 converts the digital audio signal demodulated by the decoder 9 into an analog signal, or converts the RGB signal, the luminance signal and the color difference signal into a composite signal, and then the NTSC / PAL encoder 2
3, and the NTSC / PAL encoder 23 converts this composite signal into an NTSC system or PAL system signal and outputs it to an external display. The crystal oscillator 21 generates a master clock for the decoder 9 to operate,
The crystal oscillator 24 generates a clock of 13.5 MHz or 27 MHz suitable for the processing of the video signal processing circuit 10,
The crystal unit 25 is a color subcarrier of 3.57945 MHz (NTSC) or 4.433 with respect to the encoder 23.
Generate 61875 MHz (PAL).

Next, referring to FIG. 2, MPEG / Photo C
The D decoder 9 will be described in detail. The decoder 9 has a RISC processor 31, a variable length code decoder (VLD) 32, and three interfaces 33 to 35. The RISC processor 31 not only controls the VLD 32 and the interfaces 33 to 35, but also MPEG
1-syntax decoding, 2-dimensional IDCT, inverse quantization, motion vector calculation, etc. are performed.

As the interfaces 33 to 35, the host bus interface 33 inputs the compressed data stream and sets the internal registers, and the video display processor 34 outputs the decoded image.
The DRAM controller 35 controls the DRAM 8 shown in FIG. The DRAM 8 has a maximum size of 1 Mbyte and is used as a rate buffer, a reference image memory, a display memory (buffers shown in FIGS. 4 and 5), and a RISC instruction memory. Interface with DRAM8 is 1
6 bits. Here, the processing amount of MPEG1 is 1/6 or less and the memory bandwidth is 1/4 or less as compared with MPEG2. The actual pixel rate is about 3.3MHz assuming a SIF (Source Input Format) screen, and most of the decoding process operates at 40MHz.
It can be performed by sequential processing using ISC.

When a digest screen is displayed in such a configuration, for example, as shown in FIG.
Vertically 2 = 6 reduced images are displayed on one screen. In this case, one screen is composed of 570 pixels × 306 lines, and three screens in the main scanning direction are the second to 177th pixels, respectively.
It is displayed in the 196th to 371st pixels and the 390th to 565th pixels. The two screens in the sub-scanning direction are the second to 121st (NTSC) or 145th (PAL) lines and the 160th to 279th (NTSC) or 303rd lines, respectively.
It is displayed on the (PAL) line.

The digest frame buffer provided in the DRAM 8 is composed of an I picture buffer and a digest picture buffer having a size as shown in FIG. 4, and both the I picture buffer and the digest picture buffer are luminance ( It is composed of a luminance signal) data area and a chrominance (color signal) data area. When the I picture is completely decoded in the I picture buffer, the data is 1
It is thinned to / 2, reduced to 1/4, and transferred to the digest picture buffer.

[0020]

[Table 1] The display processing of the digest screen will be described with reference to FIGS. 6 to 9. First, the first CPU 6 outputs the following digest command (A, B) to the decoder 9. “A” indicates image numbers “1” to “6”,
“B” indicates whether the images other than the image number “A” are erased (B = 1) or not erased (B = 0), and normally, the following six types of commands are output. (A, B) = (1,1) = (2,0) = (3,0) = (4,0) = (5,0) = (6,0)

When the processing shown in FIG. 6 is started and the digest command is accepted (step S1), it is determined whether or not the current digest mode is set (step S).
2). Then, in the case of YES, it is determined whether or not the digest command is the reduced screen deletion command (step S
3), in the case of YES, the process proceeds to step S6, while on the other hand, N
If it is O, the process proceeds to step S7.

If the digest mode is not set in step S2, the digest mode is set (step S4), and then the display buffer as shown in FIGS. 4 and 5 is set (step S5). Next, fill the background color of the digest screen (step S6),
Next, areas for reduced screens "1" to "6" are set on the display buffer as shown in FIGS. 4 and 5 (step S7), and then the "play" process shown in FIG. 7 is performed.
In the process of filling the background color in step S6, a different color can be set for each background, and “overwrite” may be used instead of “filling the background color”.

When the start code is detected in FIG. 7 (step S11), it is determined whether or not the start code is an I picture (step S12). If YES, the process proceeds to step S13 and thereafter, and if NO, on the other hand. Returns to step S11. Then, in step S13, the I picture is decoded on the I picture buffer shown in FIG. 4, and when the decoding of the I picture for one frame is completed (step S14), the data is reduced to 1/4 and It is transferred to the digest picture buffer shown in (step S15).

Then, as shown in FIG. 8, when the processing shown in FIGS. 6 and 7 is regarded as one unit and repetition of this unit is designated (steps S21 → S22),
The command is incremented and the process returns from step S23 to step S21. If the repeat is not designated in step S22, the digest screen display process ends. By this processing, when repetition is designated, as shown in FIGS. 9A to 9C,
The reduced screens "1" to "6" are displayed in sequence, and then when the six screens "1" to "6" are displayed, the next screen "1" is displayed.
Other screens "2" to "6" are deleted when is displayed. If repetition is not specified, for example, as shown in FIG. 9D, the digest command (2,
In the case of 1), only the reduced screen “2” is displayed, the background color is filled in other areas, and the process is stopped at this screen.

FIG. 10 shows a modification of the processing shown in FIG.
In this case, the I-picture jump time is further set from the first CPU 6 to the decoder 9. That is, when the process shown in FIGS. 6 and 7 is performed as one unit (step S41), first, it is determined whether or not the number of digest commands is “6” (step S42). If NO, the digest command is determined. The counter is incremented (step S43), and the process returns to step S41.

On the other hand, when the number of digest command commands is "6", that is, when all the reduced screens "1" to "6" are displayed, the counter is set (step S44), and then the advance command is issued. It is determined whether or not (step S45), and if YES, the command is set (step S46), and the process returns to step S41. On the other hand, if there is no advance command in step S45, the counter is decremented and the counter stands by (NOP operation) until it becomes "0" (step S4).
7 to S49), then the next command is set (step S46), and the process returns to step S41.

That is, as shown in FIG. 11, on the video CD, I frames I1, I2 ... Are recorded at predetermined intervals (every 0.5 seconds), and P frames or I frames are recorded between I frames I1, I2. Since the B frame X is recorded, by setting the above counter to "0.5 seconds", only the I pictures I1 and I2 can be accessed in a discrete manner for the digest display. Double reproduction (every 1 second) and triple reproduction (every 1.5 seconds) can be displayed by jump reproduction. Also, it is possible to jump in the opposite direction to reproduce and display.

[0028]

As described above, according to the present invention, the I picture recorded on the video CD is sequentially reproduced and reduced, and after displaying a predetermined number, another area is displayed when the next I picture is displayed. Since the I picture is deleted, it is possible to display a digest screen that is easy to see. Also, video C
Since the I picture recorded in D is jumped and reproduced, and the I picture is reduced and written in the buffer according to the number of displayed images, the reproduction time can be shortened and the digest screen can be displayed in a short time.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a video CD reproducing apparatus according to the present invention.

2 is a block diagram showing in detail the MPEG / Photo CD decoder of FIG. 1. FIG.

FIG. 3 is an explanatory diagram showing a digest screen.

FIG. 4 is an explanatory diagram showing a configuration of a frame buffer memory.

5 is an explanatory diagram showing a transfer process of an I picture on the frame buffer memory of FIG. 4. FIG.

FIG. 6 is a flow chart for explaining a digest screen filling process.

FIG. 7 is a flowchart illustrating an I-picture decoding process.

FIG. 8 is a flowchart for explaining a digest screen display process.

FIG. 9 is an explanatory diagram showing an example of a digest screen.

FIG. 10 is a flowchart for explaining a modification of the display process shown in FIG.

FIG. 11 is an explanatory diagram showing I frames recorded on a video CD.

FIG. 12 is an explanatory diagram showing an example of a conventional digest screen.

FIG. 13 is a flowchart for explaining a digest screen display process in a conventional digital still camera.

[Explanation of symbols]

3 CD-decoder / servo control circuit 5 input instruction section 6 first CPU 8 DRAM (buffer) 9 MPEG / photo CD decoder (CD-decoder /
The servo control circuit 3 and the first CPU 6 constitute a control means. ) D video CD

Claims (4)

[Claims] 1. A buffer for displaying a predetermined number of I pictures reproduced from a video CD on a digest screen, and I pictures recorded in the video CD are sequentially reproduced and reduced in accordance with the number of displayed pictures. A video CD reproducing apparatus having: a control unit that arranges and writes in the buffer, and erases an I picture in another area when writing the next I picture after writing the predetermined number. 2. The video CD reproducing apparatus according to claim 1, wherein the control means overwrites color data in order to erase the I picture. 3. A buffer for displaying a predetermined number of I pictures reproduced from a video CD on a digest screen, and an I picture recorded on the video CD is jumped and reproduced, and reduced according to the display number. And a control means for arranging and writing in the buffer. 4. The control means controls the I after a set time has elapsed.
The video CD reproducing apparatus according to claim 3, wherein the picture is jumped and reproduced.