JPH09200279A - Frequency error detector - Google Patents

Abstract

PROBLEM TO BE SOLVED: To expand a linear area in a section for detecting a frequency error and to quickly correct frequency by applying a delay element, a multiplier, an adder/subtractor, a divider and a reverse sine device to the in-phase compo nent and the quadrature component in an input signal. SOLUTION: The in-phase component of a received signal is inputted to a terminal and the quadrature component is inputted to a terminal 2. Outputs from respective terminals 1, 2 are delayed by respective delay elements 3, 4, the output of the terminal 1 and the output of the element 4 are mutually multiplied by a multiplier 5, the output of the terminal 2 and the output of the element 3 are mutually multiplied by a multiplier 6 and outputs from the multipliers 5, 6 are inputted to a subtractor 9. The output of the terminal 1 and the output of the element 3 are mutually multiplied by a multiplier 7, the output of the terminal 2 and the output of the element 4 are mutually multiplied by a multiplier 8 and these multiplied outputs are inputted to an adder 10. A divider 11 divides the output of the subtractor 9 by the output of the adder 10. The inverse tangent device 12 finds out the inverse tangent of an output from the divider 11 and the inverse tangent is outputted from a terminal 13. A frequency error is found out from the output of the terminal 13.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a means for detecting a frequency error of an electric signal, and relates to a frequency error detector capable of expanding a linear region and correcting a frequency at high speed. The frequency error detector of the present invention is a system that requires frequency control because occurrence of a frequency error is unavoidable as in the case of adopting the synchronous detection method on the receiving side of the wireless communication method adopting the multilevel PSK method. Suitable for use in.

[0002]

2. Description of the Related Art Conventionally, there is a cross product frequency discriminator as a frequency error detector for detecting the polarity and absolute value of a frequency deviation. FIG. 7 is a diagram showing an example of the configuration of such a conventional cross product frequency discriminator. This frequency discriminator has an input terminal 21 for inputting the in-phase component of the received signal.
And the input terminal 22 for inputting the quadrature component of the received signal, and delaying the signal input from the input terminal 21 by the time τ ₁ , and the signal input from the input terminal 22 for the time τ _1. A delay element 24 for delaying,

A multiplier 25 for multiplying the output of the delay element 24 and the signal input from the input terminal 21, and the delay element 23.
It has a multiplier 26 that multiplies the output of the input terminal 22 and the signal input from the input terminal 22, and a subtracter 27 that calculates the difference between the output of the multiplier 25 and the output of the multiplier 26 and outputs the difference.

The in-phase component of the received signal is sin (Δωt +
θ) and the quadrature component are expressed as cos (Δωt + θ), so that if the output of the multiplier 25 is F _a (t) and the output of the multiplier 26 is F _b (t), they are respectively expressed by the following equations.
(Θ is the modulation component)

F _a (t) = sin (Δωt + θ) .co
s (Δω (t + τ ₁ ) + θ) F _b (t) = cos (Δωt + θ) · sin (Δω (t
+ Τ ₁ ) + θ)

The subtracter 27 uses F _a (t) and F _{a in the} above equation.
Output the difference of _b (t). As a result, the output of the subtractor 27 becomes sin Δωτ ₁ , and the frequency error Δω is obtained. (Reference: FDNatali: “AFC Tracking Algorithms
”, IEEE Trans. Commun., COM−32, NO.8, pp935 −94
7 (1984))

[0007]

The output of the conventional cross product type frequency discriminator as described above is sin Δω.
Since it is τ ₁ , the linear region for frequency error is narrow. When the frequency error is sufficiently smaller than the clock frequency, the relational expression sin Δωτ ₁ ≈Δωτ ₁ holds, and the detector output can be approximated to the frequency error.

However, as the frequency error increases, the error characteristic deviates from the linear region, and the detection error increases. Therefore, it is impossible to correct the frequency at high speed (high-speed pull-in). Become. An object of the present invention is to provide a frequency error detector which expands a linear region for frequency error and enables high-speed pull-in.

[0009]

According to the present invention, the above-mentioned object is solved by the means described in the claims.

The configuration of the invention of claim 1 will be described with reference to FIG. 1. The in-phase component (sin (Δωt
+ Θ)) for a time τ ₁ and a quadrature component (cos (Δωt + θ)) of the input signal for a time τ 1.
A delay element 4 for delaying by _1; a multiplier 5 for multiplying the output of the delay element 4 by the in-phase component of the input signal;

A multiplier 6 for multiplying the output of the delay element 3 by the quadrature component of the input signal; a subtractor 9 for obtaining and outputting the difference between the output of the multiplier 6 and the output of the multiplier 5; A multiplier 7 for multiplying the output of the delay element 3 by the in-phase component of the input signal; a multiplier 8 for multiplying the output of the delay element 4 by the quadrature component of the input signal;

The adder 10 for adding the output of the multiplier 8 and the output of the multiplier 7, the divider 11 for dividing the output of the subtractor 9 by the output of the adder 10, and the divider 11 A frequency error detector having an arctangent unit 12 for outputting an arctangent of an output and configured to detect a frequency error of an input signal from an output of the arctangent unit 12.

With this configuration, the output of the detector becomes Δωτ ₁ with respect to the frequency error, so that the linear region of the detection characteristic is expanded and the error detection accuracy is improved, so that high-speed pull-in can be realized. .

The invention of claim 2 is the frequency error detector according to claim 1, as shown in FIG.
If the output of is positive, "0" is output. If the output of the adder 10 is negative, a real number of π or more is output if the output of the subtractor 9 is positive, and if the output of the subtractor 9 is negative. A polarity determiner 14 that outputs a real number of −π or less, and an adder 15 that adds the output of the polarity determiner 14 and the output of the arctangent unit 12 are further provided.

A frequency error detector configured to detect the frequency error of the input signal from the output of the adder 15. With this configuration, the range of the linear region can be doubled as compared with the case of the first aspect, and the accuracy of error detection in the range is improved, so that the pull-in can be performed at a higher speed.

According to a third aspect of the present invention, as shown in FIG. 3, in the frequency error detector according to the first aspect, "0" is output if the output of the adder 10 is positive, and the output of the adder 10 is negative. When the output of the subtracter 9 is positive, a real number of π / 2 or more is output, and when the output of the subtractor 9 is negative, a polarity determiner 17 that outputs a real number of −π / 2 or less,

When the output of the polarity determiner 17 is "0", the output of the arc tangent unit 12 is selected. When the output of the polarity determiner 17 is other than "0", the polarity determination at that time is selected. Bowl 17
Is further provided with a selector 18 for selecting the output of, and a frequency error detector configured to detect the frequency error of the input signal from the output of the selector 18.

According to a fourth aspect of the invention, in the configuration shown in FIG. 3, the operation of the selector is different from that of the third aspect of the invention. That is, according to the present invention, in the frequency error detector according to claim 1, "0" is output when the output of the adder 10 is positive, and when the output of the adder 10 is negative,

If the output of the subtractor 9 is positive, a signal of a value indicating that the polarity is positive, and if the output of the subtractor 9 is negative, the value of a value indicating that the polarity is negative is indicated. The polarity determiner 17 that outputs a signal and the output of the polarity determiner 17 are “0”
In the case of, the output of the arctangent unit 12 is selected, and when the output of the polarity determiner 17 is other than “0”,

If the polarity of the output of the polarity determiner 17 at that time is positive, a real number of π / 2 or more is output, and if the polarity of the output of the polarity determiner 17 is negative, a real number of -π / 2 or less is output. A frequency error detector that further includes a selector 18 and detects a frequency error of an input signal from the output of the selector 18.
In the inventions of claims 3 and 4, the area of the error detection range of the frequency error detection characteristic can be made large, so that high-speed pull-in becomes easy.

[0021]

FIG. 1 shows a first embodiment of the present invention.
It is a figure showing an example of and showing an example of composition of a frequency error detector by the present invention. In this figure (this example corresponds to claim 1), the in-phase component of the received signal is input to the input terminal 1. The quadrature component of the received signal is input to the input terminal 2. The in-phase component of the received signal is represented by sin (Δωt + θ), and the quadrature component is represented by cos (Δωt + θ). The output of the input terminal 1 is delayed by the delay element 3 for a time τ ₁ , and the output of the input terminal 2 is delayed by the delay terminal 4 for a time τ ₁ .

The output of the input terminal 1 and the output of the delay element 4 are multiplied by the multiplier 5, the output of the input terminal 2 and the output of the delay element 3 are multiplied by the multiplier 6, and the output of the multiplier 5 and the multiplier 6 Is output to the subtractor 9. Here, if the output of the multiplier 5 is F _a (t) and the output of the multiplier 6 is F _b (t),
Each is expressed by the following equation.

F _a (t) = sin (Δωt + θ) · co
s (Δω (t + τ ₁ ) + θ) F _b (t) = cos (Δωt + θ) · sin (Δω (t
+ Τ ₁ ) + θ)

The subtracter 27 uses F _a (t) and F in the above equation.
Output the difference of _b (t). As a result, the output of the subtractor 27 becomes sin Δωτ ₁ . Further, the output of the input terminal 1 and the output of the delay element 3 are multiplied by the multiplier 7, the output of the input terminal 2 and the output of the delay element 4 are multiplied by the multiplier 8, and the output of the multiplier 7 and the multiplier 8 The output is input to the adder 10.
Here, when the output of the multiplier 7 is F _c (t) and the output of the multiplier 8 is F _d (t), they are respectively expressed by the following equations.

F _c (t) = sin (Δωt + θ) · si
n (Δω (t + τ ₁ ) + θ) F _d (t) = cos (Δωt + θ) · cos (Δω (t
+ Τ ₁ ) + θ)

The adder 10 has F _c (t) and F in the above equation.
Output the sum of _d (t). As a result, the output of the adder 10 becomes cos Δωτ ₁ . Output of subtractor 9 sin Δωτ
₁ is a divider ₁ by the output cos Δωτ ₁ of the adder 10.
It is divided by 1. The output of the divider 11 is input to the arctangent unit 12, which calculates and outputs the arctangent of the output of the divider 11. As a result, the output value is Δωτ ₁ . The output of the arc tangent unit 12 is output from the terminal 13 and becomes the output of the present detector, and the frequency error is obtained from this output.

FIG. 4 shows the frequency error detection characteristic of the first example of the embodiment of the present invention. For comparison, the linear region of the conventional cross product type frequency discriminator is shown as B in FIG. Since the frequency error detection characteristic of the conventional cross product type frequency discriminator is sin Δωτ ₁ , the linear region for the frequency error is narrow.

On the other hand, since the detector output of the first example of the embodiment of the present invention is Δωτ ₁ , the linear region for the frequency error is −π / 2 ≦ Δωτ ₁ ≦ π / 2, and the conventional cross It can be seen that the linear region is considerably expanded compared to the product type frequency discriminator.

FIG. 2 is a diagram showing a second example of the embodiment of the present invention, showing an example of the configuration of the frequency error detector according to the present invention. In this figure (this example corresponds to claim 2), the output up to the arctangent unit 12 is the same as in FIG.
That is, the output of the arctangent unit 12 becomes Δωτ ₁ ,
More linear region for frequency error is -π / 2 ≤ Δωτ ₁
≦ π / 2.

In order to further expand this linear region, the polarity determiner 14 for determining the polarity of the output of the subtracter 9 and the output of the adder 10 is used. The output of the subtractor 9 and the output of the adder 10 are input to the polarity determiner 14. At this time, the output of the subtractor 9 is sin Δωτ ₁ , and the output of the adder 10 is cos Δω
It is represented by τ ₁ .

The polarity determiner 14 outputs the output of the subtractor 9 and si
The output of Enuderutaomegatau ₁ and the adder 10, with Cosderutaomegatau _1, the polarity determination. The polarity determination method of the second example of the above embodiment is shown in "Table 1". In Table 1, the sign ± of the output of the subtractor 9 indicates that it may be + or −. This display method is the same in the other tables described below.

[0032]

[Table 1]

As shown in this table, the output (c
If osΔωτ ₁ ) is positive, "0" is output from the polarity determiner 14, and if the output of the adder 10 (cosΔωτ ₁ ) is negative, the polarity is determined by the polarity of the output of the subtractor 9 (sin Δωτ ₁ ). To do. That is, the output (s
If inΔωτ ₁ ) is positive, π is output, and if negative, −π is output from the polarity determiner 14. The output of the polarity determiner 14 and the output of the arctangent 12 are added by the adder 15, and the output of the adder 15 is output from the terminal 16 as the output of the frequency error detector.

Then, the frequency error is obtained from this output. That is, in the polarity determination method in the frequency error detector of this example, cos Δωτ ₁ becomes negative −π ≦ Δωτ ₁ ≦ −
In the range of π / 2 and π / 2 ≦ Δωτ ₁ ≦ π, the output of the polarity determiner 14 is set to π or −π, and the value is set to the arctangent unit 1.
The linear region is expanded by adding to the output of 2.
It enables high-speed retraction.

FIG. 5 shows the output characteristic of the frequency error detector of this example. It can be seen that the range of the linear region (indicated by the letter C in the figure) is doubled as compared with the first example.

FIG. 3 is a diagram showing a third example of the embodiment of the present invention, showing an example of the configuration of the frequency error detector according to the present invention. In this figure (this example corresponds to claim 3), the output up to the arctangent unit 12 is the same as in the first example of the embodiment of the present invention shown in FIG.

That is, the output of the arctangent unit 12 is Δωτ ₁
From Fig. 4, the linear region for frequency error is -π /
2 ≦ Δωτ ₁ ≦ π / 2. The outputs of the subtractor 9 and the adder 10 are input to the polarity determiner 17. At this time, the output of the subtractor 9 is sin Δωτ ₁ , and the output of the adder 10 is cos.
It is represented by Δωτ ₁ . The polarity determiner 17 is a subtractor 9, s
The polarity determination is performed using the output of inΔωτ ₁ and the adder 10 and cos Δωτ ₁ . "Table 2" shows the polarity determination method of this detector and the operation of the selector.

[0038]

[Table 2]

As shown in this table, when the output (of cos Δωτ ₁ ) of the adder 10 is positive, the polarity determiner 17 outputs "0".
Is output and the output of the adder 10 (cos Δωτ ₁ ) is negative, the polarity is determined by the polarity of the output of the subtractor 9 (sin Δωτ ₁ ). That is, the output (s
If inΔωτ ₁ ) is positive, π is output, and if negative, −π is output from the polarity determiner 17. The output of the polarity determiner 17 and the output of the arctangent unit 12 are input to the selector 18. Selector 1
8 selects and outputs a signal according to the output of the polarity determiner 17.

If the output of the polarity determiner 17 is "0", the output of the arctangent unit 12 is output, and the output of the polarity determiner 17 is π or-.
If π, the output of the polarity determiner 17 is selected and used as the output of the selector. The output of this selector 18 becomes the output of this frequency error detector. Then, the frequency error is obtained from this output.

That is, the polarity determination and selector operation in the third example of this frequency error detector is -π / 2 ≦ Δ.
When ωτ ₁ ≦ π / 2, the output of the arctangent unit 12 is −π ≦ Δω
In τ ₁ ≦ -π / 2 and π / 2 ≦ Δωτ range of ₁ ≦ [pi, respectively by increasing the area of the frequency error detection characteristics by outputting the value of the output of the polarity detector 17, enables fast pull It is a thing.

In Table 2, when the output of the polarity determiner 17 is π and −π, the output of the selector 18 is π and −.
Although π is set, the same effect can be obtained by setting the output of the polarity determiner 17 and the output of the selector 18 to other values. FIG. 6 shows the detector output characteristic of this example.

In the third example of the embodiment of the present invention described with reference to FIG. 3, when the output of the adder 10 is negative, the polarity determiner 17 determines the polarity of the output of the subtractor 9. It is also possible to output a signal indicating the characteristic, and the selector 18 to output a predetermined constant value corresponding thereto. This will be described as a fourth example of the embodiment of the present invention. (This example corresponds to the invention of claim 4) "Table 3" shows the polarity determination method and the operation of the selector in this case.

[0044]

[Table 3]

As shown in this table, if the output of the adder 10 (cos Δωτ ₁ ) is positive, the polarity determiner 17 outputs “0”, and the output of the adder 10 (cos Δω
When τ ₁ ) is negative, the output of the subtractor 9 (sin Δωτ
_The polarity is judged by the polarity of ₁ ). That is, if the output (sin Δωτ ₁ ) of the subtracter 9 is positive, “1” is output from the polarity determiner 17, and “−1” is output from the polarity determiner 17. And
The output of the polarity determiner 17 and the output of the arctangent unit 12 are input to the selector 18.

The selector selects a signal according to the output of the polarity determiner 17. That is, if the output of the polarity determiner 17 is "0", the output of the arc tangent unit 12 is determined, and if the output of the polarity determiner 17 is "1" or "-1", the polarity of the output of the polarity determiner 17 is determined. Select a certain value and use it as the output of the selector. The output of this selector 18 becomes the output of this frequency error detector. Then, the frequency error is obtained from this output.

That is, the polarity determination and selector operation in the third example of this frequency error detector is -π / 2 ≦ Δ.
When ωτ ₁ ≦ π / 2, the output of the arctangent unit 12 is −π ≦ Δω
In τ ₁ ≦ -π / 2 and π / 2 ≦ Δωτ range of ₁ ≦ [pi, increasing the area of the frequency error detection characteristics by outputting a certain value, respectively (e.g. [pi), which enables high-speed pull .

The output characteristic of the detector of this example is similar to that of the third example described above, and is as shown in FIG. Further, in the above-mentioned “Table 3”, when the output of the polarity determiner 17 is “1” and “−1”, the output of the selector 18 is π.
However, the same effect can be obtained by setting the output of the polarity determiner 17 and the output of the selector 18 to other values.

[0049]

As described above, according to the present invention,
In a system that requires frequency control because frequency errors are unavoidable, it is possible to expand the linear region of the frequency error detector that detects the frequency error that has occurred. Therefore, when the conventional method is used, there is an advantage that high-speed pull-in can be performed even for a large frequency error that deviates from the linear region.

[Brief description of drawings]

FIG. 1 is a diagram showing a first example of an embodiment of the present invention.

FIG. 2 is a diagram showing a second example of the embodiment of the present invention.

FIG. 3 is a diagram showing a third example of an exemplary embodiment of the present invention.

FIG. 4 is a diagram showing a frequency error detection characteristic of the first example of the embodiment of the present invention.

FIG. 5 is a diagram showing frequency error detection characteristics of the second example of the embodiment of the present invention.

FIG. 6 is a diagram showing a frequency error detection characteristic of the third example of the embodiment of the present invention.

FIG. 7 is a diagram showing an example of a configuration of a conventional cross product frequency discriminator.

[Explanation of symbols]

 1, 2 input terminals 3, 4 delay elements 5-8 multipliers 9 subtractors 10, 15 adders 11 dividers 12 arctangents 13, 16, 19 output terminals 17 polarity determiners 18 selectors

Claims (4)

[Claims] 1. An in-phase component of an input signal (sin (Δωt +
a delay element (3) for delaying theta)) by the time tau _1, and the quadrature component of the input signal (cos (Δωt + θ)) only time tau ₁ delay delaying device (4), the delay element (4) A multiplier (5) for multiplying the output and the in-phase component of the input signal; a multiplier (6) for multiplying the output of the delay element (3) and the quadrature component of the input signal; A subtractor (9) for obtaining and outputting a difference between an output and an output of the multiplier (5); a multiplier (7) for multiplying an output of the delay element (3) and an in-phase component of the input signal; A multiplier (8) for multiplying the output of the delay element (4) and the quadrature component of the input signal; and an adder (10) for adding the output of the multiplier (8) and the output of the multiplier (7). A divider (11) for dividing the output of the subtractor (9) by the output of the adder (10), and the divider A frequency error detector having an arctangent (12) for outputting the arctangent of the output of (11), and detecting the frequency error of the input signal from the output of the arctangent (12). 2. The frequency error detector according to claim 1, wherein when the output of the adder (10) is positive, "0" is output, and when the output of the adder (10) is negative, the subtractor ( If the output of 9) is positive, a real number of π or more is output. If the output of the subtractor (9) is negative, a real number of −π or less is output.
4) and an adder (15) for adding the output of the polarity determiner (14) and the output of the arctangent unit (12) are further provided, and the frequency error of the input signal is output from the output of the adder (15). A frequency error detector characterized by detecting. 3. The frequency error detector according to claim 1, wherein when the output of the adder (10) is positive, "0" is output, and when the output of the adder (10) is negative, the subtractor ( A polarity determiner (17) that outputs a real number of π / 2 or more if the output of 9) is positive, and a real number of −π / 2 or less if the output of the subtractor (9) is negative; When the output of the device (17) is "0", the output of the arc tangent device (12) is selected, and when the output of the polarity determiner (17) is other than "0", the polarity determination at that time is selected. Bowl (1
A frequency error detector characterized by further comprising a selector (18) for selecting the output of 7) and detecting the frequency error of the input signal from the output of the selector (18). 4. The frequency error detector according to claim 1, wherein when the output of the adder (10) is positive, “0” is output, and when the output of the adder (10) is negative, the subtractor ( If the output of 9) is positive, a signal of a value indicating that the polarity is positive, and if the output of the subtractor (9) is negative, a signal of a value indicating that the polarity is negative. Output polarity determiner (1
7) and when the output of the polarity determiner (17) is "0", the output of the arc tangent unit (12) is selected, and when the output of the polarity determiner (17) is other than "0" Is the polarity determiner (1
If the polarity of the output of 7) is positive, a real number of π / 2 or more is output. If the polarity of the output of the polarity determiner (17) is negative, a selector (18) that outputs a real number of −π / 2 or less is used. A frequency error detector, further comprising a frequency error detector for detecting an input signal frequency error from the output of the selector (18).