JPH09198236A - Method for determining instruction order and device therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To generate a source program from flow chart graphic data for which layout is freely performed. SOLUTION: This method is the instruction order determining method executing processes (1) to (3). (1) Starting terminal graphic data is detected. (2) processes (A) and (B) are repeating executed till a terminating terminal graphic. (A) Next connected block graphic data is detected and the data is stored in a buffer 1. (B) In the case of a condition branching, a connection destination is determined. (3) For an unprocessed branching, processes (C) and (D) are repeatingly executed. (C) The graphic data of a function block to be connected next is detected and the data is added to a buffer 2. (D) When the next graphic data is a processed block, the graphic data within the buffer 2 is inserted just before the next graphic data stored in the buffer 1 and the buffer 2 is made clear.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an instruction order determining method and apparatus, and more particularly to an instruction order determining method and apparatus capable of generating a source program from flowchart graphic data.

[0002]

2. Description of the Related Art Conventionally, a flowchart editor or P
There has been a method in which an AD editor is used to draw a module control flowchart using standardized parts, and a C language generation tool, an assembler generation tool, or the like is used to generate a source program to save coding work.

[0003]

In the conventional source program generation method, when the flowchart is drawn by the flowchart editor, the module control flowchart can be drawn only by a combination of predefined parts. Therefore, there is almost no layout freedom, and only structured programs, that is, programs with a redundant structure that always returns to the original position when branched, can be drawn, and the shortest processing step is required. There is a problem that it is not possible to draw an unstructured program that is called. SUMMARY OF THE INVENTION It is an object of the present invention to provide a method and apparatus for solving the above problems of the prior art and generating a source program from freely laid out flow chart graphics.

[0004]

The present invention is characterized by an instruction order determining method for executing the following steps and an instruction order determining apparatus for executing the method. (1) A step of detecting flow chart start point graphic data from the flow chart graphic data and storing it in the first storage means. (2) A step of repeatedly executing the following steps (A) and (B) until the next figure data is a processed figure or reaches the end terminal figure of the flowchart. (A) A step of detecting the graphic data of the connected functional block and adding it to the rear of the graphic data of the first storage means. (B) If the extracted functional block is a conditional branch block, a step of deciding a connection destination on the non-branching side according to a predetermined rule and setting it as the next connection destination. (3) A step of repeatedly executing the following steps (C) and (D) as long as there are unprocessed branches. (C) A step of detecting the graphic data of the functional block to be connected next and adding it to the graphic data of the second storage means. (D) If the next graphic data is a processed block or an unprocessed end terminal graphic, the insertion position in the first storage means is determined and the graphic in the second storage means is determined. Inserting data and clearing the second storage means.

With this configuration, the present invention can automatically read the type and connection relationship of blocks from the graphic data of the flow chart and automatically determine the arrangement order of the blocks. Therefore, each block is converted into a corresponding command word. By doing so, the source program can be generated. Arrangement and connection relation of each block are free, and it is possible to generate an unstructured program. In addition, there is no restriction on the layout, the direction of conditional branching can be freely changed, and a flowchart extending over many pages can be processed. Further, since figures and character strings not connected to the flowchart are ignored at all, it is possible to freely write explanatory charts and comment sentences in the flowchart drawings.

[0006]

Embodiments of the present invention will be described below. FIG. 1 is a block diagram showing the configuration of a source program generation system that is an embodiment of the present invention. This system is realized by software running on a computer such as a workstation. The functional block components as shown in FIG. 3 are created and registered in advance using an arbitrary graphic generation system. A flowchart graphic data file 1 created using this part graphic has a structure as shown in FIG. 4, for example, and this file is converted by the intermediate file converter 2 according to the present invention in a method described later, The intermediate file 3 in which the information of each block is rearranged in the order of arrangement of the command words of the program is generated. The information of each block of the intermediate file 3 is, as shown in FIG. 5, information necessary for converting each block into an instruction word and graphic position coordinate data for establishing correspondence with the original flowchart graphic data 1. Etc. are included.

The source list converter 4 converts each block of the intermediate file 3 into a corresponding command word to generate a source program text file 5 as shown in FIG. The assembler 6 inputs the source program text file and outputs the machine code data file 7 and the assemble list text file 8. The machine code data 7 is stored in, for example, a ROM and mounted on an engine control device or the like, and the assemble list text file 8 is printed as an assemble list. The assembler 6 is provided with a label number re-assigning function and a clock cycle number assigning function necessary for executing the instruction, and the label numbers of the assemble list text file 8 are re-assigned so that they are easy to see. Cycle number data is added to each instruction. An assembler having such a function is well known.

The difference file converter 9 inputs the intermediate file 3, the source program text file 5, and the assemble list text file 8 and arbitrarily outputs the label number corrected by the assembler, the added cycle number information, or the source program text file. The difference file 10 including the information corrected by the editor or the like is generated. This difference file is input to the flow chart converter 11 and is combined with the original flow chart graphic data file to generate the modified flow chart graphic data file 12. Therefore, in this modified flowchart, for example, the label number is modified every 10th, the number of cycles is added to each processing block, and the characters such as the variable name modified at the stage of the source program text file are also modified.

In order to use the source program generation system of the present invention, it is first necessary to create a flowchart graphic by an arbitrary graphic creation system. At this time, the functions of the graphic creation system are usually used to create the graphics of each functional block in advance as parts.
Register. FIG. 3 is an explanatory diagram showing an example of a component to be registered. FIG. 3A shows a normal processing block, and the processing contents inside the block, here, “A ← B”, that is, data transfer from the B register to the A register is shown. The upper straight line is a connection line with other blocks, and the number "10" at the upper right is a letter indicating the label number.

In the case of the part shown in FIG. 3 (a), a square figure,
A character frame indicating internal processing contents, an upper connecting line, a label number character frame, a cycle number character frame, and the like are combined as one figure. In addition to this, in order to add the part number data indicating the type of each block to each block, the inside of the square figure is filled with the same color as the background, and the part number character frame is provided behind the square figure I have entered the number. Therefore, when the part is displayed and printed, the part number does not appear, but as the graphic data, the part number information is attached in a form combined with the square graphic. 3 (b) is a subroutine, (c) and (d) are conditional branch blocks,
(E) shows a start end, (f) shows an end, and (g) shows an unconditional branch block.

FIG. 4 is an explanatory diagram showing an example of the flowchart graphic data. The format of the flowchart graphic data differs depending on each graphic creation system (software). For example, the graphic data 13 in the case of creating a quadrangular part as shown in FIG. 3A is usually formed from a data group as shown in FIG. Has been done. The frame quadrangle data 14 includes, for example, graphic type (quadrangle) data, coordinate data including upper left coordinates and width and height, frame line type information, fill pattern data in a figure, and the like. Note that all the blocks are filled with the same color as the background in the frame so that the characters in the part number character frame peculiar to each block component behind are not displayed.

The connecting line straight line data 15 includes graphic type (straight line) data, start point and end point coordinate data, line type data, and the like. Each of the character frame data 16, 17, 18, and 19 includes graphic type (character frame) data, coordinate data, displayed character string data, format data, character modification data, and the like. As described above, the part number character frame 17 exists behind the square frame 14, and the display character string character frame data 16 is in the front. The label character frame is arranged, for example, on the upper right (and upper left) of the frame, and the cycle number character frame is, for example, on the right side of the frame. These graphic data are combined as one graphic, and are processed as one graphic data when moving or copying.

FIG. 2 is an explanatory diagram showing an example of a flow chart created using the parts of FIG. The dotted line in the figure,
The step number (S ??) of each block and the black dot on the connecting line are provided for the purpose of explanation, and are not shown in the flowchart drawings. However, if the connection relationship can be determined, the processing of the present invention is possible even if it is shown in the drawing. When creating a flow chart, first, the starting end part is placed on the upper part, and the characters (XYZ **) of the label are entered in the character frame for the label.

Next, a component to be connected, for example, a quadrangular component is arranged so that the connecting line is connected, or after the arrangement, the ends of the connecting line are connected by a line. Black dots in FIG. 2 indicate connection points between parts or a part and a straight line. Then, a display character string (A ← XS) indicating the processing content,
Enter the label number (10), and if necessary, create a character frame and enter a comment (DD = 0). In this way, arbitrary parts are arranged at arbitrary positions, arbitrarily connected, and a flowchart is created up to the terminal symbol. When normal processing merges as in steps S5 and S9, the unconditional branch block SJ (S10) is inserted after either processing.

FIG. 8 shows the intermediate file converter 2 of FIG.
5 is a flowchart showing an instruction order determining process in FIG. In step S20, the start terminal (starting end figure) is searched from the input flowchart figure data. This search is executed by checking the part number of each block figure. The graphic data are arranged in the order of creation, for example, and the layout of the graphic and the data arrangement are irrelevant. If you find the start terminal,
Generate an intermediate code corresponding to the block to generate a buffer 1
To be stored.

In step S21, a block connected to the start terminal (the previous block for the second and subsequent terminals) is found, and the corresponding intermediate code is output to the buffer 1. The connection is recognized by, for example, searching for a block or a line that the end coordinates of the connecting line of the start terminal are in contact with, and in the case of a line, further searching for a block or a line that is in contact with the end of the line. To do. Then, a mark indicating that the processing has been completed is added to the output block graphic data. FIG. 5 is an explanatory diagram showing an example of the output intermediate code. In the intermediate code, for example, one block corresponds to one line, and together with the line number which is a serial number, the page number,
The part number, the display character string, the label number, the block coordinate data, etc. are separated by a delimiter code ("?" In this example) and arranged in a predetermined format.

Returning to FIG. 8, in step S22, it is determined whether or not the block output to the buffer 1 is the block corresponding to the conditional branch instruction. If the result is affirmative, the process proceeds to step S23. In step S23, it is determined whether or not an underline is added to the letters "Y" or "N" added to the connecting line of the block. If the result is affirmative, the process proceeds to step S25, but a negative determination is made. In that case, the process proceeds to step S24.

In step S24, the block connected to the lower end of the rhombic figure of the conditional branch block is selected as the next block. In step S25, the block connected to the vertex corresponding to the character without underline is selected as the next block. By such processing, the creator of the flowchart can control the arrangement of the instructions. In step S26, it is determined whether or not the next graphic data is a processed graphic or the block output to the buffer 1 is the end terminal. If the result is negative, the process returns to step S21 and the next block is returned. Processing is performed, but if the result is affirmative, the process proceeds to step S27.

In step S27, it is determined whether or not there is an unprocessed branch (branch) for which the output processing to the buffer is not executed in the block connected to the output line which is not selected in the conditional branch instruction. Is determined, and if the result is negative, it means that all the processes have been completed, but if the result is affirmative, the process proceeds to step S39. In step S39, the buffer 2 is cleared, and step S
In step 28, the same processing as step S21 is performed, but the intermediate code is output to the buffer 2 instead of the buffer 1.

In step S29, it is determined whether or not the processed block is the end terminal, and if the result is affirmative, the process proceeds to step S35. In step S35, the intermediate code data output to buffer 2 is added to the end of buffer 1. And step S2
Move to 7. If the determination result in step S29 is negative, the process proceeds to step S30, and it is determined whether or not the next block is a block in which the intermediate code has already been output. If the result is negative, steps S31 to S34 are performed. The process shifts to the process, where the same process as the process of steps S22 to S25 is performed, and the process shifts to step S28.

When the determination result of step S30 is affirmative, the process proceeds to step S36, and it is determined whether or not the processed block is an unconditional jump (branch) block.
If the result is affirmative, the process proceeds to step S37, but if the result is negative, the process proceeds to step S38. In step S37, the processing block group of the branch currently being processed is returned to, an unconditional jump or an end terminal is searched in the buffer 1, and the first found one is followed by the buffer 2
Insert the data of. In step S38, the data in the buffer 2 is inserted immediately before the processed block connected next to the branch currently being processed, and the process proceeds to step S27.

In order to perform the processing of step S38, an unconditional branch must exist before the position to be inserted,
It is necessary to insert an unconditional branch in advance at the time of creating the flowchart, or perform processing so that it is automatically inserted.

FIG. 6 shows the flowchart of FIG.
It is explanatory drawing which shows the arrangement | sequence of the intermediate code in a buffer at the time of performing the instruction order determination process shown in FIG. The contents of each intermediate code are expressed using command words, and the numbers represent label numbers. In the instruction sequence determination processing of FIG. 8, first, the part number information is searched to detect the start terminal of FIG. Then, the component S1 connected to the start terminal is detected from the coordinate information of the connection line, and the intermediate code is output to the buffer 1.

Next, S2 is detected from the coordinates of the connecting line.
In the conditional branch block of step S2, the underline "N" is underlined, so the process proceeds from step S23 to step S25 in FIG. The side is selected as the connection terminal to the next block. As a result, the next block becomes S11. Similarly, the process proceeds to S12, S13, S14, S9, and S10 to reach the end terminal of the label number 45, and the corresponding intermediate code is stored in the buffer 1 in this order. More than,
It is the main processing route (A) corresponding to steps S20 to S26 of FIG.

Next, processing for unprocessed branches is performed. First, for the “N” output line of S2, the processes of steps S28 to 38 of FIG. 8 are performed, and the intermediate code (B) is output in the order of S3, S4, and S5, but this data is output to the buffer 2. Since the end terminal, which is the processed block after S5, is not an unconditional jump,
The process of step S38 is executed, and the data (B) of the buffer 2 is inserted immediately before the end terminal connected next to this group (B).

Next, for the "N" outgoing line in S4, the processes of steps S28 to S38 in FIG. 8 are performed, and S6, S7, S8.
The intermediate code (C) is output to the buffer 2 in the order of. Since S9, which is the processed block next to S8, is not an unconditional jump, the process of step S38 is executed, and the data (C) in the buffer 2 is immediately before S9 that is connected next to this group (C). Insert. As described above, in the intermediate code (A) in the buffer 1 shown in FIG.
The intermediate codes (B) and (C) stored in the buffer 2 are respectively inserted, and the array of intermediate codes is completed.

FIG. 7 is an explanatory diagram showing a source program obtained by converting the completed intermediate file 3 by the source list converter 4. Source list converter 4
Each intermediate code of the intermediate file is converted into the memonic code of the corresponding instruction word in the same order. Correspondence is determined from the part number and display character string information. From the left side of FIG. 7, a label, a memonic code of an instruction word, and an operand are described. The corresponding step numbers shown in FIG. 2 are displayed in parentheses on the right side, and the route (group) is displayed on the right side. In this example, the language is assembler, and the intermediate code and the instruction word correspond one-to-one, but the language may be a high-level language, and one intermediate code corresponds to a sequence of a plurality of instruction words. You may have.

Although the embodiment has been described above, the following modifications are also possible. In the embodiment, for example, S in FIG.
An unconditional jump block is previously inserted in one of the places such as the confluence point after the processes of 5 and S9 by the creator of the flowchart. However, the unconditional jump may not be inserted when the flowchart is created, and the intermediate file converter 2 may automatically insert the intermediate code of the unconditional jump. In the case of such merging of normal processing not from conditional branch blocks, for example, always insert an unconditional jump in the main route or the previously processed route, or make an arrow on the connecting line at the time of merging. It can be implemented by inserting an unconditional jump on the route side that is attached or is given another predetermined arbitrary mark. At this time, if there is no label number, it is automatically assigned.

In the embodiment, one block and one instruction word
Although an example of applying to an assembler corresponding to one to one has been disclosed,
The present invention can be applied to any language, and a block can be made to correspond to a macro composed of a plurality of instruction words. The flow chart graphic data may have any format, and the source program can be directly generated without generating the intermediate file.

[0030]

As described above, according to the present invention, it is possible to automatically read the type and connection relationship of blocks from the graphic data of the flow chart and automatically determine the arrangement order of the blocks. A source program can be generated by converting into a word. Arrangement and connection relation of each block are free, and it is possible to generate an unstructured program. In addition, there is no restriction on the layout, the direction of conditional branching can be freely changed, and a flowchart extending over many pages can be processed. Furthermore, since figures and character strings not connected to the flowchart are ignored at all, there is an effect that it is possible to freely write explanatory charts and comment sentences in the flowchart drawings.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a source program generation system of the present invention.

FIG. 2 is an explanatory diagram showing an example of a flowchart created using parts.

FIG. 3 is an explanatory diagram showing an example of parts to be registered.

FIG. 4 is an explanatory diagram showing an example of flowchart graphic data.

FIG. 5 is an explanatory diagram showing an example of intermediate file data.

FIG. 6 is an explanatory diagram showing an array of intermediate codes when an instruction order determination process is performed.

FIG. 7 is an explanatory diagram showing a source program obtained by converting an intermediate file.

FIG. 8 is a flowchart showing instruction order determination processing in the intermediate file converter 2.

[Explanation of symbols]

1 ... Flow chart graphic data file, 2 ... Intermediate file converter, 3 ... Intermediate file, 4 ... Source list converter, 5 ... Source program text file,
6 ... Assembler, 7 ... Machine code data file, 8
... Assemble list text file, 9 ... Difference file converter, 10 ... Difference file, 11 ... Flow chart converter, 12 ... Modified flow chart graphic data file

Claims (6)

[Claims] 1. A method for determining the order of instructions for executing the following steps. (1) A step of detecting flow chart start point graphic data from the flow chart graphic data and storing it in the first storage means. (2) A step of repeatedly executing the following steps (A) and (B) until the next figure data is a processed figure or reaches the end terminal figure of the flowchart. (A) A step of detecting the graphic data of the connected functional block and adding it to the rear of the graphic data of the first storage means. (B) If the extracted functional block is a conditional branch block, a step of deciding a connection destination on the non-branching side according to a predetermined rule and setting it as the next connection destination. (3) A step of repeatedly executing the following steps (C) and (D) as long as there are unprocessed branches. (C) A step of detecting the graphic data of the functional block to be connected next and adding it to the graphic data of the second storage means. (D) If the next graphic data is a processed block or an unprocessed end terminal graphic, the insertion position in the first storage means is determined and the graphic in the second storage means is determined. Inserting data and clearing the second storage means. 2. In the step (D), when the next graphic data is a processed block, the second storage means is provided immediately before the next graphic data stored in the first storage means. The instruction sequence determining method according to claim 1, wherein graphic data in the table is inserted. 3. In the step (D), if the last figure stored in the second storage means is the end terminal,
2. The instruction order determining method according to claim 1, wherein the graphic data in the second storage means is added after the graphic data in the first storage means. 4. In the step (D), when the next graphic data is a processed block and the last graphic stored in the second storage means is an unconditional branch graphic,
The graphic data in the second storage means is inserted immediately after the first unconditional branch or end terminal found in the original processing block sequence of the branch currently being processed. The instruction order determination method described in. 5. The following step (4) after the step (3)
5. The instruction order determining method according to claim 1, wherein the instruction order determining method is executed. (4) A step of arranging an assembler command word or a command word string corresponding to each graphic data based on the order of the graphic data stored in the first storage means to generate source program data. 6. An instruction order determining device having the following means (1) to (5). (1) Graphic recognition means for recognizing the type and connection destination of each processing block graphic in the flowchart graphic data. (2) Storage means for sequentially extracting the connected processing block graphic data and storing them in the storage means. (3) If the processing block is a conditional branch graphic,
A connection destination determining means that determines a connection destination on the non-branching side according to a predetermined rule and sets it as the next connection destination. (4) Judging means for deciding whether or not the next figure data is a processed block, (5) Recognizing the figures in order from the starting end figure, and in the case of a conditional branch figure, the connection destination is determined by the connection destination determining means. If the next figure data is a processed figure or reaches the terminal figure, the figures are sequentially recognized for unprocessed branches, In the case of a conditional branch graphic, the connection destination is determined by the connection destination determining means and sequentially stored in the second storage means, and the next graphic data is a processed block or an unprocessed end terminal graphic. In some cases, control means for deciding an insertion location in the first storage means, inserting graphic data in the second storage means, and clearing the second storage means.