JPH09191412A - Aspect ratio feature for display having rs-170 timing - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the display of a variable aspect ratio, which is used in a thermal image system. SOLUTION: A video signal processing circuit containing amplifiers 118 and 119 amplifying video signals is provided. The circuit also contains signal controllers 120 and 121 controlling the amplifiers between first and second gain levels. The amplifiers generate first video signals when they are controlled to the first gain level and generate second video signals when they are controlled by the second gain level. The video signal has wider azimuth and wider visibility than the first video signal. A switch 116 for changing over the signal controllers 120 and 121 between the first and second gain levels is provided.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION This invention relates generally to cathode ray tube displays, particularly standard RS-170 outputs and standard RS-170 outputs.
It relates to a thermal imaging system display switchable to and from an output having a field of view with a wider azimuthal field of view than produced by the -170 output.

[0002]

Scanning thermal imaging systems are monitoring systems,
It is used in a variety of applications including target detection / recognition systems. Such a system is typically included in a telescope lens assembly coupled to the scanner. The scanner directs energy from the scene through the imager lens assembly to a detector array having a plurality of photo-responsive detector elements perpendicular to the scan direction. Each of these detector elements provides an electrical signal proportional to the infrared flux at the particular detector element. The electrical signal generated from the detector element is substantially processed by the system sensor electronics to produce an image displayed on the system output device. To improve sensitivity, some of these systems include detectors parallel to the scan direction.
Ideally, the outputs of these detectors are delayed in time from one another so that the scanned image is output simultaneously on all of the detectors in parallel. After that, the delayed outputs are added (integrated). This process includes time delay and integration (T
DI).

The preferred embodiment of the system output device described above for use in these thermal imaging systems is a conventional cathode ray tube (CRT) display with standard RS-170 video output. Such a display gives the system operator a horizontal / vertical aspect ratio of 4: 3. Therefore, the azimuth field of view of the display is somewhat larger than the vertical field of view of the display.

However, for many target detection applications, the system operator using the system display is as context sensitive as possible in azimuth view to effectively locate and detect potential targets. It is important to have a scene. The normal R described above
While providing some contextual awareness, the S-170 display has a somewhat limited azimuthal field of view for thermal imaging targeting applications. Therefore, the standard RS-170
It is desirable to utilize a display that has a much wider azimuth field of view than the format.

Although it is desirable to have a display with a wider azimuth field of view for targeting applications, standard R
The S-170 display is also needed for training purposes or for other applications such as playing back and observing an event recorded on a videotape for a system displaying images from a standard visual camera. Although it is desirable to utilize both types of displays, because of the associated expense of providing two displays and the limited spatial requirements associated with such thermal imaging systems,
Providing both types of displays in thermal imaging systems is not very practical.

[0006]

It is therefore possible to provide either a 4: 3 standard aspect ratio or a larger azimuth field of view and manually switch between the two modes of operation, thereby reducing configuration cost and configuration. What is needed is a video display that minimizes the space required.

[0007]

According to the teachings of the present invention,
A thermal imaging system display is provided for displaying an output video signal representative of the detected target scene. The display is switchable between a 4: 3 aspect ratio and a larger 2.4: 1 aspect ratio that gives the system operator a higher degree of situational awareness. The video display according to the present invention eliminates the need to provide two separate displays, thus minimizing both system cost and footprint.

In particular, the present invention provides a thermal image target detection system including a display for displaying a video signal of a detected target scene. The device includes a video signal processing circuit having one or more amplifiers for amplifying a video signal. The circuit also includes a signal conditioner for adjusting the amplifier between the first and second gain levels. The amplifier has a first gain when adjusted to the first gain level.
To produce a second video signal when adjusted to a second gain level, the second video signal having a wider associated azimuth field of view than the first video signal. A switch is provided to switch the signal conditioning device between the first and second signal levels.

Other objects and advantages of the present invention will become apparent upon reading the following detailed description with reference to the drawings.

[0010]

DETAILED DESCRIPTION OF THE INVENTION The following description of the preferred embodiments is merely exemplary in nature and is in no way intended to limit the invention or its application or uses.

Referring to the drawings, FIG. 1 illustrates a LAV-25 light armored vehicle 10 which constitutes a preferred embodiment of the present invention. As shown in FIGS. 1 and 2, the present invention provides for reflected energy returning from a detected target scene 14 through a system telescope assembly 16 coupled to a head mirror 18 mounted externally. Is configured as part of a thermal imaging device 12 that processes the.

Preferably, the thermal imager 12 is a Hughes Infra.
red Equipment (HIRE) A thermal image sensor device. HIR
The E-Device is a high performance, lightweight, modular firing control visual and thermal imaging system that can provide excellent visibility capabilities through total darkness, smoke, dust, and other adverse conditions. The HIRE system is configurable in a variety of environments, including LAV-25, Piranha, Desert Warrior, and
It is included in various armored vehicles such as the LAV-105. The thermal imaging system 10 has a stand-alone thermal imaging capability,
It can also be configured for use with the TOW missile launch control system. The device includes several major off-the-shelf components, thereby reducing the logical demands by the commonality of such things as repair equipment, support equipment, training programs, and spare parts. The EFL compensator of the present invention can significantly improve the image quality and the aiming function of the image device, which is superior to the conventional thermal image system as described below, by the thermal image sensor device.

Referring to FIGS. 1-5, a telescope unit 16 is provided in a protected environment within a vehicle 10 in which a target search and aiming function is performed. The head mirror 18 is configured to relay the detected scene to the telescope device 16. As will be described below, after the thermal energy signal of the target scene is processed by the thermal imager, the scene is coupled to the display control panel 20 to operate the shooter display 19,
And the instruction display 21 is observed through the instruction display 21 which is operatively coupled to the control panel 22.

As shown in FIG. 3, energy from the detected scene is transmitted through the thermal imager 12 to a polygon mirror scanner 23 which is rotated by a scanner motor 24. The scanner comprises eight facets 23a-23h, each of which is cut at an angle to displace the scanned scene energy by a discrete amount on the detector array. The cuts and displacements made by each facet are shown below: Table I Facet Cut Detector Array Energy Displacement (in Pixels) 23a Normal 0 23b Interlaced −1/2 23c Up +1 23d Interlaced −1/2 23e Down −1 23f Interlaced-1 / 2 23g Normal 0 23h Interlaced-1 / 2

As the scanner rotates, the scanner mirror reflects scene energy at continuously varying angles through an imager device, generally designated 25. The imager device includes an imager lens, such as lens 25a,
A detector array in which this lens is housed in the detector device 27.
26 Project the scene on top. The imager device 25 also includes an imager optics temperature sensor 25b for monitoring the imager temperature.
Contains. The detector device 27 is housed in a dewar 28 and cooled to a low temperature by a cooling device 28a. A cold shield 29, housed within a dewar 28, detects only the scene energy input through which the detector elements pass through the optics of the telescope assembly, and energy input into the system, such as energy from the hot side of the housing. Limits the thermal energy that can be observed by the detector so as not to detect other peripheral forms of Cold shield by it
29 reduces input noise and improves overall system video quality.

As shown partially in FIG. 3 and in more detail in FIG. 4, the detector array 26 of the present invention comprises two staggered 120 × 4 subarrays 26a of detector elements. , 26b, each element being sensitive to light in the infrared spectrum and having a respective detector element output. When the scanner scans the image of the scene across the detectors in the direction indicated by arrow A in FIG. 4, the output of each detector is associated with a read integration circuit (ROIC) 27a (FIG. 5) input to this circuit
27 samples the output and performs a time delay and integration (TDI) of four parallel detector elements in each detector element row to produce 240 resulting TDI detector channels.
Video output channels 31, 32, wherein output channel 31 carries the output signal from the first 120 × 4 detector sub-array 26a and output channel 32 carries the output signal from the second detector sub-array 26b. . ROIC27a is
TDI clock 27b that determines when the detector output is sampled in TDI, multiplexer 27c, and a minimum
RO preferably having a sample period of 60: 1
And a high speed detector clock 27d for the IC multiplexer.

In the preferred embodiment, four of the sensing assemblies.
One multiplexed output channel is further multiplexed into one channel by the signal processing electronics at the input high speed clock (HCLK) rate, which rate is preferably a minimum of 240: 1.
It has a sample period and is associated with the system electronics described below with reference to FIGS. 6 and 7. EFL compensator is TD
DCL to control the sampling rate of the I clock 27b
Vary the sample rate of K27d.

Presently provided detector arrays typically comprise 60 to 120 detector elements, each with an associated output wire. Therefore, the detector array of the present invention exhibits higher resolution due to the additional detector elements. Further, the detector array of the present invention utilizes multiplexed detector array output lines, which minimizes the detector element output wires and minimizes the area required to provide the array and facilitates assembly and repair. To do.

Referring to FIG. 5, the operation of the video system components is typically controlled by system electronics 34. The system electronics 34 is constructed on three cards that couple to the system motherboard 35. The cards include an analog video processing card (AVPC) 36, a scene-based histogram processor card (SHPC) 38, and a memory output symbol card (MOSC) 40. The related functions of those three cards are described in more detail below. Also coupled to the motherboard 35 is a power card 42 which receives power input from the vehicle in which the system is located and outputs power to the various system components at the voltage levels required by the individual system components.

Referring in detail to FIGS. 6 and 7, the entire block diagram shows the components provided on the three cards 36, 38, 40. Referring first to the AVPC card 36, the channel outputs 31,32 are input to the S / HMUX 52 which has an associated high speed system multiplier clock (HCLK) 53. Preferably a total of 960 detector elements (2
40 pixels) are clocked during the clock sampling period. The S / HMUX 52 is a Hughes custom integrated circuit, preferably part number 6364, designed to sample and further multiplex the multiplexed detector element outputs.
It is 060PGA-DEV. These multiplexed signals are sampled at an adjustable sampling rate. However, for further signal processing, the signal is converted to an IV converter.
It is converted into a voltage signal via 54. Once these signals have been converted, the signals are digitized by analog-to-digital converter 56.

After conversion to a digital signal, the detector element output signal is input to the signal equalizer 60. The signal equalizer 60 adds the associated gain and level values stored in the memory 62 so that the multiplexed digital signal output for each of the 240 detector pixels at 63 is uniform and enhances image quality. The gain and level difference from each detector pixel signal is corrected as follows.

Further referring to the AVPC card 36,
The digital input signal (to signal equalizer 60) is 12 bits. However, the signal equalizer increases the digital signal output to 19 digit bits when correcting for signal gain and level differences. When the signal contains only 15 bits of usable data, the saturation detector 64 sets all data above the 15-bit range to saturation level 1 and all data below the 15-bit range to saturation level 0. Therefore, only useful data within the 15-bit range is SHPC
Output to the card 38. The AVPC card also includes a timing / control processor 68 with clock 53 and line timing for clocking the multiplexed signal from the S / HMUX during the sampling period. Preferably, the line timing HCLK is 240 TDIs per sampling period plus 16 clock rests.
Has the clock sampling rate of the channel. However, this speed may be varied according to the present invention when required as described below. The AVPC card also includes an interface 70 that connects the AVPC card components to the system microprocessor bus 72.

Considering now the SHPC card 38, the signal output from the saturation detector 64 is input to the lookup table 74.
In general, the output dynamic range of digitization and signal equalization processing is greater than the maximum dynamic range of conventional image displays. In addition, there is a region of the output dynamic range with little or no information. Therefore, the output signal of the digitization and signal equalization process is input to the look-up table 74 to compress the information into the dynamic range of the display. Lookup tables provide a programmable way to map a large input dynamic range to a small output dynamic range. The mapping can be continuously changed based on either manual input from a system operator or an automated histogram-based method. The video is input to the histogram / accumulator 80 prior to the lookup table. Histogram / accumulator 80
Is line sum of digitized information, line capture,
And perform certain programmable functions such as histogramming. The lookup table 74 converts the 15-bit signal output from the saturation detector into an 8-bit output signal. The search table is based on the Integrated Device Tech model.
nology Model) No. IDT71256 and other well known 32k × 8 random access memory (R)
AM) and can vary continuously based on either manual input from a system operator or an automatic gain algorithm. The 15-bit signal output from the saturation detector is also the video shifter.
It is converted to a 10-byte signal through 76.

Microprocessors 82 and 84 are arranged on the SHPC card 38. As mentioned above, many functions are performed under the control of a microprocessor. Microprocessor 84 performs a number of control-related operations associated with the control panel, controls the TDI clock rate for EFL compensation and the histogram / accumulator function, level equalization values for each pixel, global level control values, And calculate lookup table values. Microprocessor 82 performs more system-based functions-related processing and operates in conjunction with RAM 86 and EEPROM 90. RAM 86 and EEPROM 90 both store software-based instructions that control the electronic effective focal length compensator according to the preferred embodiment of the present invention, the function of which is described in detail below.

Referring to the MOSC card 40, a search table 74
The 8-bit output signal from the input terminal is input through the pixel buffers 92 and 94, scan-converted through the frame memory, converted into an analog signal through the digital-analog converter 96, and returned to the shooter display 19 and. It is output to both of the orderer display 21. The sign is also switched by the sign processor 98 for any pixel in the image signal before being output through the digital-to-analog converter 96. Such coded data is a status indication at the bottom of either the commander or the shooter display,
Aiming to the crosshairs and instructional text.

The digitized signal is scan converted before being output to the display. In general, scanners scan the scene horizontally, so data is multiplexed along vertical columns. However, standard video displays require data to be output along horizontal lines. Therefore, the digitized data must be converted from the vertical column input format to the horizontal line output format. Moreover, due to the separation between the sub-arrays of detectors, the digitized data from the sub-arrays are delayed in time from one another. This delay must be eliminated. Since the delay depends on the effective focal length of the imager and the data is digitized, proper removal of the delay depends on accurate compensation for changes in image focal length. The compensator performs both of these functions.

Referring now to FIG. 8, a schematic block diagram of an electronic device used to construct a video display according to a preferred embodiment of the present invention is indicated generally by the reference numeral 100. Display 100
The shooter display 19 and the commander display to give a video display of the scene detected by the thermal imager.
21 are configured as both. However, for further explanation, referring to the shooter display 19 and the shooter control panel 20, it is understood that the commander display 21 and the commander control panel 22 are constructed and operate in a manner similar to the shooter display and control panel. It

In particular, the display 100 is typically 4:
As a normal RS-170 output display, having a display with an aspect ratio of 3, for training purposes or for normal television video applications such as playing videotapes for systems displaying video from a standard visual camera. Can be used. Alternatively, the display 100 can be utilized for thermal image detection and recognition, such as forward looking infrared (FLIR) applications. For target detection and recognition, the display switches the normal TV video 4: 3 aspect ratio to a 2.4: 1 aspect ratio to give the system operator a greater azimuth field of view and thus greater situational awareness. Switched to mode application.

Input to the display 100 is standard RS
Composite video input signal 102 with -170 timing. Signal 102 is received from system digital-to-analog converter 96 and includes a sync signal, an actual target scene video signal, and a blanking signal. The composite video signal 102 is input to the buffer / DC reproduction device 104. Archer display control panel 19 generally designated by the reference numeral
It is interfaced with the display 100 through a front panel interface controller, shown at 112, and RS-422 standard communication line 114. The front panel controller includes a switch 116 and communicates with a raster format select line 120 that switches the aspect ratio feature of the display 100. The switch is processor controlled to switch a variable resistance network, such as a potentiometer 120,121 coupled to vertical and horizontal deflection amplifiers 118,119, respectively, to one of two resistance values when switched to one of two positions. Amplifier for digital signals 11
Send to 8,119. The potentiometers 120,121 thus control the gain levels of the amplifiers 118,119 and how they accurately deflect the electron beam generated at the CRT 124 as the amplifier steers the electron beam across the CRT grid screen 125.

The switch 116 can be controlled via the front panel as shown or by a serial link to the processor 84. Preferably, the potentiometers 120,12 when the switch is toggled to one of two positions.
The switch is digitally configured so that a 1 or 0 is sent from the processor 84 to the display to adjust the resistance level of 1. The switch need not be a manual switch 116, but is configured to automatically switch between two or more video aspect ratios upon receipt of an instruction from the processor 84.

Still referring to FIG. 8, the detector array 26
The RS-170 composite video signal is input to the video buffer / DC regenerator 104 that processes the input video signal so that each of the 240 TDI video lines output from the RS is referenced to an absolute reference value. . As a result, the brightness on each display output line is referenced to the same DC voltage reference signal. Display cathode ray tube (CRT) 124 after being processed by DC regenerator 104
Output through CRT output grid screen 125
The signal is provided to the video amplifier 122 before being projected to. Preferably, the amplifier 122 includes an aperture correction device to improve the high frequency response of the output video signal.

The composite video signal 102 is further supplied from the video buffer / DC regenerator 104 to a sync stripper 126 which removes the sync signal from the composite video signal 102. After the sync signal is removed from the composite video signal, the sync signal is separated through the field sync playback subcircuit 128 into vertical components and through line sync filter 130 into horizontal components. The vertical and horizontal components of the sync signal are then input to the timing generator 132, where the sync signal input is processed, followed by the next four outputs: vertical drive (V-drive) component 134, horizontal drive (H-). Drive) component 136, a composite blanking component 138, and a horizontal back porch clamp component 140. The V-drive and H-drive component output signals are respectively fed to vertical and horizontal deflection amplifiers 118,
Input to 119.

The V-drive output signal 134 is input to the vertical deflection amplifier 118 which controls the vertical deflection of the video signal output from the video amplifier 122 in the CRT 124. Preferably, the vertical deflection amplifier is a closed loop linear amplifier utilizing a power operational amplifier. Vertical deflection amplifier 118 preferably has a high vertical inductance of 1 megahertz or greater to minimize amplifier power requirements and eliminate the need for additional linear correction. The vertical deflection amplifier 118 is
In addition, display high voltage power supply 146, and CRT124
In conjunction with blanking system 150, which eliminates blanking at, is connected to a sweep stop system 148 that prevents one or more specific images from burning into the CRT display in the event of display 100 failure.

The H drive output 136 is then fed to the horizontal deflection amplifier.
Input to 119. Amplifier 119 is preferably an efficient low power resonant amplifier system. Horizontal deflection amplifier 11
The 9 sweep is not generated from a display high voltage power supply (HVPS), as is done in conventional commercial television equipment. Rather, the horizontal deflection amplifier 119 is a separate amplifier that can be adjusted to suit a particular application. Further, the amplifier 119 is set to H- by inserting the correction waveform.
Corrects for the non-linearity of the sweep introduced into the drive signal. As in the vertical deflection amplifier, the horizontal deflection amplifier 119 is coupled to both the high voltage power supply 146 and the blanking system 150 that prevents images from being burned to the CRT in the event of a display failure, a sweep stop system 148.
Is combined with

After each video line has been projected on the CRT grid screen, a composite blank output signal 138 to a blanking system 150 of the type well known to those skilled in the art to ensure blanking of the CRT grid screen 125. Is entered. Composite blank signal 13
8 is exactly synchronized at the beginning and end of the video period to prevent line overlap on the CRT. Further, the H back porch clamp output 140 is input to the video buffer / DC regenerator 104 and used in the DC regenerative correction as described above.

The operation of the aspect ratio control device of the present invention will now be described with reference to FIGS. To operate the display 100 in the normal RS-170 television video output mode exhibiting a 4: 3 aspect ratio, the aspect ratio switch 116 is switched to the first position, thereby changing the resistance of the potentiometers 120, 121 to the first. Adjust to the preset level of. RS-170 at CRT124
In order to meet the requirements of television signal output, these first set levels are horizontal and vertical deflection amplifiers 118,11.
Adjust the gain level of 9. Referring to FIG. 9, the aspect ratio of 4: 3 for normal TV video is 16
It is indicated by 0. Such a normal aspect ratio is desirable when using the display to display taped battlefield performance video playback, video instructions, or video from a standard visual camera.

Alternatively, it is desirable for the display to have a wider azimuthal field of view to obtain greater situational awareness if used for target scene detection and localization in thermal imaging applications. Therefore, when the aspect ratio switch 116 is switched to the second position, the resistance value of the potentiometer 120,121 is adjusted to the second set level. Correspondingly, the gain level of the amplifier is adjusted to the second set level, thereby changing the electron beam transfer characteristics of amplifier 118, 119. The output video signal is then, as indicated by reference numeral 162 in FIG.
The aspect ratio can be switched to 2.4: 1. Therefore,
Since the two displays are combined into a single display 100, there are two for normal TV video and thermal imaging equipment.
Eliminates the need for two separate displays.

From reading the above detailed description, it will be appreciated that the various aspect ratio display configurations of the present invention do not require the placement of separate TV video and thermal image displays in a thermal image system. The display of the present invention is an RS for normal video applications.
It is possible to produce a video output with either a 4: 3 aspect ratio of -170 or a 2.4: 1 aspect ratio which gives system operators greater situational awareness in thermal imaging system applications, while in any application Also provides a video signal output on a CRT with minimal blur.

Various other advantages of the invention will be apparent to those skilled in the art upon reading the above text and drawings in conjunction with the claims.

[Brief description of the drawings]

FIG. 1 is a perspective view of a LAV-25 light armored vehicle embodying the present invention.

FIG. 2 is a perspective view of a thermal imaging system provided with a preferred embodiment of the present invention.

3 is a partially exploded view of the thermal imaging system shown in FIG.

4 is a front view of a detector element array provided in the thermal imaging system shown in FIG.

FIG. 5 is a schematic block diagram of the thermal imaging system of the present invention.

FIG. 6 is a schematic block diagram of system electronics of a thermal imaging system of the present invention.

FIG. 7 is a schematic block diagram of system electronics of the thermal imaging system of the present invention.

FIG. 8 is a schematic block diagram of an electronic device used to configure a video display according to a preferred embodiment of the present invention.

9 shows a switchable aspect ratio of the display shown in FIG.

[Procedure amendment]

[Submission date] December 20, 1996

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Name of invention

[Correction method] Change

[Correction contents]

Aspect ratio feature for a display with RS-170 timing

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Internal reference number FI Technical indication location H04N 5/68 H04N 5/68 Z (72) Inventor Christopher S. Johns United States, California 90066, Los Angeles, Kensington Road No. 7 4450 (72) Inventor Jeffrey E. Ore, USA 90808, Long Beach, Lily Avenue 3490 (72) Inventor Donald O. Hayes United States, California 92056, Oceanside, Alameda Drive 4924 (72) Inventor Kent Siebold, California, USA 92084, Vista, Hardel Lane 711

Claims (7)

[Claims] 1. A video signal processing circuit in a thermal imaging system including a display, comprising one or more amplifiers for amplifying a video signal representation of a detected target scene, the amplifiers being adjusted to a first gain level. A signal conditioning device for producing a first video signal and adjusting the video amplifier between the first and second gain levels to produce a second video signal when adjusted to a second gain level; A switch for switching the signal conditioner between the first and second gain levels, the second video signal having an associated aspect ratio that is azimuthally wider than the first video signal. Video signal processing circuit having. 2. The video signal processing according to claim 1, wherein the first video signal has an aspect ratio of 4: 3 and the second video signal has an aspect ratio of 2.4: 1. circuit. 3. The video signal processing circuit according to claim 1, wherein the signal conditioning device includes a processor. 4. The signal conditioning device further comprises a potentiometer coupled to one or more of the amplifiers.
The described video signal processing circuit. 5. The one or more amplifiers of claim 1, comprising a first amplifier for amplifying a horizontal component of the video signal and a second amplifier for amplifying a vertical component of the video signal. Video signal processing circuit. 6. The signal conditioner adjusts the first and second amplifiers between the first and second gain levels, thereby adjusting the first and second video signals. Item 5. The video signal processing circuit according to item 5. 7. The signal conditioning device comprises a first potentiometer coupled to the first amplifier and the second potentiometer coupled to the second amplifier. The described video signal processing circuit.