JPH0918533A - Agc circuit for burst signal - Google Patents

Abstract

PURPOSE: To secure the dynamic range of ADD-converted data by actualizing both the quickening of AGC loop response at the time of burst signal arrival and the reduction of in-loop noise after the response. CONSTITUTION: A burst modulated signal is inputted to a 1st variable gain amplifier 1 to control the gain of the amplifier 1 through a detector 2 and a variable band low-pass filter 3. The output of a 2nd variable gain amplifier 4 is passed through a semisynchronous demodulator 5 and a decoder 9 to become decoded data. A frame detector 10 detects frames and a data end pattern. The demodulated signal is inputted to a subtracter 15 through squaring units 11 and 12 and an adder 13. A burst detector 16 monitors the output of the adder 13 and outputs a burst detection signal when a certain value is exceeded. A 2nd switch 18 selects a reference value unless a burst and frames are detected and the output of the subtracter 15 when they are detected, and applies it to an amplifier 4. A 1st switch 19 controls the band of the filter 3 according to the states of the burst detection and frame detection.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention speeds up the AGC response from the signal stand-by time to the signal input start time to ensure the signal detection and demodulation start, and at the same time the AG signal during signal reception.
The present invention relates to an AGC circuit for burst signals that narrows the C loop band to reduce the influence of noise.

[0002]

2. Description of the Related Art A receiver used in TDMA or the like requires a demodulator that reliably receives a burst modulation signal. However, the reception level changes due to the change in the state of the transmission path. In that case, the input signal level of the carrier regeneration circuit or the clock regeneration circuit of the demodulator fluctuates, stable demodulation operation cannot be performed, and AGC operation for keeping the amplitude constant is required.

(Prior Art 1) FIG. 4 shows a configuration of a conventional technology. The variable gain amplifier 101 receives the modulation signal as an input, and the detection circuit 102 detects the output signal. The bandwidth of the low-pass filter 103 is switched by the bandwidth setting signal, the output signal of the detection circuit 102 is band-limited, and the gain of the variable gain amplifier 101 is controlled. Further, the output signal of the variable gain amplifier 101 is converted into a quasi-synchronous demodulation circuit 104.
Is converted into a baseband signal, the A / D conversion circuits 105 and 106 convert the signal into a digital signal, and the demodulator 1
07 demodulates. In such an AGC circuit, the response speed of the loop becomes faster when the bandwidth of the low pass filter is widened, and becomes slower when the bandwidth is narrowed.

(Prior Art 2) FIG.
The configuration of an AGC circuit disclosed as a conventional example of Japanese Patent No. 954 is shown. The quasi-synchronous demodulation circuit 21 receives the burst modulated wave signal (IF input signal) transmitted intermittently, and quasi-synchronously demodulates it with an orthogonal carrier signal substantially equal to the carrier frequency to convert it into two series of analog signals. . A / D
The conversion circuits 22 and 23 convert the output signal from the quasi-synchronous demodulation circuit 21 into a digital data string of a plurality of bits. A /
The digital data strings from the D conversion circuits 22 and 23 are input to the multiplication circuit 24 and then to the digital processing type demodulator 31 and also to the squaring circuits 25 and 26. The output of the multiplier circuit 24 determines the power of each data string to generate an output that is the square of the received signal. The power of each data string from the multiplication circuit 24 is added by the addition circuit 27 to obtain the power of the received signal output from the multiplication circuit 24. The subtraction circuit 28 which receives the output received power of the addition circuit 27
The difference from the reference value 1 of the power that the loop is trying to set is calculated. The difference obtained by the subtraction circuit 28 is multiplied by a fixed constant k in a multiplication circuit 29 that determines the gain of the loop, and then input to the integration circuit 30. The integrating circuit 30 integrates the output of the multiplying circuit 29 to drive the multiplying circuit 24 to drive the subtracting circuit 2
The AGC loop is configured so that the output of 8 becomes zero.

(Prior Art 3) Japanese Patent Laid-Open No. 6-216954
The invention of the publication is shown in FIG. The output signal of the quasi-synchronous demodulation circuit 21 that shifts the frequency of the burst modulation signal to the baseband signal is converted into a digital signal by the A / D conversion circuits 22 and 23. The multiplication circuit 24 receives these digital signals and the output signal of the integration circuit 30, and performs multiplication operation. The adding circuit 27 outputs the output signal of the multiplying circuit 24 to the squaring circuit 2
Receive via 5, 26. The subtraction circuit 28 outputs the difference between the added value and the reference value 1. The area determination circuit 33 determines the level output by the subtraction circuit 28 into three types of areas divided by the reference value 2 and the reference value 3. Area determination circuit 33
The selection circuit 32 that receives the signal from the
Select 1, K2, K3. The integration circuit 30 integrates the output signal of the multiplication circuit 29 that multiplies the output signal of the selection circuit 32 and the output signal of the subtraction circuit 28, and drives the multiplication circuit 24.

[0006]

In the burst signal AGC circuit as in the prior art 1, the loop response speed is maintained in advance or by continuing the signal by switching the bandwidth of the low-pass filter with the bandwidth setting signal. You can switch while you are doing it. However, in response to the burst signal, it is not possible to perform control adapted to the burst signal such that the loop response is made fast immediately after the arrival of the signal and the loop band is narrowed quickly after tracking to reduce the noise in the loop.

Burst signal AGC as in the prior art 2
In the circuit, the response speed of the AGC loop is determined by the loop gain k. The larger k is, the faster the response speed of the loop is. The smaller k is, the slower the response speed is. In order to deal with the burst signal in the conventional technique 2, it is generally necessary to increase the response speed of the loop. However, increasing the loop response is equivalent to increasing the loop band. The amplitude variation component of the signal and the noise component superimposed on the reception signal also pass through the loop and are added to the reception signal by the multiplication circuit, so that the signal quality also deteriorates. For this reason, there is a limit to how fast burst signals can be handled.

A method of performing gain control after A / D conversion in the burst signal AGC circuit of the prior art 3 invented to solve the problem of the prior art 2 is A /
Compared with the method performed before D conversion, it seems to be equivalent, but for example, when the level of the modulation signal is small, A /
The dynamic range of D-converted data may be reduced, and demodulation performance may deteriorate.

The present invention has been made in view of the above circumstances, and achieves both high speed AGC loop response when a burst signal arrives and reduction of loop noise after the response, and A / D conversion. An object of the present invention is to provide an AGC circuit for burst signals that can secure a dynamic range of data.

[0010]

In order to solve the above problems, the burst signal AGC circuit according to claim 1 has the following configurations 1) to 11). 1) A first variable gain amplifier that inputs a burst modulation signal that is a modulation signal that comes intermittently and that amplifies the burst modulation signal; 2) A detector that detects the output signal of the first variable gain amplifier 3) A variable band low-pass filter that receives the output signal of the detector as an input and outputs a control signal to the first variable gain amplifier, and 4) an input signal that is the output signal of the first variable gain amplifier as a baseband signal. Quasi-synchronous demodulator that performs frequency conversion, 5) A / D converter that converts the output signal of the quasi-synchronous demodulator into a digital signal, and 6) Synchronous demodulation that receives the output signal of the A / D converter as input. 7) Decoder which outputs the output signal of the synchronous demodulator as input and outputs decoded data 8) Squarer which squares the output signal of the synchronous demodulator 9) Input the output signal of the squarer To detect the arrival of burst signals. 10) a frame detector for detecting a frame and a data end pattern from the decoded data output from the decoder, and 11) the variable band low-pass filter with the output signals of the burst detector and the frame detector as inputs. And a first switch for switching the bandwidth of the.

The burst signal AGC circuit according to a second aspect of the present invention has a configuration obtained by adding the following items to the configuration of the first aspect. A second variable gain amplifier is provided between the first variable gain amplifier and the quasi-synchronous demodulator.
Variable gain amplifier and a subtracter that takes the output signal of the squarer as the input and finds the difference from the preset reference value, and the output signal of the burst detector and frame detector as the input and A second switch for selecting any one of the output signals to control the second variable gain amplifier.

[0012]

According to the burst signal AGC circuit configured as described above, the AGC loop is controlled according to the burst and frame detection states, so that an optimum loop response and reduction of noise in the loop are always realized.

[0013]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a waveform diagram for explaining the operation of the present invention. FIG. 3 is a data format showing an example of the burst modulation signal.

(Structure) The received burst modulated signal is the first
Of the variable gain amplifier 1 and one of its outputs controls the gain of the first variable gain amplifier 1 via the detector 2 and the variable band low-pass filter 3. The output of the first variable gain amplifier 1 is also input to the second variable gain amplifier 4, and its output is frequency-converted to baseband by the quasi-synchronous demodulator 5 and is synchronized through the A / D converters 6 and 7. It is input to the demodulator 8. One of the demodulated signals by the synchronous demodulator 8 becomes the decoded data by the decoder 9, from which the frame detector 10
Detects the frame and end-of-data pattern. The other output of the synchronous demodulator 8 is the squarer 11, the squarer 12, and the adder 1.
3, input to the subtractor 15 via the low-pass filter 14. The subtractor 15 subtracts the output value of the low pass filter 14 by the reference value. The burst detector 16 monitors the output of the adder 13 that has passed through the low-pass filter 17, and outputs a burst detection signal when it exceeds a certain value.

The second switch 18 selects a reference value when neither burst nor frame is detected, and selects the output of the subtractor 15 in accordance with the detected states of burst and frame.
It is applied to the control input of the second variable gain amplifier 4. The first switch 19 controls the band of the variable band low-pass filter 3 according to the states of burst detection and frame detection.

(Explanation of Operation) The operation of this embodiment when receiving a burst modulation signal as shown in FIGS. 2 and 3, for example, will be described. The input before the arrival of the burst is only the transmission line noise, the input of the burst detector 16 is small, and the burst detection signal is not output. The output of the frame detector 10 also indicates that no frame is detected. At this time, the AGC loop band configured around the first variable gain amplifier 1 is selected as a wide band, and the output of the second switch 18 is selected as the reference value.

Since the burst modulated signal arrives and is not modulated in the carrier recovery section of FIG. 2, the squarers 11 and 12 are used.
The demodulated signal that is the input of is a constant value. Therefore, the input of the burst detector 16 increases immediately after the arrival of the burst and exceeds the predetermined threshold value to output the burst detection signal. The first switch 19 narrows the bandwidth of the variable band low pass filter 3 by inputting the burst detection signal.

The second switching unit 18 subtracts the input signal from the reference value from the reference value with a slight delay after the burst detection signal is input.
Switch to the output of 5 to form another AGC loop. This is to perform the switching after the influence of the switching of the first switching device 19 is converged. The switches hold the switched state at least for a time t corresponding to the start of the burst to the first frame. After that, while the frame signal is being detected, that state is maintained.

At the end of the burst, the frame detector 10 detects the data end pattern, and the output of the frame detection signal is not detected. Along with this, the first switch 19 makes the bandwidth of the variable band low-pass filter 3 wide. After a short delay, the second switch 18 switches the input to the reference value side to eliminate the AGC loop.

[0020]

As described above, according to the burst signal AGC circuit of the present invention, the optimum loop response is always realized by controlling the AGC loop according to the detected states of the burst and the frame.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is a waveform chart for explaining the operation of the present invention.

FIG. 3 is a data format showing an example of a burst modulation signal.

FIG. 4 is a block diagram showing a conventional technique 1.

FIG. 5 is a block diagram showing a second conventional technique.

FIG. 6 is a block diagram showing Conventional Technique 3.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... 1st variable gain amplifier, 2 ... Detector, 3 ... Variable band low-pass filter, 4 ... 2nd variable gain amplifier, 5 ... Quasi-synchronous demodulator, 6 ... A / D converter, 7 ... A / D converter, 8
... Synchronous demodulator, 9 ... Decoder, 10 ... Frame detector, 1
1 ... Squarer, 12 ... Squarer, 13 ... Adder, 14 ... Low-pass filter, 15 ... Subtractor, 16 ... Burst detector,
17 ... Low-pass filter, 17 ... Second switching device, 19 ...
First switch.

Claims (2)

[Claims] 1. A first variable gain amplifier (1) for inputting a burst modulation signal which is a modulation signal which arrives intermittently and amplifying the burst modulation signal, and an output signal of the first variable gain amplifier. A detector (2) for detecting, a variable band low-pass filter (3) which receives an output signal of the detector as an input and outputs a control signal to the first variable gain amplifier, and the first
Quasi-synchronous demodulator (5) for converting the output signal of the variable gain amplifier of the above into a baseband signal and an A / D converter (6, 7) for converting the output signal of the quasi-synchronous demodulator into a digital signal A synchronous demodulator (8) that receives the output signal of the A / D converter and performs synchronous demodulation; and a decoder (9) that receives the output signal of the synchronous demodulator and outputs decoded data.
A squarer (11, 1) that squares the output signal of the synchronous demodulator
2), a burst detector (16) that receives the output signal of the squarer and detects the arrival of a burst signal, and a frame detector (16) that detects a frame and a data end pattern from the decoded data output by the decoder. An AGC circuit for a burst signal, comprising: 10) and a first switch (19) for switching the bandwidth of the variable band low-pass filter using the output signals of the burst detector and the frame detector as inputs. 2. A second variable gain amplifier (4) is provided between the first variable gain amplifier and a quasi-synchronous demodulator, and the second variable gain amplifier (4) is provided.
Either a subtractor (15) that takes the output signal of the multiplier as an input and obtains the difference from a preset reference value, and a reference value or the output signal of the subtractor that receives the output signals of the burst detector and the frame detector as input 2. A burst signal AGC circuit according to claim 1, further comprising a second switch (18) for selecting the second variable gain amplifier to control the second variable gain amplifier.