JPH09180370A - Digital video tape recorder and synchronization control method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a digital video tape recorder capable of recording only an aural signal easily and correctly. SOLUTION: A synchronization detecting means 8 detects synchronizing signals SH1 , SV1 from a input video signal. A reference generating means 9 generates reference signals SH2 , SV2 . A changeover means 10 changes over the synchronizing signals SH1 , SV1 and the reference signals SH2 , SV2 to output them. A control means 11 controls the changeover means 10 so as to change over the synchronizing signals SH1 , SV1 when the input video is present and the reference signals SH2 , SV2 when the input video signal is not present to output them. A synchronization generating means 12 generates a synchronizing signal R<d> V for signal processing based on the output signals RH, RV of the changeover means 10. A voice processing means 2 dizitizes an input aural signal based on the synchronizing signal R<d> V for signal processing and applies a signal processing to the obtained voice data. A video processing means 4 digitizes the input video signal based on the synchronizing signal R<d> V for signal processing and applies a signal processing to the obtained picture data. Recording means 5, 6, 7 record the voice data from the voice processing means 2 and the picture data from the video processing means 4 on a tape shaped recording medium.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital video tape recorder for recording image data obtained by digitizing an input video signal and audio data obtained by digitizing an input audio signal on a tape recording medium. The present invention also relates to a synchronization control method for generating a synchronization signal used in signal processing for an input video signal and an input audio signal in the digital video tape recorder.

[0002]

2. Description of the Related Art With the recent development of digital technology, for example, there is a video tape recorder using a digital system (hereinafter referred to as a digital VTR). The digital VTR is a video tape in which a video signal and an audio signal are digitized and recorded on a tape-shaped recording medium (hereinafter referred to as a video tape), and a digital video signal and an audio signal are recorded on a video tape. On the other hand, it is a device that performs a reproduction process.

[0003]

However, in the conventional digital VTR as described above, the signal processing for recording the input audio signal on the video tape is performed by the video signal input at the same time as the input audio signal, that is, the input audio signal. It was performed based on the vertical synchronizing signal of the input video signal corresponding to the signal. Therefore, the conventional digital VTR cannot record only the input audio signal on the video tape if the input video signal is not input at the same time as the input audio signal.

Further, in the case of recording only the input audio signal on the video tape, the conventional digital VTR obtains a vertical synchronizing signal from an arbitrary video signal and uses the vertical synchronizing signal to record only the input audio signal on the video tape. I had to record. That is, when it is desired to record only the input audio signal on the video tape, it is necessary to input an arbitrary video signal to the digital VTR simultaneously with the input of the audio signal to be recorded.

Therefore, the present invention has been made in view of the conventional circumstances as described above, and has the following objects.

That is, an object of the present invention is to provide a digital video tape recorder which can easily and accurately record only an audio signal.

Another object of the present invention is to provide a synchronization control method for a digital video tape recorder, which can easily and accurately record only an audio signal.

[0008]

In order to solve the above problems, a digital video tape recorder according to the present invention comprises a sync detecting means for detecting a sync signal from an input video signal and a reference generating means for generating a reference signal. Switching means for switching and outputting the synchronization signal from the synchronization detecting means and the reference signal from the reference generating means, the presence or absence of the input video signal is detected, and the switching operation of the switching means according to the detection result. Control means for controlling the input signal, a sync generating means for generating a sync signal for signal processing based on the output signal of the switching means, and a digitized input audio signal based on the sync signal from the sync generating means. Audio processing means for performing signal processing on the received audio data, and an image data obtained by digitizing the input video signal based on the synchronization signal from the synchronization generating means. Comprising an image processing means for performing signal processing, and recording means for recording image data on a tape-shaped recording medium from the audio data and the video processing means from the voice processing means. When the input video signal is present, the control means controls the switching means so as to switch to the sync signal from the sync detection means for output, and when the input video signal is not present, the reference from the reference generation means. The switching means is controlled so as to switch to a signal and output the signal.

In order to solve the above-mentioned problems, a synchronization control method for a digital video tape recorder according to the present invention comprises:
Signal processing is performed on the image data obtained by digitizing the input video signal based on the synchronization signal for signal processing, and on the audio data obtained by digitizing the input audio signal. A method for synchronizing control of a digital video tape recorder for recording the audio data and the image data, which have been subjected to the above, on a tape-shaped recording medium, wherein the presence or absence of the input video signal is detected, and when the input video signal is present, the input video signal is input. A synchronizing signal detected from the signal is used as the synchronizing signal for the signal processing, and when there is no input video signal, a reference signal inside the apparatus is used as the synchronizing signal for the signal processing.

[0010]

Embodiments of the present invention will be described below in detail with reference to the drawings.

The synchronization control method for a digital video tape recorder according to the present invention is carried out by a digital video tape recorder 100 as shown in FIG. 1, and the digital video tape recorder 100 applies the digital video tape recorder according to the present invention. It is a thing.

This digital video tape recorder (hereinafter referred to as a digital VTR) 100 has an input terminal I.
_An analog / digital (A /
D) The converter 1, the audio digital signal processing circuit 2 to which the output of the A / D converter 1 is supplied, and the video signal input via the input terminal I _in12 (hereinafter referred to as the input video signal). A / D converter 3 to which is supplied, and A / D converter 3
Digital signal processing circuit 4 for video to which the output of
A recording signal modulation circuit 5 to which the outputs of the audio digital signal processing circuit 2 and the video digital signal processing circuit 4 are supplied, an amplifier 6 to which the output of the recording signal modulation circuit 5 is supplied, and an output of the amplifier 6. And a recording head 7 to which is supplied.

Further, the digital VTR 100 includes a sync detection circuit 8 to which an input video signal is supplied, a reference signal generation circuit 9, a no-signal detection circuit 11 to which an output of the sync detection circuit 8 is supplied, and a no-signal detection circuit. A switching circuit 10 that switches between the output of the synchronization detection circuit 8 and the output of the reference signal generation circuit 9 based on the output result of 11 and a phase-locked loop (hereinafter, referred to as PLL: Phase Lock) to which the output of the switching circuit 10 is supplied.
Called ed Loop. ) Circuit 12.

The switching circuit 10 comprises a switch SW1 and a switch SW2, and a switch SW1 and a switch SW2.
Are switched between the output of the synchronization detection circuit 8 and the output of the reference signal generation circuit 9 based on the output result of the no-signal detection circuit 11.

The PLL circuit 12 is a baseband system PLL.
A circuit 121 and a compression system PLL circuit 122 are provided. The output of the switch SW1 is supplied to the baseband system PLL circuit 121, and the switch S is provided to the compression system PLL 122.
The output of W2 is supplied.

The digital signal processing circuit 4 comprises a baseband digital signal processing circuit 41 and a compression digital signal processing circuit 42. The baseband digital signal processing circuit 41 includes a switch SW2 and a baseband PLL circuit. The respective outputs of the compression system PLL circuit 12 are supplied to the compression system digital signal processing circuit 42.
2 outputs are supplied. The output of the compression system PLL circuit 122 is also supplied to the audio digital signal processing circuit 2, and the output of the compression system digital signal processing circuit 42 is supplied to the recording signal modulation circuit 5.

Hereinafter, the digital VTR 10 as described above will be described.
0 will be specifically described.

First, the A / D converter 1 digitizes the input voice signal and supplies the digitized voice signal as voice data to the voice digital signal processing circuit 2.
The A / D converter 3 digitizes the input video signal and supplies the digitized video signal to the baseband digital signal processing circuit 41 as image data.

At the same time, the sync detection circuit 8 detects the vertical sync signal S _V1 and the horizontal sync signal S _H1 from the input video signal, supplies the detected horizontal sync signal S _H1 to the switch SW1, and detects the detected vertical sync signal S _H1. The sync signal S _V1 is switched to the switch S
It is supplied to W2 and the no-signal detection circuit 11, respectively.

The reference signal generation circuit 9 also generates a vertical synchronization reference signal S _V2 and a horizontal synchronization reference signal S _H2 , supplies the generated vertical synchronization reference signal S _V2 to the switch SW2, and generates the same. The horizontal synchronizing reference signal S _H2 is supplied to the switch SW1.

At this time, the no-signal detecting circuit 11 detects the presence or absence of the input video signal based on the vertical synchronizing signal S _V1 from the synchronizing detecting circuit 8 and sets the no-signal flag _FLG corresponding to the detection result. It is generated and supplied to the switches SW1 and SW2, respectively.

A detailed description of the no-signal detection circuit 11 will be given later.

When the input video signal is present, the switch SW1 is switched to the sync detection circuit 8 side by the no-signal flag _FLG from the no-signal detection circuit 11, and the horizontal sync signal S from the sync detection circuit 8 is switched. _H1 is supplied to the baseband PLL circuit 121 as a horizontal synchronization reference signal R _H , and when there is no input video signal, the reference signal generation circuit 9 is switched to for horizontal synchronization from the reference signal generation circuit 9. The reference signal S _H2 is supplied to the baseband PLL circuit 121 as a horizontal synchronization reference signal R _H.

The switch SW2 is switched to the sync detection circuit 8 side by the no-signal flag _FLG from the no-signal detection circuit 11 when there is an input video signal, and the vertical synchronization from the sync detection circuit 8 is performed. The signal S _V1 is supplied to the compression system PLL circuit 122 as a reference signal R _V for vertical synchronization,
When there is no input video signal, it is switched to the side of the reference signal generation circuit 9 and the vertical synchronization reference signal S _V2 from the reference signal generation circuit 9 is used as the vertical synchronization reference signal R _V for the compression PLL circuit 122 and the base. The signals are supplied to the band digital signal processing circuit 41.

The baseband system PLL circuit 121 and the compression system PLL circuit 122 have the same configuration. Therefore, only the compression system PLL circuit 122 will be specifically described below, and the baseband system PLL circuit 12 will be described.
Detailed description of 1 will be omitted.

As shown in FIG. 2, the compression system PLL 122 includes a phase comparator 1 to which a vertical synchronization reference signal R _V from the switch SW2 is supplied via an input terminal I _in2.
22a, a low-pass filter (hereinafter referred to as LPF) 122b to which the output of the phase comparator 122a is supplied, and a voltage controlled oscillator (hereinafter referred to as VCO: voltage controlled o) to which the output of the LPF 122b is supplied.
It's called a scillator. ) 122c and a frequency divider 122d to which the output of the VCO 122c is supplied. The output of the VCO 122c is output via the output terminal I _out21 , and the output of the frequency divider 122d is the output terminal I out.
It is output via _out22 and fed back to the phase comparator 122a.

In the compression PLL circuit 122 as described above, the phase comparator 122a includes a frequency divider 122 and the phase of the vertical synchronization reference signal R _V from the switch SW2.
The output signal R ^d _V from d described later is compared with the phase, and the error signal obtained by the phase comparison is supplied to the VCO 122c via the LPF 122b.

[0028] VCO122c a frequency based on the error signal via the LPFs 122, for example, with generating a clock signal C ₂ of 18 MHz, and outputs the generated clock signal C ₂ through the output terminal I _out21, divider 122d.

The frequency divider 122d divides the clock signal C ₂ from the VCO 122c in a predetermined cycle to generate the vertical synchronizing reference signal R ^d _V which is the above-mentioned output signal R ^d _V , and the generated vertical synchronizing signal. Reference signal R ^d _V is output terminal I _out22
And is supplied to the phase comparator 122a.

Therefore, the phase comparator 122a receives the input vertical synchronizing reference signal R _V and the VCO 12
A phase comparison is performed with the signal (= R ^d _V ) obtained by dividing the output (= C ₂ ) of 2c. And the phase comparator 1
The frequency of the clock signal C ₂ generated by the VCO 122c is controlled by the error signal obtained at 22a.

As described above, the compression system PLL circuit 12
2 follows the frequency of the vertical synchronization reference signal R _V from the switch SW2 and generates a clock signal C ₂ and a vertical synchronization reference signal R ^d _V. This compression system PLL circuit 12
The clock signal C ₂ and the vertical synchronization reference signal R ^d _V generated in 2 are supplied to the compression digital signal processing circuit 42 and the audio digital signal processing circuit 2, respectively.

Further, the baseband PLL circuit 121
In the same way as the compression PLL circuit 122 described above, follows the frequency of the horizontal synchronization reference signal R _H from the switch SW1 to generate a clock signal C _{1 of} 13.5 MHz, for example, and generate the clock signal. C ₁ is supplied to the baseband digital signal processing circuit 41.

Therefore, the compression system digital signal processing circuit 42 is supplied with the clock signal C ₂ and the vertical synchronization reference signal R ^d _V from the compression system PLL circuit 122, and the baseband system digital signal processing circuit 41 is supplied with the base signal. The clock signal C ₁ from the band PLL circuit 121 and the vertical synchronization reference signal R _V from the switch SW2 are supplied.

Baseband digital signal processing circuit 4
1 is based on the vertical synchronization reference signal S _V from the switch SW2 and the clock signal C ₁ from the baseband system PLL circuit 121, with respect to the baseband image data from the A / D converter 3. For example, signal processing such as clipping of valid data and processing of various signals in the vertical blanking period is performed. Then, the baseband digital signal processing circuit 41 supplies the image data subjected to the above-mentioned signal processing to the compression digital signal processing circuit 42.

The compression system digital signal processing circuit 42 compresses the image data from the baseband system digital signal processing circuit 41 into a compression code based on the clock signal C ₂ from the compression system PLL circuit 122 and the vertical synchronization reference signal R ^d _V. Apply processing such as conversion. The compression system digital signal processing circuit 42
Supplies the image data that has been subjected to processing such as compression coding to the recording signal modulation circuit 5.

On the other hand, the audio digital signal processing circuit 2
On the basis of the clock signal C ₂ from the compression system PLL circuit 122 and the vertical synchronization reference signal R ^d _V , the audio data from the A / D converter 1 is subjected to processing such as compression encoding. Then, the audio digital signal processing circuit 2 supplies the recording signal modulation circuit 5 with the audio data that has been subjected to processing such as compression encoding.

The recording signal modulating circuit 5 modulates the audio data from the audio digital signal processing circuit 2 and the image data from the compression system digital signal processing circuit 42 to generate audio and image recording signals. To do. Then, the recording signal modulation circuit 5 supplies the generated audio and image recording signals to the amplifier 6.

The amplifier 6 amplifies the amplitude of the recording signal of the sound and image from the recording signal modulation circuit 5 and supplies it to the recording head 7.

The recording head 7 records the audio and image recording signals from the amplifier 6 on a video tape (not shown) in a predetermined format.

As described above, in the digital VTR 100, when the video signal and the audio signal are simultaneously input,
The vertical synchronization signal S _V1 detected by the synchronization detection circuit 8 and the clock signals C ₁ , C ₂ and vertical generated by using the horizontal synchronization signal S _H1 and the vertical synchronization signal S _V1 detected by the synchronization detection circuit 8 as references. Digital signal processing for audio signals and digital signal processing for video signals are performed using the synchronization reference signal R ^d _V.

Further, in the digital VTR 100, when no video signal is input and only an audio signal is input,
Reference signal S for vertical synchronization generated by the reference signal generation circuit 9
_V2, and the respective clock signals C ₁ and C ₂ and the vertical synchronization reference signal R ^d _V generated using the vertical synchronization reference signal S _V2 and the horizontal synchronization reference signal S _H2 generated by the reference signal generation circuit 9 as references. Is used to perform digital signal processing for audio signals and digital signal processing for video signals. However, in this case, since the video signal is not input, only the digital signal processing is performed on the audio signal. Therefore, only the audio data from the audio digital signal processing circuit 2 is supplied to the recording signal modulation circuit 5, and only the audio data is recorded on the video tape (not shown).

The no-signal detection circuit 11 for detecting the presence / absence of the input video signal as described above will be specifically described below.

As shown in FIG. 3, the no-signal detecting circuit 11 includes a frequency measuring circuit 111 to which the vertical synchronizing signal S _V1 detected by the synchronizing detecting circuit 8 is supplied and a frequency measuring circuit 1.
11 is supplied with the no-signal flag generation circuit 112, and the no-signal flag generation circuit 112 supplies the above-mentioned no-signal flag _FLG to the switches SW1 and SW2, respectively. Has been done.

Here, FIG. 4 shows the input video signal S input to the synchronization detection circuit 8, the vertical synchronization signal S _V1 output from the synchronization detection circuit 8 to the frequency measurement circuit 111, and the no-signal flag from the frequency measurement circuit 111. is a diagram showing the waveform of the no-signal flag F _LG output from OK / NG flag F _{O / N,} and no signal flag generator 112 described later are output to the generation circuit 112.

The operation of the no-signal detection circuit 11 will be described below with reference to FIGS. 3 and 4.

First, the input video signal S input through the input terminal I _in12 is supplied to the synchronization detection circuit 8. The synchronization detection circuit 8 detects the vertical synchronization signal S _V1 from the input video signal S and supplies the detected vertical synchronization signal (hereinafter also referred to as vertical synchronization pulse) S _V1 to the frequency measurement circuit 111.

The frequency measuring circuit 111 includes a synchronization detecting circuit 8
The frequency of the vertical synchronizing pulse S _V1 from is measured, and if the measured value is within a predetermined range described later, an OK / NG flag F _{O / N} indicating normal (OK) is generated, and the measured value is If it is not within a predetermined range described later, O indicating an abnormality (NG)
The K / NG flag F _{O / N} is generated, and the generated OK / NG flag F _{O / N} is supplied to the no-signal flag generation circuit 112.

Regarding the above-mentioned predetermined range, for example, when the input video signal S is an NTSC system signal,
The predetermined range is set to “59.94 Hz ± 10%”, and when the input video signal S is a PAL system signal, the predetermined range is set to “50 Hz ± 10%”.

The no-signal flag generation circuit 112 monitors the OK / NG flag F _{O / N} from the frequency measurement circuit 111,
When the OK / NG flag F _{O / N} indicating abnormality (NG) is continuously supplied n times, that is, when the frequency of the vertical synchronizing pulse S _V1 is out of the above-described predetermined range for n frame periods. , The no-signal flag _FLG is set to "ON (High)", and the OK / NG flag _{FO / N} indicating normal (OK) is set to m.
In the case where the signal is continuously supplied once, that is, when the frequency of the vertical synchronizing pulse S _V1 is within the predetermined range described above for the m frame period, the no-signal flag _{FLG is set} to “OFF (LO
W) ”. As a result, hysteresis is provided in the detection of the vertical synchronizing signal S _V1 of the input video signal S, and the audio digital signal processing circuit 2, the video baseband system digital signal processing circuit 41, and the compression system digital signal processing circuit 42 are provided. It is designed to prevent each malfunction in.

As described above, the no-signal flag generation circuit 112 turns "ON" depending on the presence or absence of the input video signal.
No signal flag F _LG is set to, or generates no signal flag F _LG set to "OFF", the switches SW1 and SW2 are no signal flag F _LG of generated by the no-signal flag generator 112 The vertical sync signal S _V1 and the horizontal sync signal S _H1 detected by the sync detection circuit 8 based on the setting.
And the vertical synchronization reference signal S _V2 and the horizontal synchronization reference signal S _H2 generated by the reference signal generation circuit 9 are switched and output. Using the vertical synchronizing signal S _V1 and the horizontal synchronizing signal S _H1 or the vertical synchronizing reference signal S _V2 and the horizontal synchronizing reference signal S _H2 output from the switches SW1 and SW2, the audio digital signal processing circuit 2 and , An audio digital signal processing circuit 2 for generating a synchronization signal used in each signal processing of the video baseband digital signal processing circuit 41 and the compression digital signal processing circuit 42.
And a baseband digital signal processing circuit 4 for video
1 and the compression system digital signal processing circuit 42,
It can operate normally and stably. Therefore, if no video signal is input and only an audio signal is input, or if you want to record only the audio signal on a video tape (not shown), you do not need any video signal and only the audio signal is input. Can be recorded accurately on video tape.

Further, FIG. 5 shows the vertical sync signal S _V1 output from the sync detection circuit 8 to the no-signal detection circuit 11 and the switch SW2 in the digital VTR 100 shown in FIG. 1, and the reference signal generation circuit 9 to the switch. A reference signal S _V2 for vertical synchronization output to SW2, a reference signal R _V for vertical synchronization output from the switch SW2 to the compression PLL circuit 122, and a compression digital signal processing circuit 42 and audio from the compression PLL circuit 122. Vertical sync reference signal R ^d _V output to the digital signal processing circuit 2 respectively
3 is a diagram showing the timing of each output pulse of FIG.

As shown in FIG. 5, the time t _c at which the input video signal changes from being present to being not present, that is, the no-signal flag _FLG generated by the above-mentioned no-signal detecting circuit 11 is changed from "OFF" to "ON". At time t _c when
The output of the vertical synchronization reference signal R ^d _V actually used in signal processing is locked to the vertical synchronization signal S _V1 detected from the above video signal when there is an input video signal, and the reference signal when there is no input video signal. The vertical synchronizing reference signal S _V2 generated by the generating circuit 9 is locked.

As a result, a stable vertical synchronizing reference signal R ^d _V can be supplied to the audio digital signal processing circuit 2 and the compression digital signal processing circuit 42 even when there is no input video signal. Therefore, if no video signal is input and only an audio signal is input, or if you want to record only the audio signal on a video tape (not shown), you do not need any video signal and only the audio signal is input. Can be recorded accurately on video tape.

[0054]

In the digital video tape recorder according to the present invention, the sync detecting means detects the sync signal from the input video signal. The reference generating means generates a reference signal.
The switching means switches and outputs the synchronization signal from the synchronization detecting means and the reference signal from the reference generating means. At this time, the control means detects the presence or absence of the input video signal, and when the input video signal is present, controls the switching means to switch to the synchronization signal from the synchronization detection means and output the synchronization signal,
When there is no input video signal, the switching means is controlled so as to switch to the reference signal from the reference generating means and output it. The synchronization generating means generates a synchronization signal for signal processing based on the output signal of the switching means. The audio processing means performs signal processing on the audio data obtained by digitizing the input audio signal based on the synchronization signal from the synchronization generating means. The video processing means performs signal processing on the image data obtained by digitizing the input video signal based on the synchronization signal from the synchronization generating means. The recording means records the audio data from the audio processing means and the image data from the video processing means on a tape-shaped recording medium. Thus, when no video signal is input and only an audio signal is input, or when it is desired to record only the audio signal on the tape-shaped recording medium, the synchronization generating means is based on the synchronization signal generated by the reference generating means. Moreover, since the synchronizing signal for signal processing can be generated, the audio processing means can perform accurate signal processing on the audio data obtained by digitizing the input audio signal without malfunction. Therefore, only the audio signal can be accurately recorded on the video tape without the need for any video signal.

In the sync control method for a digital video tape recorder according to the present invention, first, the presence or absence of an input video signal is detected, and if there is an input video signal, the sync signal detected from the input video signal is used for signal processing. When there is no input video signal, the reference signal inside the device is used as the synchronization signal for signal processing. Next, based on the signal processing synchronization signal, signal processing is performed on the image data obtained by digitizing the input video signal, and signal processing is performed on the audio data obtained by digitizing the input audio signal. Give. Then, the audio data and the image data subjected to the signal processing are recorded on the tape-shaped recording medium. As a result, if no video signal is input and only an audio signal is input, or if you want to record only the audio signal on a tape-shaped recording medium,
By using the reference signal inside the device as a synchronizing signal for signal processing, it is possible to perform accurate signal processing on the audio data obtained by digitizing the input audio signal. Therefore,
Only the audio signal can be accurately recorded on the video tape without the need for any video signal.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a digital video tape recorder according to the present invention.

FIG. 2 is a block diagram showing the internal configuration of a compression PLL circuit.

FIG. 3 is a block diagram showing an internal configuration of a no-signal detection circuit.

FIG. 4 is a diagram for explaining output waveforms inside the synchronization detection circuit and the no-signal detection circuit.

FIG. 5 is a diagram for explaining output pulse timing of each unit when an input video signal changes from being present to being not present.

[Explanation of symbols]

 1, 3 A / D converter 2 Digital signal processing circuit for audio 4 Digital signal processing circuit for video 5 Recording signal modulation circuit 6 Amplifier 7 Recording head 8 Synchro detection circuit 9 Reference signal generation circuit 10 Switching circuit 11 No signal detection circuit 12 PLL circuit 41 baseband digital signal processing circuit 42 compression digital signal processing circuit 100 digital video tape recorder 121 baseband PLL circuit 122 compression PLL circuit

Claims (2)

[Claims] 1. A synchronization detection means for detecting a synchronization signal from an input video signal, a reference generation means for generating a reference signal, a synchronization signal from the synchronization detection means and a reference signal from the reference generation means are switched and output. Switching means, a control means for detecting the presence or absence of the input video signal, and controlling the switching operation of the switching means according to the detection result, and a synchronizing signal for signal processing based on the output signal of the switching means. Synchronization generating means for generating, a voice processing means for performing signal processing on voice data obtained by digitizing an input voice signal based on the synchronization signal from the synchronization generating means, and a synchronization signal from the synchronization generating means. Based on the image data obtained by digitizing the input image signal, the image processing means for performing signal processing, the audio data from the audio processing means, and the image processing means. And a recording means for recording the image data on a tape-shaped recording medium, and the control means controls the switching means so as to switch and output the synchronization signal from the synchronization detection means when there is an input video signal. If there is no input video signal, the switching means is controlled so as to switch to the reference signal from the reference generating means and output it. 2. Signal processing is performed on image data obtained by digitizing an input video signal on the basis of a synchronization signal for signal processing, and signal processing is performed on audio data obtained by digitizing an input audio signal. A method for synchronizing control of a digital video tape recorder for recording audio data and image data which have been subjected to signal processing on a tape-shaped recording medium, wherein the presence or absence of the input video signal is detected, and the input video signal is present. In the above, the synchronization signal detected from the input video signal is used as the synchronization signal for the signal processing, and when there is no input video signal, the reference signal inside the device is used as the synchronization signal for the signal processing. Control method for digital video tape recorders.