JPH09171057A - Multiple test signal generator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a multiple test signal generator with high freedom, small circuit scale and short setting time. SOLUTION: As a multiple test signal can be obtained by adding signals having passed from sine wave to a delayer 4 and a modulator 7 with an adder 8, it is unnecessary to store the multiple test signals in a memory. Therefore, a circuit scale can be minimized. As long multiple test signals are not necessary to write in the memory, the setting time can be short. In an IC tester, shortening of test time can be realized. By changing the delay time of the delayer 4, the modulation degree of the modulator 7 and modulation method, different multiple test signals can be easily output and degree of freedom becomes high. Since TV sound multiplex signal and FM stereo signal can be output, the degree of freedom becomes high.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiple test signal used in an IC tester for performing a test by applying various multiple signals such as a TV voice multiple signal and an FM stereo signal to an object to be tested (IC, LSI, etc.). The present invention relates to a generator, which has a high degree of freedom, a small circuit scale, and a short setting time.

[0002]

2. Description of the Related Art In a multiple test signal generator used in a conventional IC tester, when a multiple signal is given to an object to be tested (IC, LSI, etc.), data of a test signal to be given to the object to be tested is stored in a memory in advance. . The data was taken out from this memory, converted into an analog signal by the D / A converter, and the signal was given to the test object.

In the case of such a configuration, there are the following problems. Since a plurality of multiple test signals are required for the test of the device under test, a memory is required for each multiple test signal given to the device under test. Since the multiple test signal must store data according to the highest frequency, a large capacity memory is required.

When the number of memories is reduced, a plurality of multiplex test signals are output, so that it is necessary to rewrite a large amount of data in the memories, which increases the set time. That is, the test time of the IC tester becomes long. It is not possible to instantaneously change a specific parameter such as the degree of modulation.

[0005]

It is an object of the present invention to pay attention to the fact that the same basic (sine wave) signal may be used for both the main signal and the sub-signal of the multiple test signal given to the device under test. It is to realize a multiple test signal generator having a high degree of freedom, a small circuit scale, and a short setting time by creating a multiple signal from.

[0006]

SUMMARY OF THE INVENTION The present invention is a multiplex test signal generator for generating multiplex test signals from a basic signal and applying the multiplex test signals to an object under test, which delay device receives the basic signal and delays it. And a modulator for inputting and modulating the basic signal, and an adder for adding the output from the delay device and the output from the modulator to generate a multiple test signal. It is a thing.

[0007]

In the present invention as described above, the delay device receives the basic signal and delays it. Then, the modulator inputs the same basic signal as the signal input to the delay device and performs modulation. The adder adds the output from the delay device and the output from the modulator,
Apply multiple test signals to the device under test.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 is a configuration diagram showing one embodiment of the present invention. In the figure, reference numeral 1 is a signal generator which is, for example, a direct digital synthesizer, and outputs a sine wave signal. Reference numeral 2 is a register in which the amplitude value of the main signal is set. A multiplier 3 multiplies the sine wave signal from the signal generator 1 by the amplitude value of the register 2. Reference numeral 4 denotes a delay device, which receives the signal from the multiplier 3 and delays it by a set delay amount. Reference numeral 5 is a register in which the amplitude value of the sub-signal is set. A multiplier 6 multiplies the sine wave signal from the signal generator 1 by the amplitude value of the register 5. 7 is a modulator, which inputs the signal from the multiplier 6,
Performs FM modulation, AM modulation, etc. 8 is an adder, and a delay device 4
And the output from the modulator 7 are added. An adder 9 adds a signal from the adder 8 and a signal from another signal generator (not shown) to generate a multiple test signal.

The operation of such a device will be described below for the case of generating a TV voice multiplexed signal and the case of generating an FM stereo signal. When generating a TV audio multiplex signal. FIG. 2 is a diagram showing a frequency spectrum of a TV audio multiplex signal. The signal generator 1 outputs a sine wave signal. The multiplier 3 multiplies this sine wave signal and the amplitude value of the register 2,
Main (L + R) signal. Then, the delay unit 4 delays the main signal from the multiplier 3 by 20 μs.

Further, the multiplier 6 multiplies the sine wave signal and the amplitude value of the register 5 to obtain a sub (LR) signal. The modulator 7 performs FM modulation on this sub-signal. And the adder 8
Adds the signal from the delay device 4 and the signal from the modulator 7. The adder 9 adds the added signal to a pilot signal generated from another signal generator and uses it as a test object (receiver). That is, the signal from the adder 9 is D / A converted, output through the low pass filter to the test object, and the test of the test object is performed.

When generating an FM stereo signal. FIG. 3 is a diagram showing a frequency spectrum of an FM stereo signal. The signal generator 1 outputs a sine wave signal. The multiplier 3 multiplies this sine wave signal and the amplitude value of the register 2,
Main (L + R) signal. Then, the delay unit 4 outputs the main signal from the multiplier 3 without delay. Further, the multiplier 6 multiplies the sine wave signal by the amplitude value of the register 5,
It is a sub (LR) signal. The modulator 7 performs double sideband amplitude modulation (AM-DSB-SC) of the suppressed carrier on this sub-signal.

Then, the adder 8 adds the signal from the delay device 4 and the signal from the modulator 7. The adder 9 adds the added signal to a pilot signal generated from another signal generator and uses it as a test object (receiver).
That is, the signal from the adder 9 is D / A converted and output to the test object through the low-pass filter, and the test of the test object is performed.

As described above, since the multiple test signal is obtained by adding the signal that has passed through the delay unit 4 and the modulator 7 from the sine wave signal by the adder 8, it is necessary to store the multiple test signal in the memory. Absent. Therefore, the circuit scale can be reduced. Further, since it is not necessary to write a long multiple test signal in the memory, the set time may be short. That is, in the IC tester, the test time can be shortened.

As the multiple test signal, only the main signal,
When it is desired to output only the sub-signal, the conventional memory storage configuration requires each test signal to be stored in the memory. However, in the embodiment, if the amplitude value is set to "0", the signal is not output, so that the amplitude can be changed easily and the degree of freedom is high. Similarly, if the delay amount of the delay device 4, the modulation degree of the modulator 7, and the modulation method are changed, different multiple test signals can be easily output, and the degree of freedom is high. Since the television audio multiplex signal and the FM stereo signal can be output, the degree of freedom is high.

In the embodiment, the processing is performed by the digital circuit, but all the configurations may be analog circuits. In this case, instead of setting the amplitude values in the registers 2 and 5, the analog signal is given to the adders 3 and 6. Further, in the embodiment, the configuration in which the sine wave signal is used as the basic signal is shown, but the basic signal may be a triangular wave or the like depending on the content of the test of the test object.

Although a configuration is shown in which the output and non-output of the main signal and the sub signal are controlled by changing the values of the registers 2 and 5, switch means are provided in the signal paths of the main signal and the sub signal, and the main signal is supplied. Alternatively, the configuration may be such that the output or non-output of the sub signal is selected.

[0017]

The present invention has the following effects. Since the multiple test signal is obtained by adding the signals that have passed through the delay device and the modulator from the basic signal by the adder, it is not necessary to store the multiple test signal in the memory. Therefore, the circuit scale can be reduced. Further, since it is not necessary to write a long multiple test signal in the memory, the set time may be short. Further, if the delay amount of the delay device, the modulation factor of the modulator, and the modulation method are changed, different multiplexed test signals can be easily output, and the flexibility is high. Since the television audio multiplex signal and the FM stereo signal can be output, the degree of freedom is high.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing one embodiment of the present invention.

FIG. 2 is a diagram showing a frequency spectrum of a TV audio multiplex signal.

FIG. 3 is a diagram showing a frequency spectrum of an FM stereo signal.

[Explanation of symbols]

 4 Delay device 7 Modulator 8 Adder

Claims (1)

[Claims] 1. A multiple test signal is generated from a basic signal,
A multiple test signal generator to be given to an object to be tested, wherein a delay device for inputting and delaying the basic signal, a modulator for inputting and modulating the basic signal, and an output from the delay device and modulation And the output from the vessel,
A multiple test signal generator comprising: an adder that generates multiple test signals.