JPH0916652A - Method and device for analyzing simulation result of circuit - Google Patents

Abstract

PURPOSE: To accurately and easily analyze the operation simulation results of various circuit devices such as a circuit for a communication equipment by comparing a conversion processing result corresponding to the simulation of data constituting a model with an output signal corresponding to a prescribed input signal and deciding and outputting whether both the signals agree with each other or not. CONSTITUTION: A program 3 simulates the function of a logic circuit 5 to be logically simulated and generates an expected value file 4. When logical simulation is executed, its logical simulation result is inputted to a memory in a waveform conversion circuit 6. A program 8 inputs the contents of a file 7 storing the logical simulation result and the contents of the file 4. Then the program decides whether the contents of the file 7 coincide with that of the file 4 or not, outputs the judged result to a file 9 and converts the contents of the file 7 into the format of a text file 2 corresponding to a communication interface model 1 to generate a text file 10.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to means for enabling accurate and easy analysis of operation simulation results of various circuit devices, and more particularly to the logic of a communication device circuit having a standardized communication interface. It relates to a popular means for analyzing simulation results.

[0002]

2. Description of the Related Art In recent years, communication interfaces provided in communication devices have been internationally standardized.

In recent years, with the increase in functionality and integration of logic circuits, analysis of the operation simulation result of the communication interface has required a lot of man-hours.

That is, conventionally, when analyzing the operation simulation result of the circuit device, the simulation result simulating the operation of the circuit device is stored, and the analyst analyzes it based on the stored contents. It has come.
Usually, the simulation result is displayed and output in a time chart or the like, so the analyst grasps the output state and analyzes the simulation result of the circuit device.

Further, as known examples related to these,
JP-A-5-266121, JP-A-6-16213
No. 0, JP-A-6-96153 and the like are mentioned.

[0006]

However, according to the above-described analysis method, the analysis efficiency is extremely poor when analyzing complicated and large amounts of simulation results,
There was a problem that erroneous analysis was frequently performed.

Therefore, an object of the present invention is to accurately and easily analyze the results of operation simulation of various circuit devices, especially the results of logic simulation of a communication equipment circuit having a communication interface. And to provide a means for easy analysis.

[0008]

In order to achieve the above object, there are the following means.

That is, the circuit element is drawn on the display screen,
A circuit device is designed by connecting circuit elements, a predetermined input signal is given to the circuit device, the function of the circuit device is simulated, an output signal corresponding to the predetermined input signal is obtained and stored, and the stored contents are examined. In the method of analyzing the operating state of a circuit device, the function of the circuit device is modeled by giving data in a predetermined format, and the conversion process corresponding to the simulation is performed on the data forming the model. Call for results. Then, the obtained conversion processing result and the output signal are compared with each other, and it is determined whether or not they match each other.

Further, a method of modeling the output signal into data having the predetermined format and outputting the data is also conceivable.

Further, as a device for achieving the purpose of the present invention, there are the following means.

That is, an input means for giving a command, a display means for displaying necessary information, a circuit element is arranged on the display screen of the display means by the given command, and circuit elements are connected and arranged. A circuit device that can be designed by applying a predetermined input signal to the circuit device to simulate the function of the circuit device and obtain an output signal with respect to the predetermined input signal; and a memory that stores the obtained result. In a device comprising means for analyzing an operating state of a circuit device, the function of the circuit device is controlled by the input means,
Modeling means for modeling by giving data in a predetermined format, and the data forming the model,
The conversion processing means for obtaining the result of the conversion processing corresponding to the simulation and the obtained conversion processing result are compared with the output signal stored in the storage means to determine whether they match. This device is provided with a comparison / determination means for outputting.

[0013]

The user draws the circuit element on the display screen and connects and arranges the circuit element to design the circuit device.

When a predetermined input signal is given to the circuit device, the function of the circuit device is simulated, and an output signal corresponding to the predetermined input signal is obtained and stored.

On the other hand, the function of the circuit device is modeled by giving data in a predetermined format. Next, the result of performing the conversion process corresponding to the simulation on the data forming the model is obtained.

Then, the obtained conversion processing result and the output signal are compared with each other to determine whether or not they match with each other, and analyze the circuit simulation result.

Further, it is possible to model the output signal into data having the predetermined format and display and output it so that the user can easily understand the simulation result.

Assuming that a standardized communication interface is used as the circuit device, it becomes possible to easily analyze a logic simulation of the communication interface.

[0019]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 3 is a block diagram showing an example of the system configuration of the present invention.

The present system has a display device 302 for displaying necessary information on a display screen and a processing device 30 having a function of storing various programs and data and performing a predetermined process.
4 and an input device 306 for inputting necessary commands and data, and can be realized by, for example, one computer system.

Further, the processing device 304 has a program storage unit 304a for storing various programs, a data storage unit 304 for storing input data to the programs and output data from the programs (process results of the programs).
b, and a control unit 304c that performs a control operation according to a command given through the input device.

First, the analyst designs a circuit device to be analyzed. In this case, by giving a command through the input device, the control unit 304c is driven and the design program stored in advance is started. By operating an input device such as a mouse, circuit elements are arranged and connected on the display screen to complete the design of the circuit device.

Next, in order to perform an operation simulation of the circuit device, a prestored operation simulation program is started by giving a command via the input device, and input data corresponding to the input signal for operation simulation is input. Give the simulation result,
Store. Up to this point, the operation is as an existing circuit device simulation system. The input data may be prepared and prepared in advance.

In the present invention, the program storage unit 304
In a, the design program, a program for performing a logic simulation on the designed circuit, a program for creating a text file that models a communication interface, a program for converting the created text file, and a conversion process. At least a program for comparing data with a simulation result in an existing circuit device simulation system and a program for converting the simulation result in the existing circuit device simulation system into a text file are stored.

Then, the control unit 304c activates a program corresponding to the operation of the input device, and the data storage unit 304c.
b stores the execution processing result of each program. Also,
The display device 302 has a function of displaying at least a data input format for creating a text file, a text file showing a simulation result, and a display area capable of instructing various commands.

That is, it enables the analyst to input data for modeling the communication interface according to the displayed data input format, and
When the analyst designates the command shown in the display area with a mouse or the like, the corresponding program is started. The control regarding the display operation is performed by the control unit 3.
04c is configured to do.

With the above system configuration, the processing according to the present invention can be executed.

The main components of the present invention and the flow of processing using the components will be described below.

FIG. 1 is an explanatory diagram of a processing flow of an embodiment of the present invention.

First, the main components will be described.

Reference numeral 1 is a communication interface model that schematically represents a communication interface for communicating digital information. Items such as A, B, C, D, E, F, and G are data representing communication interfaces. For example, A is 3-bit information, B is 5-bit information,
The number of bits is specified for each item unique to the type of communication interface.

Reference numeral 2 is a file corresponding to the communication interface model 1, which is a file that can be processed by the processing device. Such a file corresponding to the communication interface model 1 is called a text file.

The text file 2 is displayed on the display screen, and the user takes the form of the communication interface model 1 into consideration and creates the file interactively.

The fixed keywords indicated by A, B, C, etc. are the same as the item names of the communication interface model 1, and "**" is the HEX value designated by the user, ";".
Is a symbol indicating the end of the data, "DATA", "E
"ND" is a symbol indicating the start and end of the file, respectively. Specifically, the user inputs data (input data) for a fixed keyword while considering the communication interface model 1.

Reference numeral 3 is a program for generating an expected value (predicted value) of a logic simulation result of a logic circuit which is a target of the logic simulation. That is, program 3
Generates an expected value (expected value) of the logic simulation result for the given text file 2.

Reference numeral 4 is a file for storing an expected value (estimated value) generated by executing the program 3.

Reference numeral 5 represents a logic circuit to be subjected to logic simulation, and digital data in which "1, 0" is combined with data input to the program 3 and a circuit (simulation data generation circuit) that generates equivalent data is generated. Is entered.

The logic circuit to be subjected to the logic simulation is a circuit designed by the user using the design program. The simulation data generation circuit can be realized by a program that performs a logic simulation on the designed circuit, and is provided by an existing analysis system.

Reference numeral 6 is digital information consisting of a combination of "1, 0" which is the result of logic simulation of the logic circuit 5 (waveform information: represented as a waveform because the digital value changes with respect to the time axis). Is a waveform conversion circuit that stores a value in a memory using a counter and converts it into a HEX value. The counter and the memory are designed to be attached to the output section of the design circuit using the design program. That is, a memory for storing the waveform information, a counter for instructing the data storage location, and
A circuit for designing the HEX value is provided in advance by providing a conversion unit for the HEX value at the output stage of the logic circuit 5 to be designed. As a result, the waveform information is stored in the memory. In this way, the waveform conversion circuit 6 can be realized by using the existing design program. The logic circuit 5 and the waveform conversion circuit 6
Is displayed on the display screen.

Numeral 7 is the result of logic simulation (HEX
This is a file that stores (value).

Reference numeral 8 is a program for referring to the contents of the file 7 storing the result of the logical simulation, converting the contents into a text file, and comparing the contents of the files 4 and 7 (file compare).

Reference numeral 9 is a file that stores the result of the file comparison, and stores, for example, matching and non-matching information.

Reference numeral 10 refers to the result of the logic simulation stored in the file 7
It is a text file converted into the file format as shown in. By displaying this text file on the display screen, the text file corresponding to the logic simulation result can be understood at a glance, which is effective for examining the logic simulation result.

Each program is stored in the program storage unit 304a, and each file is stored in the data storage unit 30a.
It can be realized by 4b.

The process flow will be described below with reference to FIG.

First, consider a communication device circuit as the logic circuit 5 to be subjected to the logic simulation, and further consider the logic simulation when data corresponding to the communication interface model 1 for the communication device circuit is input.

As described above, the communication interface model 1 has a name defined for each item (for example,
A, B, C, D, E, F, etc). This model is defined by standardized standards.

Next, from the communication interface model 1,
In order to generate the expected value file 4 of the logic simulation result, as shown in the text file 2, the user inputs the name of each item as a fixed keyword and inputs data to the fixed keyword. Then, the text file 2 in which data is input to all items is given to the program 3.

The program 3 simulates the function of the logic circuit 5 which is the target of the logic simulation, and generates the expected value file 4. At this time, the expected value file 4 may be generated by performing mapping processing, coding processing, encryption processing, or the like on the data for each item designated in the text file 2.

On the other hand, the logic simulation result is input to the memory of the waveform conversion circuit 6 as the waveform information by the logic simulation.

Then, the program 8 stores the contents of the file 7 storing the result of the logic simulation and the file 4
Enter the contents of and.

The program 8 checks whether the contents of the file 7 and the contents of the file 4 match, outputs the result to the file 9, and outputs the contents of the file 7 to a text file for the communication interface model 1. The text file 10 is generated by converting the format into the format 2.

By the above procedure, for example, the analysis of the logic simulation result of the communication device circuit having the standardized communication interface can be surely and easily performed.

Next, the present invention will be described with reference to FIG.
(Asynchronous Transfer Mod
e: Asynchronous transfer mode) An embodiment when applied to a logic circuit for an exchange will be described.

FIG. 2 shows main components and a flow chart of processing using them. In this embodiment,
The system shown in FIG. 3 may be used.

First, the main components will be described.

Reference numeral 21 is SOH (section overhead: 144 bytes), POH (path overhead: 1
Frame information (4320 bytes × 9 Ro) having a header field of 6 bytes (including fixed stuff) and an information field of ATM payload
It is a communication interface model for w).

The item name of the first byte of 1Row is "A
The item name of the 145th byte of 1 ”and 1Row is“ J
1 ”(other item names include A2, C2, etc.), an internationally standardized standard is established.

Reference numeral 22 is a file corresponding to the communication interface model 21, and is a file that can be processed by the processing device. Such a communication interface model 2
The file corresponding to 1 is called a frame information text file. The communication interface model 21 is shown in FIG.
It corresponds to the communication interface model 1 of.

The frame information text file 22 is displayed on the display screen, and the user considers the form of the communication interface model 1 to generate the file interactively. The frame information text file 22 corresponds to the text file 2 of FIG.

The fixed keywords indicated by A1, A2, J1, C2, etc. are the same as the item names of the communication interface model 21, and "**" indicates the HEX designated by the user.
The value ";" is the symbol "SO" that indicates the end of the data.
"H" and "POH" represent the start of data specification of each header field, and "END" represents the end of data specification of each header field. Specifically, the user inputs data (input value) for a fixed keyword while considering the communication interface model 1.

Reference numeral 23 is a program for generating an expected value (estimated value) of the logic simulation result of the logic circuit to be subjected to the logic simulation. That is, program 2
3 generates an expected value (estimated value) of the logic simulation result for the given text file 22.
The program 23 corresponds to the program 3 in FIG.

Reference numeral 24 is a file for storing an expected value (estimated value) generated by executing the program 23.
The file 24 corresponds to the file 4 in FIG.

The simulation data generation circuit and the waveform conversion circuit 26 for performing the logical simulation are
Since they are the same as the simulation data generation circuit and the waveform conversion circuit 6 of FIG. 1, respectively, the description thereof will be omitted.

The present embodiment is different in that the target logic circuit 5 in FIG. 1 is replaced with the logic circuit 25, that is, the target logic circuit for logic simulation is a logic circuit for an ATM switch. Only.

27 is a result of logic simulation (HE
This is a file that stores X values).

Reference numeral 28 is a program for referring to the contents of the file 27 storing the logical simulation result, converting the contents into a frame information text file, and comparing the contents of the files 24 and 27 (file compare).

Reference numeral 29 is a file that stores the result of the file comparison, and stores, for example, information of matching and non-matching.

Reference numeral 30 is a frame information text file converted into a file format as shown by 22 by the program 28 with reference to the logic simulation result stored in the file 27. By displaying this frame information text file on the display screen, the frame information text file corresponding to the logic simulation result can be grasped at a glance, which is effective in examining the logic simulation result.

Each program is stored in the program storage unit 304a, and each file is stored in the data storage unit 30a.
It can be realized by 4b.

The process flow will be described below with reference to FIG.

First, consider an ATM exchange communication circuit as the logic circuit 5 to be subjected to the logic simulation, and further, when data corresponding to the communication interface model 21 for the ATM exchange communication circuit is input.
Consider logical simulation.

As described above, the communication interface model 21 has a name defined for each item (for example, A1, A2, J1, C2, etc). This model is defined by standardized standards.

Next, in order to be able to generate the expected value file 24 of the logic simulation result from the communication interface model 21, as shown in the frame information text file 22, fixed keywords corresponding to each item of the communication interface model 21. And the user inputs data for the fixed keyword that has been set (for example, H
EX value).

Then, the frame information text file 22 in which data is input to all the items is changed to the program 23.
Give to.

The program 23 simulates the function of the logic circuit 25 which is the target of the logic simulation and generates the expected value file 24. At this time, the data for each item designated in the frame information text file 22 may be subjected to a mapping process, a coding process, an encryption process, etc. to generate the expected value file 24.

On the other hand, by the logic simulation, the logic simulation result is input as waveform information to the memory of the waveform conversion circuit 26.

Then, the program 28 inputs the contents of the file 27 storing the logic simulation result and the expected value file 24 generated by the above method.

The program 28 checks whether the contents of the file 27 and the contents of the file 24 match, outputs the result to the file 29, and
7 is converted into the format of the frame information text file 22 for the communication interface model 21, and the text file 30 is generated.

With the above procedure, according to the present invention, the AT
Even for the M communication circuit, the analysis of the logic simulation result can be performed reliably and easily.

In the present embodiment, the communication circuit has been described as the target of the logic simulation. However, as long as the circuit can be modeled and a text file for the model can be generated, any logic circuit can be used. The present invention is applicable. As a circuit that can be modeled and a text file can be generated for the model, a circuit for which a standard is defined is most typical.

[0083]

As described above, according to the present invention, it is possible to accurately and easily analyze the operation simulation result of various circuit devices such as a communication device circuit. Therefore, it has become possible to improve the manufacturing quality of the circuit to be simulated.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of one embodiment of the present invention.

FIG. 2 is an explanatory diagram of one embodiment of the present invention.

FIG. 3 is a configuration diagram of a system according to the present invention.

[Explanation of symbols]

1 ... communication interface, 2 ... text file, 3 ...
Program, 4 ... Expected value file of logic simulation result, 5 ... Target logic circuit, 6 ... Waveform conversion circuit,
7 ... Logical simulation result file, 8 ... Program, 9 ... Analysis result file, 10 ... Text file,
21 ... communication interface, 22 ... text file,
23 ... Program, 24 ... Expected value file of logic simulation result, 25 ... Target logic circuit, 26 ... Waveform conversion circuit, 27 ... Logic simulation result file, 28 ... Program, 29 ... Analysis result file, 30
…text file

Claims (5)

[Claims] 1. A circuit device is drawn by drawing a circuit element on a display screen, a circuit device is designed by connecting the circuit element, and a predetermined input signal is given to the circuit device to simulate the function of the circuit device. In a method of obtaining and storing an output signal and examining the stored contents to analyze the operating state of the circuit device, the function of the circuit device is modeled by giving data in a predetermined format, and the data that constitutes the model is modeled. , The result of performing the conversion process corresponding to the simulation is obtained, the obtained conversion process result is compared with the output signal, and whether or not there is a coincidence is determined and output, circuit simulation result analysis Method. 2. The circuit simulation result analysis method according to claim 1, further comprising modeling the output signal into data having the predetermined format and outputting the data. 3. The circuit simulation according to claim 1, wherein the circuit device is a standardized communication interface that has a plurality of logic gate elements. Result analysis method. 4. An input means for giving a command, a display means for displaying necessary information, and a circuit element arranged on the display screen of the display means for connecting the circuit elements by a given command. A circuit device that can be designed by applying a predetermined input signal to the circuit device to simulate the function of the circuit device and obtain an output signal with respect to the predetermined input signal; and a memory that stores the obtained result. A device for analyzing the operating state of a circuit device, comprising: modeling means for modeling the function of the circuit device by giving data in a predetermined format via the input means; Conversion processing means for obtaining the result of performing the conversion processing corresponding to the simulation, the obtained conversion processing result, and the output signal stored in the storage means. Circuit simulation result analysis device, which is provided with a comparison / determination means for performing a comparison with a signal and determining and outputting whether or not they match. 5. The circuit simulator according to claim 4, further comprising simulation result processing means for modeling the output signal into data having the predetermined format and displaying and outputting the data on the display means. Result analysis device.