JPH09162780A - Correlator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a correlator with which the correlation of plural spread spectrum signals can be simultaneously processed by sharing a delay circuit and a multiplication circuit. SOLUTION: When plural spread spectrum signals having the equal code length and different PN patterns are inputted, these signals are delayed at every one chip time by a delay circuit 5. As two kinds of constants of PN code, +1 and -1 are respectively multiplied to respective delayed signals (a), (b) and (c) by a multiplication circuit 6. According to the 1st PN pattern to be received, any multiplied signal is selected by a lst selecting switch 7 and further added by a 1st adder 9, and the inverse spreading signal of 1st spread spectrum signal is provided as a demodulation signal. Any signal, to which +1 and -1 are multiplied by the multiplication circuit 6, is similarly selected by a 2nd selecting switch 8 and added by a 2nd adder 10 and a 2nd inverse spreading signal is provided, Thus, the inverse spread of spread spectrum signal can be provided by a matched filter sharing the delay circuit 5 and the multiplication circuit 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a correlator for obtaining a despread signal by correlating a spread spectrum signal on the receiving side of a spread spectrum communication system, and more particularly,
The present invention relates to a correlator capable of simultaneously processing the correlation of a plurality of spread spectrum signals with a simple configuration.

[0002]

2. Description of the Related Art Generally, on the receiving side of a spread spectrum communication system, a correlator for obtaining a despread signal by correlating a spread spectrum signal is required, and a sliding correlation or a matched filter is used as the correlation method. is there. The structure of a conventional matched filter is shown in FIG. In FIG. 3, this matched filter is provided with m fixed data for each 1 bit of an N-bit PN series pattern in the storage register 1, and the received signal has N × m shifts of a certain bit length. The input signals are successively input to the register 2, and floating-point multiplication or fixed-point multiplication is performed by the multiplication unit 3 on the n = N × m input signals received and the PN pattern prepared above. Then, the sum of n = N × m multiplication results is added and calculated in the adder 4. Therefore, each time the received signal is input and shifted by the shift register 2, the correlation value is calculated, and the received signal is received for one cycle time of the PN sequence,
The peak point of the correlation value (the synchronization point of the PN series) can be detected.

[0003]

However, in the conventional correlator (matched filter) as described above, a plurality of spread spectrum signals having the same code length but different PN patterns are input, and the correlations thereof are simultaneously calculated. In the case of having to take it, it is necessary to provide a plurality of correlators (matched filters), which is inefficient. The present invention has been made in view of the above circumstances, and an object thereof is to provide a correlator capable of simultaneously processing the correlation of a plurality of spread spectrum signals with a simple configuration.

[0004]

To achieve the above object, the present invention is applied to a correlator for obtaining a despread signal by correlating a spread spectrum signal on the receiving side of a spread spectrum communication system. A delay circuit for delaying at least two spread spectrum signals having the same code length but different PN patterns every predetermined time,
Each signal from the above delay circuit has a PN code of + 1,-
A multiplication circuit for multiplying by 1, and at least two or more selection switches for selecting the signal multiplied by +1 or -1 of the PN code by the multiplication circuit according to each PN pattern of the at least two or more spread spectrum signals It is characterized by comprising a circuit and at least two or more adders for adding the signals selected by the selection switch circuits to obtain a despread signal.

[0005]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described below based on the illustrated embodiments. FIG. 1 is a block diagram showing an embodiment of a correlator according to the present invention. As shown in FIG. 1, the correlator includes a delay circuit 5 to which an input signal is input, a multiplication circuit 6 connected to the delay circuit 5, and a first selection switch circuit connected to the multiplication circuit 6. 7 and the multiplication circuit 6
Second selection switch circuit 8 connected to the first selection switch circuit 7, a first adder 9 connected to the first selection switch circuit 7, and a second adder connected to the second selection switch circuit 8. 10 and 10. Next, the operation of the correlator having the above configuration will be described with reference to the operation flowchart of FIG.
First, in Step 100 of FIG. 2, a plurality of (two in this embodiment, the first and second in this embodiment) spread spectrum signals having the same code length but different PN patterns are received. The spread spectrum signal is delayed by the delay circuit 5 every chip time. This is a specific P for each chip on the transmission side.
This is because the spread modulation is performed with the N code, so that the receiving side demodulates the data delayed for each chip time by applying a specific PN code.

Next, at step 102, the signals a, b, c and d from the delay circuit 5 are converted by the multiplication circuit 6 into two constants of PN code, +1 and -1, respectively. Is multiplied. This is because by multiplying the delayed signal by +1 and −1 of the PN code, the polarity of the delayed signal is changed by the PN code, and the sum thereof is used for despread modulation.
The processing up to this point is the same even if the PN patterns are different. Next, in step 103, the signal from the multiplication circuit 6 (that is, each signal a,
A signal obtained by multiplying b, c, and d by +1 and -1 is selected by the first selection switch 7 according to the first PN pattern to be received. That is, when the code of the first PN pattern is -1, +1, -1, -1,
The first selection switch 7 is brought into the state as shown in FIG. 1 and the signal corresponding to the first PN pattern is selected. Then, in step 104, the signals selected by the first selection switch 7 are added by the first adder 9 to obtain a despread signal of the first spread spectrum signal.

Next, at step 105, the signal from the multiplication circuit 6 (that is, each of the signals a, b, and
signal obtained by multiplying c and d by +1 and -1) is the second signal
Selection switch 8 selects the second PN pattern to be received. That is, when the codes of the second PN pattern are +1, -1, +1 and -1, the second selection switch 8 is in the state as shown in FIG. 1 and corresponds to the second PN pattern. Signal selection is performed. Then, in step 106, the signals selected by the second selection switch 8 are added by the second adder 10 to obtain a despread signal of the second spread spectrum signal. In this way, when a plurality of spread spectrum signals having the same code length but different PN patterns are to be despread on the receiving side, a spread filter of the spread spectrum signal should be obtained by a matched filter having the delay circuit 5 and the multiplication circuit 6 in common. You can In this embodiment, the case where despreading of spread spectrum signals having different first and second PN patterns is described, but the number of selection switches and the number of adders are two or more. It goes without saying that you can deal with it by simply increasing.

[0008]

As described above, according to the present invention, the delay circuit and the multiplication circuit can be used in common when the despreading of the spread spectrum signals having the same code length and different PN patterns on the receiving side is obtained. As compared with the use of the matched filter of (1), it is possible to obtain despreading of a plurality of spread spectrum signals with a circuit having a simple structure.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a correlator according to the present invention.

FIG. 2 is an operation flowchart of the correlator shown in FIG.

FIG. 3 is a configuration diagram of a conventional correlator (matched filter).

[Explanation of symbols]

1 ... storage register, 2 ... shift register, 3 ... multiplication unit,
4 ... Adder, 5 ... Delay circuit,
6 ... Multiplier circuit, 7, 8 ... First and second selection switch circuits, 9, 10 ... First and second adder, 1
01-106 ... each step,

Claims (2)

[Claims] 1. A correlator for obtaining a despread signal by correlating a spread spectrum signal on the receiving side of a spread spectrum communication system, wherein at least two or more different PN patterns with the same code length are inputted. Delay circuit that delays the spread spectrum signal of
A multiplication circuit for multiplying each signal from the delay circuit by two types of PN code constants, and two types of PN code constants by the multiplication circuit according to each PN pattern of the at least two or more spread spectrum signals At least two selection switch circuits for selecting signals multiplied by and at least two adders for adding the signals selected by the selection switch circuits to obtain despread signals. A correlator characterized by: 2. The correlator according to claim 1, wherein the two types of constants of the PN code are +1 and −1.