JPH09153828A - Multi-carrier common amplifier - Google Patents
Multi-carrier common amplifierInfo
- Publication number
- JPH09153828A JPH09153828A JP7311943A JP31194395A JPH09153828A JP H09153828 A JPH09153828 A JP H09153828A JP 7311943 A JP7311943 A JP 7311943A JP 31194395 A JP31194395 A JP 31194395A JP H09153828 A JPH09153828 A JP H09153828A
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- Japan
- Prior art keywords
- distortion
- output
- amplifier
- amplitude
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明はマルチキャリア共通
増幅器に関する。TECHNICAL FIELD The present invention relates to a multi-carrier common amplifier.
【0002】[0002]
【従来の技術】従来、非線形な増幅器で複数の信号を増
幅する場合に生じる相互変調歪を低減するために、増幅
器を線形化する手法として、負帰還をかければよいこと
が広く知られている。しかし、送信出力増幅器では出力
が大きく、周波数も高いため、負帰還増幅器を構成する
ことが困難であることが多い。2. Description of the Related Art Heretofore, it has been widely known that negative feedback may be applied as a method of linearizing an amplifier in order to reduce intermodulation distortion that occurs when a plurality of signals are amplified by a non-linear amplifier. . However, it is often difficult to construct a negative feedback amplifier because the transmission output amplifier has a large output and a high frequency.
【0003】これに代わる線形化の手法として、衛星通
信等で用いられているプリデストーション法がある。こ
れは、被補償増幅器とその逆特性の非線形性を有する回
路(プリデストーション回路)を縦続接続して総合の入
出力特性を線形化する方法である。As an alternative linearization method, there is a predistortion method used in satellite communication and the like. This is a method in which a compensated amplifier and a circuit (predistortion circuit) having a non-linear characteristic of its inverse characteristic are connected in series to linearize the total input / output characteristic.
【0004】また、同様にフィードフォワード法がある
が、従来は温度等を検出して振幅、位相をオープンルー
プで制御していた。また、主増幅器出力にパイロット信
号を挿入して、これを基準にして制御していた。Similarly, although there is a feedforward method, conventionally, the temperature and the like are detected and the amplitude and phase are controlled by an open loop. Also, a pilot signal is inserted into the output of the main amplifier, and control is performed based on this.
【0005】[0005]
【発明が解決しようとする課題】従来技術のプリデスト
ーション法は、被補償増幅器とプリデストーション回路
の非線形性がうまく適合しないと補償できないこと、温
度変化、電源電圧変動、回路特性の経時変化等により補
償特性が劣化する欠点があった。The predistortion method of the prior art cannot compensate unless the non-linearity of the compensated amplifier and the predistortion circuit is well adapted, temperature change, power supply voltage change, and circuit characteristic change with time. However, there is a drawback that the compensation characteristics are deteriorated due to such reasons.
【0006】本発明は、温度変化、電源電圧変動、回路
特性の経時変化等による相互変調歪信号の振幅、位相と
いったパラメータの変動を補正し、安定した補償特性を
提供することを目的とする。An object of the present invention is to correct fluctuations in parameters such as the amplitude and phase of an intermodulation distortion signal due to changes in temperature, fluctuations in power supply voltage, changes in circuit characteristics over time, and the like, and to provide stable compensation characteristics.
【0007】また、従来のフィードフォワード法で用い
られていたパイロット信号を用いることなく最適化制御
することを目的とする。Another object of the present invention is to perform optimization control without using the pilot signal used in the conventional feedforward method.
【0008】[0008]
【課題を解決するための手段】本発明は、複数の高周波
信号(キャリア)を増幅する電力増幅器おいて、キャリ
アをメイン系と補償系に分岐する分波器と、分波器出力
から主増幅器を経て相互変調歪を含む信号と、主増幅器
と等しい遅延を与えられた信号から相互変調歪を抽出す
る歪抽出回路と、この抽出した歪信号を増幅する補助増
幅器と、補助増幅器の入力あるいは出力部に温度、電源
電圧変動、経時変化等による歪信号の振幅と位相の変動
を調整する振幅調整器と位相調整器を設け、この歪信号
を主増幅器出力信号に加算して歪を除去する歪除去回路
と、この回路の出力から方向性結合器により抽出した主
信号の一部より主信号に含まれる歪信号の電力を演算
し、上記振幅調整器と位相調整器を制御する歪電力演算
回路を備えることにより、温度変化、電源電圧変動、経
時変化等に依らず、安定して相互変調歪を抑制できるよ
うにした。According to the present invention, in a power amplifier for amplifying a plurality of high frequency signals (carriers), a demultiplexer for branching the carrier into a main system and a compensation system, and a main amplifier from the demultiplexer output. A signal including intermodulation distortion through the signal, a distortion extraction circuit that extracts the intermodulation distortion from the signal that is given the same delay as the main amplifier, an auxiliary amplifier that amplifies the extracted distortion signal, and an input or output of the auxiliary amplifier. Distortion for removing distortion by adding an amplitude adjuster and a phase adjuster that adjust the fluctuation of the amplitude and phase of the distortion signal due to temperature, power supply voltage fluctuation, temporal change, etc. to the main amplifier output signal Distortion circuit and distortion power calculation circuit for calculating the power of the distortion signal contained in the main signal from a part of the main signal extracted by the directional coupler from the output of this circuit and controlling the amplitude adjuster and the phase adjuster. To prepare Ri, temperature changes, power supply voltage fluctuation, regardless of aging or the like, and to be able to suppress the intermodulation distortion stability.
【0009】また、歪抽出回路は、主増幅器の出力の一
部を取り出す手段とこれを所要のレベルまで減衰させる
減衰器を有し、主増幅器の出力信号と遅延線からの入力
信号から歪成分だけを抽出する引算器を備える。Further, the distortion extraction circuit has means for extracting a part of the output of the main amplifier and an attenuator for attenuating the output to a required level, and a distortion component is generated from the output signal of the main amplifier and the input signal from the delay line. It has a subtractor that extracts only
【0010】また、歪電力演算回路は、方向性結合器で
一部抽出した主増幅器出力信号を所要のレベルまで減衰
させる減衰器と、この信号を中間周波数に変換するロー
カル受信部と、中間周波数の主信号と相互変調歪の電圧
振幅データをディジタル信号に変換するAD変換器及
び、そのディジタルデータを取り込み相互変調歪電力の
総和を計算し、一定期間メモリに蓄え、上記振幅調整器
と位相調整器を制御する制御部を有するマイコンを備え
る。Further, the distortion power calculation circuit includes an attenuator for attenuating the main amplifier output signal partially extracted by the directional coupler to a required level, a local receiver for converting this signal to an intermediate frequency, and an intermediate frequency. AD converter for converting the voltage amplitude data of the main signal and the intermodulation distortion into a digital signal, and the sum of the intermodulation distortion power is calculated by taking in the digital data and stored in the memory for a certain period, and the amplitude adjuster and the phase adjustment A microcomputer having a control unit for controlling the container is provided.
【0011】上記ローカル受信部は、スーパーヘテロダ
イン方式をとり、主増幅器出力信号を第一中間周波数帯
に変換する第一ミキサと第一局部発振回路及び、所要帯
域のみを通過させる帯域制限フィルタを有し、さらにそ
の信号を第二中間周波数に変換する第二ミキサとキャリ
アのチャネル間隔で掃引できる第二局部発振回路及び、
所要帯域のみを通過させる帯域制限フィルタから成る。
これにより、複数の主信号と相互変調歪信号は各々、第
二局部発振回路の一定の掃引時間毎に第二中間周波数に
変換され、電圧振幅データとして取り込むことができ
る。The local receiving section adopts a super-heterodyne system and has a first mixer for converting the output signal of the main amplifier into a first intermediate frequency band, a first local oscillating circuit, and a band limiting filter for passing only a required band. And a second local oscillator circuit capable of sweeping the signal at a channel interval of a second mixer and a carrier for converting the signal to a second intermediate frequency,
It consists of a band limiting filter that passes only the required band.
As a result, each of the plurality of main signals and the intermodulation distortion signal is converted into the second intermediate frequency at every constant sweep time of the second local oscillation circuit, and can be captured as voltage amplitude data.
【0012】また、振幅調整器と位相調整器を補助増幅
器の入力あるいは出力部に設けるだけでなく、分波器と
歪抽出回路の間の伝送路にも設けることで、歪抽出をさ
らに高精度に行なうことができる。Further, not only the amplitude adjuster and the phase adjuster are provided in the input or output section of the auxiliary amplifier, but also in the transmission line between the demultiplexer and the distortion extracting circuit, so that the distortion can be extracted with higher accuracy. Can be done
【0013】また、主増幅器の出力レベルが小さいとき
に、歪抽出回路の引算器出力を0に保つために、分波器
と歪抽出回路の間の伝送路に設けた振幅調整器と位相調
整器を制御する引算出力0化演算回路を備える。これに
より、温度変化、電源電圧変動、経時変化等による主増
幅器利得等の特性変動に伴う振幅、位相パラメータの変
動を調整し、相互変調歪補償を安定して供給することが
できる。Further, in order to keep the subtractor output of the distortion extracting circuit at 0 when the output level of the main amplifier is small, an amplitude adjuster and a phase provided in the transmission line between the demultiplexer and the distortion extracting circuit are used. A subtraction force zero arithmetic circuit for controlling the regulator is provided. This makes it possible to adjust fluctuations in amplitude and phase parameters due to characteristic fluctuations such as main amplifier gain due to temperature changes, power supply voltage fluctuations, changes over time, etc., and intermodulation distortion compensation can be stably supplied.
【0014】上記、引算出力0化演算回路によって制御
される振幅調整器と位相調整器は、主増幅器の入力部に
設けても同じ効果を得る。The above-mentioned amplitude adjuster and phase adjuster controlled by the subtraction calculation force zero operation circuit can achieve the same effect even if they are provided in the input part of the main amplifier.
【0015】本発明は、複数の高周波信号(マルチキャ
リア)を増幅器において、相互変調歪を抑制することを
特徴とする。The present invention is characterized by suppressing intermodulation distortion in an amplifier of a plurality of high frequency signals (multicarriers).
【0016】主増幅器は非線形であり、入力電力が増加
するに従って、利得が低下する。すなわち、入出力特性
が直線ではなく、曲線となり、このため複数の信号が加
えられると、相互変調積を生じる。The main amplifier is non-linear and the gain decreases with increasing input power. That is, the input / output characteristic is not a straight line but a curved line, so that when a plurality of signals are added, an intermodulation product occurs.
【0017】この主増幅器の入力と出力信号を引算し、
抽出した歪分に補助増幅器で主増幅器と同じ利得を与え
て、振幅と位相を調整した後で主増幅器出力に加算する
ことで主増幅器出力信号に含まれる相互変調歪分を除去
することができる。Subtracting the input and output signals of this main amplifier,
It is possible to remove the intermodulation distortion component included in the main amplifier output signal by giving the extracted distortion component the same gain as the main amplifier with the auxiliary amplifier, adjusting the amplitude and phase, and then adding it to the main amplifier output. .
【0018】また、温度、電源電圧変動、回路の経時変
化による時間的にゆっくりした振幅、位相パラメータの
変動を補正する手段を有することで、常に安定した補償
特性を得ることができる。Further, by providing a means for compensating for fluctuations in amplitude, phase parameter that are slow in time due to temperature, power supply voltage fluctuations, and temporal changes in the circuit, it is possible to obtain stable compensation characteristics at all times.
【0019】[0019]
【発明の実施の形態】図1は、本発明の第一の実施例を
示した系統図である。図中、1は高周波信号入力信号、
11は信号出力端子である。2は分波器、3は主増幅
器、4は歪抽出回路、12は遅延線である。歪抽出回路
4は減衰器5と引算器6からなる。分波器2で分岐され
た複数の高周波信号の一方は、主増幅器3に入力され、
他方は遅延線12で主増幅器3と等しい遅延を与えられ
て、歪抽出回路4の引算器6に入力される。主増幅器3
の出力信号は、歪抽出回路4で一部取り出され、減衰器
5で主増副器3での増幅分だけ減衰された後、引算器6
に入力される。引算器6では、主増副器3の出力信号と
歪を含まない入力信号を引算し、相互変調歪成分のみを
出力する。1 is a system diagram showing a first embodiment of the present invention. In the figure, 1 is a high frequency signal input signal,
Reference numeral 11 is a signal output terminal. Reference numeral 2 is a demultiplexer, 3 is a main amplifier, 4 is a distortion extraction circuit, and 12 is a delay line. The distortion extraction circuit 4 includes an attenuator 5 and a subtractor 6. One of the plurality of high frequency signals branched by the demultiplexer 2 is input to the main amplifier 3,
The other is given a delay equal to that of the main amplifier 3 by a delay line 12 and input to the subtractor 6 of the distortion extraction circuit 4. Main amplifier 3
The output signal of is partially extracted by the distortion extraction circuit 4, attenuated by the attenuator 5 by the amount of amplification in the main amplifier / subtractor 3, and then subtracted by the subtractor 6.
Is input to The subtractor 6 subtracts the output signal of the main multiplier / subtractor 3 and the input signal containing no distortion, and outputs only the intermodulation distortion component.
【0020】図1中、7は位相調整器、8は振幅調整
器、9は補助増幅器、10は歪除去器である。引算器6
の出力信号は、補助増幅器9で主増副器3と同じ利得を
与えられ、また主増副器出力は遅延線13で補助増幅器
9と等しい遅延を与えられた後、歪除去器10において
二つの信号は加算され、相互変調歪成分が除去される。
このとき、出力端子11でのスペクトラムをスペクトラ
ムアナライザで観測しながら、相互変調歪が最小になる
ように、位相調整器7、振幅調整器8によって引算器出
力信号の振幅、位相の微調整を行なう。振幅調整器8に
はPINダイオードアッテネータを用い、位相調整器8
は単同調回路で、その共振周波数を可変することで位相
の調整を行なう。その位相は次の式で表わされる。In FIG. 1, 7 is a phase adjuster, 8 is an amplitude adjuster, 9 is an auxiliary amplifier, and 10 is a distortion remover. Subtractor 6
The output signal of 1 is given the same gain as that of the main amplifier 3 in the auxiliary amplifier 9, and the output of the main amplifier is given the same delay as that of the auxiliary amplifier 9 in the delay line 13, and then the two signals are output in the distortion remover 10. The two signals are added and the intermodulation distortion component is removed.
At this time, while observing the spectrum at the output terminal 11 with a spectrum analyzer, the amplitude and phase of the subtracter output signal are finely adjusted by the phase adjuster 7 and the amplitude adjuster 8 so as to minimize the intermodulation distortion. To do. A PIN diode attenuator is used as the amplitude adjuster 8, and the phase adjuster 8
Is a single tuning circuit that adjusts the phase by varying its resonance frequency. The phase is expressed by the following equation.
【0021】[0021]
【数1】 (Equation 1)
【0022】図2は本発明の第二の実施例を示した図で
ある。図中、14は方向性結合器、15は歪電力演算回
路で、第一の実施例における歪除去回路10出力から方
向性結合器14により出力信号を抽出し、これを歪電力
演算回路15に入力する。歪電力演算回路15では、出
力信号に含まれる相互変調歪電力を測定し、これが最小
になるように位相調整器7、振幅調整器8を制御する。
つぎに、歪電力演算回路15について説明する。FIG. 2 is a diagram showing a second embodiment of the present invention. In the figure, 14 is a directional coupler, and 15 is a distortion power calculation circuit. An output signal is extracted from the output of the distortion removal circuit 10 in the first embodiment by the directional coupler 14, and this is output to the distortion power calculation circuit 15. input. The distortion power calculation circuit 15 measures the intermodulation distortion power included in the output signal, and controls the phase adjuster 7 and the amplitude adjuster 8 so as to minimize it.
Next, the distortion power calculation circuit 15 will be described.
【0023】図3は、歪電力演算回路15の回路構成の
一例である。歪電力演算回路15は、ローカル受信部、
A/D変換器26、マイコン27に大きく分けられ、さ
らにローカル受信部は、減衰器19、ミキサ20、局部
発振器21、中間周波数帯域通過フィルタ(以下1stBP
F)22及び、ミキサ23、局部可変発振器24、中間
周波数帯域通過フィルタ(以下2ndBPF)25から成
る。方向性結合器14で抽出された出力信号は、ミキサ
20の相互変調特性が十分無視できるレベルまで減衰器
19で減衰させられた後、中間周波数に変換され、1st
BPFを通過してミキサ23に入力され、中間周波数に変
換される。このとき、局部可変発振器24は、周波数チ
ャネル間隔(例:25kHz step)で一定時間ごとに掃引
し、各相互変調電力を測定する。FIG. 3 shows an example of the circuit configuration of the distortion power calculation circuit 15. The distortion power calculation circuit 15 includes a local receiver,
It is roughly divided into an A / D converter 26 and a microcomputer 27, and further, the local receiving section includes an attenuator 19, a mixer 20, a local oscillator 21, an intermediate frequency band pass filter (hereinafter referred to as 1stBP).
F) 22, a mixer 23, a local variable oscillator 24, and an intermediate frequency band pass filter (hereinafter 2nd BPF) 25. The output signal extracted by the directional coupler 14 is attenuated by the attenuator 19 to a level at which the intermodulation characteristics of the mixer 20 can be sufficiently ignored, and then converted to an intermediate frequency to be converted to 1st.
After passing through the BPF, it is input to the mixer 23 and converted into an intermediate frequency. At this time, the local variable oscillator 24 sweeps at a frequency channel interval (for example, 25 kHz step) at regular intervals to measure each intermodulation power.
【0024】図4は、一例としてキャリア3波入力時の
主増幅器3の出力スペクトラムである。太線で示した主
信号Ci(i=1〜n n:キャリア数)のほかに、相
互変調によって生じる細線で示したスペクトラムIi
(i:1〜m m:相互変調出力数)が現われる。これ
らそれぞれの電力を周波数変換しA/D変換した後、マ
イコン27に取り込む。FIG. 4 shows the output spectrum of the main amplifier 3 when three carrier waves are input, as an example. In addition to the main signal Ci (i = 1 to n n: the number of carriers) shown by the thick line, the spectrum Ii shown by the thin line generated by intermodulation
(I: 1 to mm: the number of intermodulation outputs) appears. The respective electric powers are frequency-converted and A / D converted, and then taken into the microcomputer 27.
【0025】マイコン27では相互変調電力の総和I2 In the microcomputer 27, the sum of the intermodulation power I 2
【0026】[0026]
【数2】 (Equation 2)
【0027】を計算し、その値はメモリに蓄えられる。
このとき、CiとIiはレベルが異なるので容易に識別
できる。つぎに、図2の位相調整器7を制御して補助増
幅器9の入力の位相を微小量(例:1゜)変動させてI
2を測定し、メモリに蓄える。この操作を繰り返すこと
によって図5のようなデータが得られる。このデータか
らI2が極小値になる位相量を位相調整器7にセットす
る。つぎに、振幅についても同様に、図2の振幅調整器
8の振幅を微小量(例:0.1dB)変動させてI2を測定
し、メモリに蓄え、図5のようなデータを得る。さら
に、位相、振幅を同時に変動してI2が最小値となる位
相、振幅を求め、位相調整器7、振幅調整器8の調整量
をセットする。以上の調整を一定時間(例:10分)毎
に行なって増幅器全体を相互変調歪が常に最小な状態に
保つ。尚、測定中は歪最小点よりも多少ずれたところで
動作するが、DU比が規格の範囲内であれば問題ない。Is calculated and the value is stored in memory.
At this time, since Ci and Ii have different levels, they can be easily identified. Next, the phase adjuster 7 of FIG. 2 is controlled to change the phase of the input of the auxiliary amplifier 9 by a small amount (eg, 1 °) and I
Measure 2 and store in memory. By repeating this operation, data as shown in FIG. 5 is obtained. From this data, the phase amount at which I 2 has a minimum value is set in the phase adjuster 7. Similarly, with respect to the amplitude, the amplitude of the amplitude adjuster 8 shown in FIG. 2 is slightly changed (eg, 0.1 dB) to measure I 2 , and the result is stored in the memory to obtain the data shown in FIG. Further, the phase and amplitude are simultaneously changed to obtain the phase and amplitude at which I 2 has the minimum value, and the adjustment amounts of the phase adjuster 7 and the amplitude adjuster 8 are set. The above adjustment is performed every fixed time (for example, 10 minutes) so that the inter-modulation distortion of the entire amplifier is always kept to the minimum. It should be noted that during the measurement, the operation is performed at a position slightly displaced from the minimum distortion point, but there is no problem if the DU ratio is within the standard range.
【0028】測定データには、キャリアの振幅は含まな
い。キャリア振幅Ciは相互変調振幅Iiに比べ十分小
さい(数十dB)ので、ADのフルスケールをキャリアよ
り例えば30dB低い値に設定し、相互変調振幅のみを取
り込む。また、AD8ビット(48dB)とすれば、相互
変調振幅Iiはキャリアに対して−78dBまで測定でき
る。The measured data does not include the carrier amplitude. Since the carrier amplitude Ci is sufficiently smaller (several tens of dB) than the intermodulation amplitude Ii, the full scale of AD is set to a value lower than the carrier by, for example, 30 dB, and only the intermodulation amplitude is captured. If AD8 bit (48 dB) is used, the intermodulation amplitude Ii can be measured up to −78 dB with respect to the carrier.
【0029】上記測定は、送信時刻に同期して行なわ
れ、測定中にキャリア数が変わった場合は、再測定す
る。また、測定値が異常な値を示した場合は、該当する
データをリジェクトする機能を有する。The above measurement is performed in synchronization with the transmission time, and if the number of carriers changes during the measurement, the measurement is performed again. Further, when the measured value shows an abnormal value, it has a function of rejecting the corresponding data.
【0030】図6は、本発明の第三実施例を示した図で
ある。図中、18は引算出力0化演算回路で主増幅器3
出力が小さいときにのみ引算器6出力の電圧振幅をモニ
タし、その値が0となるように分波器2と歪抽出器4間
に設けた位相調整器16、振幅調整器17を制御する。
以上により、温度変化、電源電圧変動、経時変化等によ
る主増幅器利得等の特性変動に伴う振幅、位相パラメー
タの変動を調整し、相互変調歪補償を安定して供給する
ことができる。FIG. 6 is a diagram showing a third embodiment of the present invention. In the figure, reference numeral 18 is a calculation circuit for reducing the subtraction force to the main amplifier 3
The voltage amplitude of the output of the subtractor 6 is monitored only when the output is small, and the phase adjuster 16 and the amplitude adjuster 17 provided between the demultiplexer 2 and the distortion extractor 4 are controlled so that the value becomes 0. To do.
As described above, it is possible to adjust the fluctuations of the amplitude and phase parameters associated with the characteristic fluctuations of the main amplifier gain and the like due to temperature changes, power supply voltage fluctuations, temporal changes, etc., and to stably supply intermodulation distortion compensation.
【0031】図7は、本発明の第四の実施例を示した図
である。第三の実施例の位相調整器16、振幅調整器1
7を分波器2と歪抽出器4間ではなく、主増幅器3の入
力に設けることにより、第三の実施例と同様の効果を得
るとともに、主増幅器3の利得安定化にも寄与する。FIG. 7 is a diagram showing a fourth embodiment of the present invention. Phase adjuster 16 and amplitude adjuster 1 of the third embodiment
By providing 7 to the input of the main amplifier 3 instead of between the demultiplexer 2 and the distortion extractor 4, the same effect as that of the third embodiment is obtained and the gain of the main amplifier 3 is stabilized.
【0032】[0032]
【発明の効果】本発明は高周波電力増幅器の非線形性の
ために生じる相互変調歪を除去する効果がある。また、
温度変化、電源電圧変動、経時変化等による主増幅器利
得等の特性変動に伴う振幅、位相パラメータといった時
間的にゆっくりとした変動を調整し、相互変調歪補償を
安定して供給することができる。INDUSTRIAL APPLICABILITY The present invention has the effect of eliminating intermodulation distortion caused by the non-linearity of a high frequency power amplifier. Also,
Intermodulation distortion compensation can be stably supplied by adjusting temporally slow fluctuations such as amplitude and phase parameters associated with characteristic fluctuations such as main amplifier gain due to temperature change, power supply voltage fluctuation, temporal change, and the like.
【図1】本発明の第一実施例の系統図。FIG. 1 is a system diagram of a first embodiment of the present invention.
【図2】本発明の第二実施例の系統図。FIG. 2 is a system diagram of a second embodiment of the present invention.
【図3】歪電力演算回路の構成を示す系統図。FIG. 3 is a system diagram showing a configuration of a distortion power calculation circuit.
【図4】等振幅の3つのキャリアを増幅時の主増幅器出
力スペクトラムを示す特性図。FIG. 4 is a characteristic diagram showing a main amplifier output spectrum when amplifying three carriers of equal amplitude.
【図5】歪電力演算回路により測定した位相、振幅の変
動と相互変調電力総和の関係を示す特性図。FIG. 5 is a characteristic diagram showing a relationship between fluctuations in phase and amplitude measured by a distortion power calculation circuit and sum of intermodulation power.
【図6】本発明の第三実施例の系統図。FIG. 6 is a system diagram of a third embodiment of the present invention.
【図7】本発明の第四実施例の系統図。FIG. 7 is a system diagram of a fourth embodiment of the present invention.
1…入力端子、 2…分派器、 3…主増幅器、 4…歪抽出器、 5…減衰器、 6…引算器、 7…位相調整器、 8…振幅調整器、 9…補助増幅器、 10…歪除去回路、 11…出力端子、 12…遅延線、 13…遅延線、 14…方向性結合器、 15…歪電力演算回路、 16…位相調整器、 17…振幅調整器、 18…引算出力0化演算回路。 DESCRIPTION OF SYMBOLS 1 ... Input terminal, 2 ... Splitter, 3 ... Main amplifier, 4 ... Distortion extractor, 5 ... Attenuator, 6 ... Subtractor, 7 ... Phase adjuster, 8 ... Amplitude adjuster, 9 ... Auxiliary amplifier, 10 ... Distortion removal circuit, 11 ... Output terminal, 12 ... Delay line, 13 ... Delay line, 14 ... Directional coupler, 15 ... Distortion power calculation circuit, 16 ... Phase adjuster, 17 ... Amplitude adjuster, 18 ... Subtraction calculation Force-zero operation circuit.
Claims (8)
に増幅する電力増幅器において、 上記高周波信号を主増幅器への入力と基準信号とに分配
するための分波器と上記主増幅器の出力と上記基準信号
を引算し歪を抽出する歪抽出回路と、上記主増幅器と同
等の利得を有し抽出した歪信号を増幅する補助増幅器
と、上記補助増幅器の入力あるいは出力に歪信号の振幅
と位相を調整する振幅調整器と位相調整器を設け、この
歪信号を上記主増幅器の出力信号に加算し歪を除去する
歪除去回路を備え、上記振幅調整器と位相調整器のパラ
メータを変動させて歪除去回路出力の相互変調歪電力を
計測し、相互変調の残留歪電力がほぼ最小になるように
振幅調整器と位相調整器のパラメータを設定することを
特徴とするマルチキャリア共通増幅器。1. A power amplifier for simultaneously amplifying a plurality of high-frequency signals having different frequencies, a demultiplexer for dividing the high-frequency signal into an input to a main amplifier and a reference signal, an output of the main amplifier, and the above-mentioned. A distortion extraction circuit that subtracts a reference signal to extract distortion, an auxiliary amplifier that has the same gain as the main amplifier and amplifies the extracted distortion signal, and the amplitude and phase of the distortion signal at the input or output of the auxiliary amplifier. Is provided with an amplitude adjuster and a phase adjuster, the distortion signal is added to the output signal of the main amplifier to remove the distortion, and the parameters of the amplitude adjuster and the phase adjuster are changed. A multi-carrier common amplifier characterized by measuring the intermodulation distortion power of the distortion elimination circuit output and setting the parameters of the amplitude adjuster and the phase adjuster so that the residual distortion power of the intermodulation is almost minimized.
を一定量変化させて相互変調歪電力を計測し、さらに一
定量変化させて歪電力を再計測する操作を繰り返して、
歪電力が極小となる振幅調整点を見出し、上記位相調整
器について同様の操作を行い、極小となる位相調整点を
見出し、さらに、上記振幅調整器の振幅を微調整して歪
電力の極小点を求め、上記位相調整器を微調整して歪電
力の極小点を求めるといった操作を繰り返すことによっ
て、相互変調歪電力最小点を求めるマルチキャリア共通
増幅器。2. The operation according to claim 1, wherein the intermodulation distortion power is measured by changing the phase of the amplitude adjuster by a fixed amount, and the distortion power is remeasured by further changing the phase by a fixed amount.
Find the amplitude adjustment point where the distortion power becomes the minimum, perform the same operation for the phase adjuster, find the phase adjustment point that becomes the minimum, and further finely adjust the amplitude of the amplitude adjuster to set the minimum point of the distortion power. And a fine adjustment of the phase adjuster to find the minimum point of the distortion power, and a multicarrier common amplifier for finding the minimum point of the intermodulation distortion power.
る電力増幅器おいて、 上記高周波信号を主増幅器への入力と基準信号として抽
出するための分波器と、 上記基準信号と上記主増幅器出力を引算し歪を抽出する
歪抽出回路と、 上記主増幅器と同等の利得を有し抽出した歪信号を増幅
する補助増幅器と、上記補助増幅器の入力あるいは出力
部に歪信号の振幅と位相を調整する振幅調整器と位相調
整器を設け、この歪信号を上記主増幅器出力信号に加算
し歪を除去する歪除去回路と、 上記歪除去回路の出力から抽出した信号の一部からこれ
に含まれる歪信号の電力を演算し、上記振幅調整器と上
記位相調整器を制御する歪電力演算回路を備え、 複数の高周波信号による相互変調波を抑制することを特
徴とするマルチキャリア共通増幅器。3. A power amplifier for amplifying a plurality of high frequency signals having different frequencies, a duplexer for extracting the high frequency signal as an input to a main amplifier and a reference signal, the reference signal and the main amplifier output. , A distortion extraction circuit for extracting the distortion, an auxiliary amplifier that has a gain equivalent to that of the main amplifier and amplifies the extracted distortion signal, and the amplitude and phase of the distortion signal at the input or output of the auxiliary amplifier. An amplitude adjuster and a phase adjuster for adjustment are provided, a distortion removing circuit for adding the distortion signal to the main amplifier output signal to remove distortion, and a part of the signal extracted from the output of the distortion removing circuit is included in it. A multicarrier common amplifier, comprising: a distortion power calculation circuit that calculates the power of a distortion signal to be generated and controls the amplitude adjuster and the phase adjuster, and suppresses an intermodulation wave due to a plurality of high frequency signals.
を上記補助増幅器の入力あるいは出力部に設けるだけで
なく、半固定の上記振幅調整器と上記位相調整器を分波
器と歪抽出器の間の基準信号側の伝送路にも設けたマル
チキャリア共通増幅器。4. The amplitude and phase adjusting mechanism according to claim 1, wherein not only the input or output section of the auxiliary amplifier is provided, but also the semi-fixed amplitude adjuster and phase adjuster are used as a demultiplexer and a distortion extractor. A multi-carrier common amplifier that is also installed in the transmission path on the reference signal side between devices.
ベルが小さい時刻に、上記歪抽出器の引算器出力が0と
なるように分波器出力と上記歪抽出器入力間の振幅、位
相調整を行なう上記振幅調整器と上記位相調整器を制御
する引算器出力0化演算回路を備えたマルチキャリア共
通増幅器。5. The amplitude between the demultiplexer output and the distortion extractor input so that the subtractor output of the distortion extractor becomes 0 at a time when the output level of the main amplifier is low, A multi-carrier common amplifier including the amplitude adjuster for performing phase adjustment and a subtracter output zeroing operation circuit for controlling the phase adjuster.
振幅、位相調整を行なう振幅調整器と位相調整器を設
け、上記主増幅器の出力レベルが小さい時刻に、歪抽出
器の引算器出力が0となるようにこれらを制御する引算
器出力0化演算回路を備えた請求項2のマルチキャリア
共通増幅器。6. An amplitude adjuster and a phase adjuster for adjusting amplitude and phase are provided between the output of the demultiplexer and the input of the main amplifier, and the distortion extractor is pulled at a time when the output level of the main amplifier is low. 3. The multi-carrier common amplifier according to claim 2, further comprising a subtracter output zeroization arithmetic circuit for controlling these so that the arithmetic output becomes zero.
て、位相調整器として単同調回路を用い、振幅変動分を
振幅調整器によって補正するマルチキャリア共通増幅
器。7. A multi-carrier common amplifier according to claim 1, 2, 3, 4, 5 or 6, wherein a single tuning circuit is used as a phase adjuster, and the amplitude variation is corrected by the amplitude adjuster.
上記主信号と上記相互変調出力に対する歪電力演算回路
のAD変換器の設定レベルを上記主信号の振幅よりも低
いレベルに設定し、上記主信号に対しAD変換器出力が
フルスケールを示すことによって、主信号と相互変調出
力を識別する歪電力演算回路を備えたマルチキャリア共
通増幅器。8. The method according to claim 2, 3, 4, 5, or 6,
By setting the set level of the AD converter of the distortion power calculation circuit for the main signal and the intermodulation output to a level lower than the amplitude of the main signal, and showing the full scale of the AD converter output for the main signal. , A multi-carrier common amplifier having a distortion power calculation circuit for discriminating a main signal and an intermodulation output.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7311943A JPH09153828A (en) | 1995-11-30 | 1995-11-30 | Multi-carrier common amplifier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7311943A JPH09153828A (en) | 1995-11-30 | 1995-11-30 | Multi-carrier common amplifier |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH09153828A true JPH09153828A (en) | 1997-06-10 |
Family
ID=18023309
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7311943A Pending JPH09153828A (en) | 1995-11-30 | 1995-11-30 | Multi-carrier common amplifier |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH09153828A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20010084642A (en) * | 2000-02-28 | 2001-09-06 | 서평원 | Feeforward Linearizer with Auto Gain Control Loop |
WO2001099316A1 (en) * | 2000-06-16 | 2001-12-27 | Fujitsu Limited | Multi-carrier amplifier |
JP2003101353A (en) * | 2001-09-20 | 2003-04-04 | Hitachi Kokusai Electric Inc | Feedforward nonlinear-distortion compensating amplifier |
WO2019167878A1 (en) * | 2018-03-02 | 2019-09-06 | 日本電信電話株式会社 | Power amplifier adjustment method and adjustment system |
-
1995
- 1995-11-30 JP JP7311943A patent/JPH09153828A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20010084642A (en) * | 2000-02-28 | 2001-09-06 | 서평원 | Feeforward Linearizer with Auto Gain Control Loop |
WO2001099316A1 (en) * | 2000-06-16 | 2001-12-27 | Fujitsu Limited | Multi-carrier amplifier |
US6888404B2 (en) | 2000-06-16 | 2005-05-03 | Fujitsu Limited | Multicarrier amplifying device |
JP2003101353A (en) * | 2001-09-20 | 2003-04-04 | Hitachi Kokusai Electric Inc | Feedforward nonlinear-distortion compensating amplifier |
WO2019167878A1 (en) * | 2018-03-02 | 2019-09-06 | 日本電信電話株式会社 | Power amplifier adjustment method and adjustment system |
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