JPH09153480A - Etching method of silicon - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a silicon etching method excellent in mass productivity, wherein a P-type silicon layer is etched without connecting an electrode to a silicout substrate, and a sensing layer is formed on an N-type silicon layer. SOLUTION: An N-type silicon layer 2 is epitaxially grown on the surface of a P-type silicon substrate 1, a four-layered photovoltaic layer 31 composed of a P-ytype silicon layer 31a, an N-type silicon layer 31b, a P-type silicon layer 31a, and an N-type silicon layer 31b is epitaxially grown on the N-type silicon layer 2. Then, boron is selectively and thermally diffused into the upside of the uppermost N-type silicon layer 31b of the photovoltaic layer 31 for the formation of a sensing layer 4 composed of a diffusion resist layer 4a and a contact layer 4b, and aluminum is deposited on the edge of the contact layer 4b and patterned into an electrode 5. After the substrate 1 is masked with a silicon nitride film, the substrate 1 is dipped into an alkaline water solution and etched as irradiated with light from the photovoltaic layer 31 side.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for etching silicon, and more particularly to a method for processing a silicon substrate, which is a material for fine components such as various electronic elements, by etching.

[0002]

2. Description of the Related Art A technique of incorporating various electronic parts, circuits and devices on a silicon substrate by using silicon as a raw material and subjecting it to various processes is widely known as a semiconductor process technique or a semiconductor fine processing technique. ing.

The techniques used there include a great many elemental techniques, one of which is the etching technique. The etching technique can be divided into dry etching and wet etching in terms of the etching means, and can be divided into isotropic etching and anisotropic etching in terms of the etching shape.

The dry etching is a method of chemically or physically etching using an ion, a plasma, a laser or the like in an atmosphere such as a vacuum or a reduced pressure gas without using an etching solution, which is extremely fine. Since it can perform various kinds of processing with high precision, it has come to be used as a manufacturing means for highly integrated semiconductor memory devices and the like that require fine patterns, but it requires a very expensive and complicated system device. To do.

On the other hand, wet etching is an etching method utilizing a chemical reaction in a liquid etching solution, and although it is not suitable for ultrafine processing, it can be easily performed and is widely used. There is.

The isotropic etching is an etching method in which etching is similarly generated in the depth direction and the lateral direction regardless of the crystal orientation of the material to be etched and the like. Is an etching method in which the etching rate varies depending on the direction.

These etching methods are used by selecting and combining optimal methods according to their purpose and application. For example, in the production of a dielectric isolation substrate, which is one method for ensuring electrical insulation between elements, anisotropic etching by a wet etching method is used for forming grooves for element isolation.

On the other hand, these etching techniques are not only used for electrical element fabrication, but recently, by fabricating mechanical parts of mm size and μm size, which has been impossible by conventional machining, it has been possible to achieve extremely high efficiency. Very small and high sensitivity,
Micromachining technology is being actively researched and developed as a technology for realizing a high-speed response sensor, an actuator for a special application, environment, or an extremely small object. The elemental technologies included in the micromachining technology are extremely diverse and span many technical fields. Among them, the manufacturing technology of mechanical parts applying the process technology of silicon semiconductor accurately and small parts at the same time. Since it can be manufactured in large numbers, it is generally adopted as one of the most important manufacturing techniques and is called a silicon micromachining technique.

There are various mechanical component elements that can be produced using silicon micromachining technology. For example, a cantilever beam, a double-supported beam, a slit, a groove, a dent, and the like. Although there are various methods for producing these mechanical component elements, one of the most commonly used methods at present is anisotropic etching by a wet etching method.

Some alkaline aqueous solutions (eg KO
H, EDP, hydrazine, etc.) is known to anisotropically etch silicon, but this is because the etching rate differs depending on the crystal orientation of silicon. It is possible to form an etching groove that is narrow and deep in the vertical direction.

As an example of the etching process of silicon by this anisotropic etching, a pressure sensor or an acceleration sensor is manufactured by deeply etching a silicon substrate to form a thin diaphragm. In a pressure sensor or an acceleration sensor, the thickness of the diaphragm affects the sensitivity, so it is important to control the etching in the depth direction.

As this method, there is a method of stopping etching by applying a reverse voltage to a sample having a pn junction structure (electrolytic etching). According to this method, only the p-type silicon layer is etched, The n-type silicon layer can be left.

This method will be described in more detail. FIG. 4 is an overall configuration diagram showing an electrolytic etching apparatus according to a conventional example. This is to stop etching by utilizing the fact that an oxide film is formed on the surface of the silicon substrate (anodic oxidation) by applying a positive voltage to the silicon substrate in an alkaline aqueous solution such as KOH. .

The principle of electrolytic etching will be described below. As shown in FIG. 4, p-type silicon substrate 1
An n-type silicon layer 2 is formed by epitaxial growth on the upper side, a potentiostat 7 is connected to the n-type silicon layer 2 side, and a voltage higher than a passivation voltage determined by etching conditions with an etching solution as a reference is applied. Further, SiO 2 or the like is formed as an etching mask 9 on a part of one surface of the p-type silicon substrate 1. Further, the other portions are protected by the protective film 11 so as not to come into contact with the alkaline aqueous solution 10 such as potassium hydroxide aqueous solution.
Covered with. Here, since the p-type silicon substrate 1 side is exposed to the alkaline aqueous solution 10, the p-type silicon substrate 1 has the same potential as the alkaline aqueous solution 10 and is etched. When the etching progresses to the pn junction, the n-type silicon layer 2 has a voltage higher than the passivation voltage. Therefore, an oxide film is formed on the surface of the n-type silicon layer 2 by anodic oxidation, and the etching stops there.

According to this method, since the etching can be stopped at the pn junction, the thickness of the diaphragm is determined by the thickness of the n-type silicon layer 2 to be formed.
There is an advantage that the thickness of the diaphragm can be easily controlled. However, since it is necessary to apply a voltage to the n-type silicon layer 2, the etching apparatus becomes complicated and it is not suitable for mass production.

As a method of solving this problem, as shown in FIG. 5, there is a method of utilizing the photovoltaic power of the pn junction.
As the silicon substrate, as shown in FIG. 5, a p-type silicon layer 13 formed by epitaxial growth on an n-type silicon substrate 12 is used. This method utilizes the fact that photoelectromotive force is generated when a silicon substrate having a pn junction is irradiated with light, so that the p-type silicon layer 13 is positively charged and only the n-type silicon substrate 12 is selectively etched. It is a thing. The etching stop mechanism is that when the etching proceeds to the pn junction and the p-type silicon layer 13 is exposed to the alkaline aqueous solution 10, an oxide film is formed on the surface of the p-type silicon layer 13 by anodic oxidation. The etching is stopped by leaving the layer 13. According to this method, it is not necessary to attach an electrode to the silicon substrate, and a special device for etching (reference electrode, counter electrode, potentiometer, etc.) is not necessary, so that mass production is facilitated.

[0017]

However, in the above-mentioned method, the layer to be etched in the pn junction substrate is the n-type silicon layer, so that the sensing element is necessarily formed on the p-type silicon layer. There was a problem that it was limited to.

Further, in general, a semiconductor element is often formed on an n-type silicon layer, so that the above-mentioned structure is a major limitation in forming a semiconductor element.

In addition, the concentration of the substrate is also limited in order to obtain sufficient photovoltaic power to stop the etching.

The present invention has been made in view of the above points, and an object of the present invention is to etch a p-type silicon layer without connecting an electrode to a silicon substrate to form an n-type silicon layer on the n-type silicon layer. A sensing layer can be formed on the
An object of the present invention is to provide a silicon etching method that is highly producible in mass production.

[0021]

According to the first aspect of the present invention,
In a silicon etching method for processing a silicon substrate having a pn junction between a p-type silicon layer and an n-type silicon layer by etching, the silicon substrate side is a positive side on the n-type silicon layer of the silicon substrate. To form a single-layer or multi-layered photovoltaic layer, irradiate the photovoltaic layer with light, and perform etching in an alkaline aqueous solution to selectively etch only the p-type silicon layer. It is characterized by having done.

According to a second aspect of the present invention, in the silicon etching method according to the first aspect, the photovoltaic layer is formed of silicon by epitaxial growth.

According to a third aspect of the present invention, in the silicon etching method according to the first aspect, the photovoltaic layer is formed of polycrystalline silicon.

According to a fourth aspect of the present invention, in the silicon etching method according to the first aspect, the photovoltaic layer is formed of amorphous silicon.

[0025]

BEST MODE FOR CARRYING OUT THE INVENTION

First Embodiment Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a schematic cross-sectional view showing a sensing element manufactured by a silicon etching method according to an embodiment of the present invention. First, the n-type silicon layer 2 is formed by epitaxial growth on the surface of the p-type silicon substrate 1 having the (100) plane as the surface. Then, on the n-type silicon layer 2, the p-type silicon layer 31a,
Four layers are laminated in the order of the n-type silicon layer 31b, the p-type silicon layer 31a, and the n-type silicon layer 31b to form the photovoltaic layer 31 composed of four layers. Here, the substrate temperature of the p-type silicon substrate 1 at the time of performing epitaxial growth in the present embodiment is about 1100 to 1200 ° C.

In this embodiment, the photovoltaic layer 31 composed of four layers of the p-type silicon layer 31a and the n-type silicon layer 31b is formed on the n-type silicon layer 2, but the present invention is not limited to this. There is no need, and the photovoltaic layer 31 may be laminated in any number as long as there are at least one pair of two layers of the p-type silicon layer 31a and the n-type silicon layer 31b.

Next, n, which is the uppermost layer of the photovoltaic layer 31.
Boron is selectively thermally diffused on the upper surface of the type silicon layer 31b to form the sensing layer 4 including the diffusion resistance 4a and the contact layer 4b. Further, an aluminum layer is formed on the upper surfaces of the n-type silicon layer 31b and the sensing layer 4 by an electron beam evaporation method, and the formed aluminum layer is patterned into a predetermined shape by a photolithography process to form a contact layer constituting the sensing layer 4. The electrode 5 is formed at the end of 4b.

Although the diffusion resistance 4a is used as the resistance forming the sensing layer 4, the resistance is not limited to this, and a thin film resistance, a thermistor or the like may be used.

After masking with the silicon nitride film (the entire surface is masked on the sensing layer 4 side and the pattern mask is on the p-type silicon substrate 1 side), it is immersed in an alkaline aqueous solution such as an aqueous potassium hydroxide solution, Photovoltaic layer 3
Etching is performed while irradiating light from the 1 side. When the p-type silicon substrate 1 is etched, the portion not having the pattern mask is etched to form the recesses 6 as shown in FIG. 1, and when the etching proceeds until the n-type silicon layer 2 is exposed, n Since the type silicon layer 2 is positively charged by the voltage generated in the photovoltaic layer 31, an oxide film is formed on its surface by anodic oxidation,
Then the etching stops. Through the above steps, FIG.
The sensing element shown in is produced.

Therefore, in this embodiment, since the photovoltaic layer 31 is formed of silicon by epitaxial growth, the p-type silicon substrate 1 can be etched without connecting electrodes, and the n-type silicon layer 31b can be etched. The sensing layer 4 can be formed on the substrate.

Second Embodiment FIG. 2 is a schematic cross-sectional view showing a sensing element manufactured by the silicon etching method according to one embodiment of the present invention. First, the n-type silicon layer 2 is formed by epitaxial growth on the surface of the p-type silicon substrate 1 having the (100) plane as the surface. Here, the substrate temperature of the p-type silicon substrate 1 at the time of performing epitaxial growth in the present embodiment is about 1100 to 1200 ° C. Then, boron is selectively thermally diffused on the upper surface of the n-type silicon layer 2 to form the sensing layer 4 including the diffusion resistance 4a and the contact layer 4b.

Although the diffusion resistance 4a is used as the resistance forming the sensing layer 4, the resistance is not limited to this, and a thin film resistance, a thermistor or the like may be used.

Next, the p-type polycrystalline silicon layer 32a, the n-type polycrystalline silicon layer 32b, the p-type polycrystalline silicon layer 32a, and the n-type polycrystalline layer 32a are formed on the upper surfaces of the n-type silicon layer 2 and the sensing layer 4 by the low pressure CVD method. 4 in the order of the crystalline silicon layer 32b
The layers are stacked to form a photovoltaic layer 32 of four layers. Here, the substrate temperature of the p-type silicon substrate 1 when performing the low pressure CVD method in the present embodiment is about 700 to 80.
0 ° C.

In the present embodiment, the four p-type polycrystalline silicon layers 32a and the n-type polycrystalline silicon layers 32b are provided.
Although the photovoltaic layer 32 composed of a layer is formed on the n-type silicon layer 2 and the sensing layer 4, the photovoltaic layer 32 is not limited to this, and the photovoltaic layer 32 includes the p-type polycrystalline silicon layer 32a and the n-type polycrystalline silicon layer 32a. Any number of two or more crystalline silicon layers 32b may be stacked.

Next, a contact hole reaching the contact layer 4b of the sensing layer 4 is formed in the photovoltaic layer 32, an aluminum layer is formed by an electron beam evaporation method, and the formed aluminum layer is formed by a photolithography process. The electrode 5 is formed on the end portion of the contact layer 4b forming the sensing layer 4 by patterning into a predetermined shape.

After masking with the silicon nitride film (the entire surface of the sensing layer 4 side is masked, and the p-type silicon substrate 1 side is patterned mask), it is immersed in an alkaline aqueous solution such as an aqueous potassium hydroxide solution, Photovoltaic layer 3
Etching is performed while irradiating light from the 2 side. When the p-type silicon substrate 1 is etched, a portion not having a pattern mask is etched to form a recess 6 as shown in FIG. 2. When the etching proceeds until the n-type silicon layer 2 is exposed, n Since the type silicon layer 2 is positively charged by the voltage generated in the photovoltaic layer 32, an oxide film is formed on its surface by anodic oxidation,
Then the etching stops. By the above steps, FIG.
The sensing element shown in is produced.

Therefore, the concentration of the photovoltaic layer 32 is restricted in order to obtain a sufficient photovoltaic force to stop the etching, but in the present embodiment, the photovoltaic layer 3 is limited.
Since 2 is formed of polycrystalline silicon by the low pressure CVD method, the sensing layer 4 can be formed on the n-type silicon layer 2, and the n-type silicon layer 2 forming the sensing layer 4 can be formed.
There is no restriction on the concentration of.

= Embodiment 3 = FIG. 3 is a schematic sectional view showing a sensing element manufactured by a silicon etching method according to an embodiment of the present invention. First, the n-type silicon layer 2 is formed by epitaxial growth on the surface of the p-type silicon substrate 1 having the (100) plane as the surface. Here, the substrate temperature of the p-type silicon substrate 1 at the time of performing epitaxial growth in the present embodiment is about 1100 to 1200 ° C. Then, boron is selectively thermally diffused on the upper surface of the n-type silicon layer 2 to form the sensing layer 4 including the diffusion resistance 4a and the contact layer 4b.

Although the diffusion resistance 4a is used as the resistance forming the sensing layer 4, the resistance is not limited to this, and a thin film resistance, a thermistor or the like may be used.

Next, an aluminum layer is formed on the n-type silicon layer 2 and the sensing layer 4 by an electron beam evaporation method, and the formed aluminum layer is patterned into a predetermined shape by a photolithography process, so that the sensing layer 4 is formed. The electrode 5 is formed at the end of the constituent contact layer 4b. Then, the p-type amorphous silicon layer 33a, the i-type amorphous silicon layer 33b, the n-type amorphous silicon layer 33c, the p-type amorphous silicon layer 33a, and the upper surface of the n-type silicon layer 2, the sensing layer 4, and the electrode 5 are formed by the plasma CVD method. Six layers are laminated in order of the i-type amorphous silicon layer 33b and the n-type amorphous silicon layer 33c to form the photovoltaic layer 33 composed of six layers. here,
The substrate temperature of the p-type silicon substrate 1 when performing the plasma CVD method in this embodiment is about 200 ° C.

In this embodiment, the photovoltaic layer 33 composed of six layers of the p-type amorphous silicon layer 33a, the i-type amorphous silicon layer 33b, and the n-type amorphous silicon layer 33c is the n-type silicon layer 2 and the sensing layer. 4, it is formed on the electrode 5, but it is not limited to this, and the photovoltaic layer 33 is the p-type amorphous silicon layer 33.
Any number of three layers a, i-type amorphous silicon layer 33b, and n-type amorphous silicon layer 33c may be stacked as long as they are one set or more.

Then, after masking with the silicon nitride film (the entire surface of the sensing layer 4 side is masked and the p-type silicon substrate 1 side is patterned mask), it is immersed in an alkaline aqueous solution such as a potassium hydroxide aqueous solution, Photovoltaic layer 3
Etching is performed while irradiating light from the 3 side. When the p-type silicon substrate 1 is etched, a portion where the pattern mask is not formed is etched to form the concave portion 6 as shown in FIG. 3, and when the etching proceeds until the n-type silicon layer 2 is exposed, n Since the type silicon layer 2 is positively charged by the voltage generated in the photovoltaic layer 33, an oxide film is formed on its surface by anodic oxidation.
Then the etching stops. By the above steps, FIG.
The sensing element shown in is produced.

Therefore, the concentration of the photovoltaic layer 33 is restricted in order to obtain a sufficient photovoltaic force to stop the etching, but in this embodiment, the photovoltaic layer 3 is used.
Since 3 is formed of amorphous silicon by the plasma CVD method, the sensing layer 4 and the electrode 5 can be formed on the n-type silicon layer 2, and the concentration of the n-type silicon layer 2 forming the sensing layer 4 is restricted. Absent. Also, n
Since the sensing layer 4 and the electrode 5 are formed on the type silicon layer 2, the photovoltaic layer 33 is removed after etching with an alkaline aqueous solution such as a potassium hydroxide aqueous solution.
The thickness of the beam of the diaphragm that forms the ceiling of the recess 6 can be reduced, and thus the sensitivity of the sensing layer 4 can be increased.

[0044]

According to the first aspect of the present invention, there is provided a silicon etching method for processing a silicon substrate having a pn junction between a p-type silicon layer and an n-type silicon layer by etching. A single-layer or multi-layer photovoltaic layer is formed on the silicon substrate so that the silicon substrate side is the positive side, the photovoltaic layer is irradiated with light, and etching is performed in an alkaline aqueous solution to obtain p-type silicon. Since only the layer is selectively etched, it is not necessary to connect the electrode to the silicon substrate, and the p-type silicon layer is etched without connecting the electrode to the silicon substrate to form the sensing layer on the n-type silicon layer. Thus, it was possible to provide a method for etching a silicon which can be formed and which has high mass productivity.

According to a second aspect of the present invention, in the silicon etching method according to the first aspect, since the photovoltaic layer is formed of silicon by epitaxial growth, the n-type silicon layer is not connected to the silicon substrate. A sensing layer can be formed on top.

According to a third aspect of the present invention, in the silicon etching method according to the first aspect, since the photovoltaic layer is formed of polycrystalline silicon, the sensing layer is formed on a silicon layer different from the photovoltaic layer. Can be formed without being restricted by the concentration of the silicon layer forming the sensing layer.

According to a fourth aspect of the present invention, in the silicon etching method according to the first aspect, since the photovoltaic layer is formed of amorphous silicon, the sensing layer is formed on a silicon layer different from the photovoltaic layer. Can be formed,
There is no restriction on the concentration of the silicon layer forming the sensing layer, and the thickness of the diaphragm beam can be reduced by removing the photovoltaic layer after etching in an alkaline aqueous solution. The sensitivity of the sensing layer can be increased.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view showing a sensing element manufactured by a silicon etching method according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view showing a sensing element manufactured by a silicon etching method according to another embodiment of the present invention.

FIG. 3 is a schematic cross-sectional view showing a sensing element manufactured by a silicon etching method according to another embodiment of the present invention.

FIG. 4 is an overall configuration diagram showing an electrolytic etching apparatus according to a conventional example.

FIG. 5 is an overall configuration diagram showing an electrolytic etching apparatus according to a conventional example.

[Explanation of symbols]

 1 p-type silicon substrate 2 n-type silicon layer 4 sensing layer 4a diffusion resistance 4b contact layer 5 electrode 6 recess 7 potentiostat 8 etching mask 9 alkaline aqueous solution 10 protective film 11 n-type silicon substrate 12 p-type silicon layer 31 photovoltaic layer 31a p-type silicon layer 31b n-type silicon layer 32 photovoltaic layer 32a p-type polycrystalline silicon layer 32b n-type polycrystalline silicon layer 33 photovoltaic layer 33a p-type amorphous silicon layer 33b i-type amorphous silicon layer 33c n-type amorphous Silicon layer

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[Procedure amendment]

[Submission date] January 26, 1996

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0014

[Correction method] Change

[Correction contents]

The principle of electrolytic etching will be described below. As shown in FIG. 4, p-type silicon substrate 1
An n-type silicon layer 2 is formed by epitaxial growth on the upper side, a potentiostat 7 is connected to the n-type silicon layer 2 side, and a voltage higher than a passivation voltage determined by etching conditions with an etching solution as a reference is applied. Further, SiO ₂ or the like is formed as an etching mask 9 on a part of one surface of the p-type silicon substrate 1. Further, the other portions are protected by the protective film 11 so as not to come into contact with the alkaline aqueous solution 10 such as potassium hydroxide aqueous solution.
Covered with. Here, since the p-type silicon substrate 1 side is exposed to the alkaline aqueous solution 10, the p-type silicon substrate 1 has the same potential as the alkaline aqueous solution 10 and is etched. When the etching progresses to the pn junction, the n-type silicon layer 2 has a voltage higher than the passivation voltage. Therefore, an oxide film is formed on the surface of the n-type silicon layer 2 by anodic oxidation, and the etching stops there.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication H01L 29/84 H01L 21/306 31/10 31/10 A

Claims (4)

[Claims] 1. A p of a p-type silicon layer and an n-type silicon layer
In a silicon etching method for processing a silicon substrate having an n-junction by etching, a single-layer or multi-layer photovoltaic layer in which the silicon substrate side is a positive side on an n-type silicon layer of the silicon substrate. And irradiating the photovoltaic layer with light, and etching is performed in an alkaline aqueous solution so that only the p-type silicon layer is selectively etched. Method. 2. The method for etching silicon according to claim 1, wherein the photovoltaic layer is formed of silicon by epitaxial growth. 3. The silicon etching method according to claim 1, wherein the photovoltaic layer is formed of polycrystalline silicon. 4. The method for etching silicon according to claim 1, wherein the photovoltaic layer is formed of amorphous silicon.