JPH09149641A - Switching power supply circuit - Google Patents

Switching power supply circuit

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Publication number
JPH09149641A
JPH09149641A JP32392695A JP32392695A JPH09149641A JP H09149641 A JPH09149641 A JP H09149641A JP 32392695 A JP32392695 A JP 32392695A JP 32392695 A JP32392695 A JP 32392695A JP H09149641 A JPH09149641 A JP H09149641A
Authority
JP
Japan
Prior art keywords
voltage
output
control
switching
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP32392695A
Other languages
Japanese (ja)
Inventor
宣次 ▲たか▼山
Noritsugu Takayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP32392695A priority Critical patent/JPH09149641A/en
Publication of JPH09149641A publication Critical patent/JPH09149641A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To suppress an overvoltage at the time of mode switching by a method wherein, while the output voltage stabilization control based upon a first voltage is discontinued, a second voltage is temporarily elevated and the discontinuation of the output voltage stabilization control is temporarily delayed. SOLUTION: When a control voltage applied to a monitor control terminal 32 is changed from 0V to 5 V, an output voltage of 140V is outputted from an intermediate voltage output terminal 11 a time Ta later. During the time Ta, the control of a switching controller 16 in accordance with the intermediate voltage is not performed. On the other hand, if a monitor control voltage is changed from 0V to 5V while the output voltage of a low voltage output terminal 21 is 14.5V, a low voltage output voltage detecting transistor 26 is turned off and the control of the switching controller 16 is not performed. Then, if the output voltage of a low voltage output terminal 21 is elevated to 15.5 V for the time Ta only, the potential of the base 27 of the low voltage output voltage detecting transistor 26 is high enough to turn on the transistor 26 and hence the control of the switching controller 16 is performed for the time Ta only. As a result, an overvoltage can be suppressed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、VTR(ビデオテ
ープレコーダ)のみ動作させる軽負荷モードと、VTR
とTV(テレビジョン受像機)両方を動作させるTVモ
ードを有するVTR付きTVのように、第1の電源電圧
と第2の電源電圧が安定に供給されることを要する電子
機器のスイッチング電源回路に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light load mode in which only a VTR (video tape recorder) is operated and a VTR.
The present invention relates to a switching power supply circuit for an electronic device, such as a TV with a VTR having a TV mode for operating both a TV and a television (television receiver), which requires stable supply of a first power supply voltage and a second power supply voltage. It is a thing.

【0002】[0002]

【従来の技術】従来のスイッチング電源回路について、
VTRのみ動作させる軽負荷モードと、VTRとTV両
方を動作させるTVモードを有するVTR付きTVの場
合について説明する。図3は従来のスイッチング電源回
路の回路図であり、直流入力電圧端子1,2はスイッチ
ング出力回路3を介してスイッチングトランス4の1次
巻線5に接続し、スイッチングトランス4の中圧用2次
巻線6の一方の端子7は整流ダイオード8,リレー9の
接点10を介して中圧出力端子11に接続し、中圧出力
端子11に接続された中圧出力電圧検出回路12の中圧
出力電圧検出端子13は中圧出力電圧検出ダイオード1
4,フォトカプラー15を介してスイッチング制御回路
16に接続し、スイッチング制御回路16はスイッチン
グ出力回路3に接続している。17は中圧出力端子11
とアース間に接続された平滑用コンデンサである。一
方、スイッチングトランス4の低圧用2次巻線18の一
方の端子19は整流ダイオード20を介して低圧出力端
子21に接続し、低圧出力端子21は低圧出力電圧検出
回路22の分圧抵抗23,24を介してアースに接続
し、分圧抵抗23,24の接続点25は低圧出力電圧検
出トタンジスタ26のベース27に接続し、低圧出力電
圧検出トタンジスタ26のコレクタ28は低圧出力電圧
検出ダイオード29,フォトカプラー15を介してスイ
ッチング制御回路16に接続し、低圧出力電圧検出トタ
ンジスタ26のエミッタ30は低圧出力電圧設定ツエナ
ーダイオード31を介してアースに接続している。モニ
タ制御端子32は、低圧出力電圧検出回路22の低圧出
力電圧検出トタンジスタ26のベース27にコレクタ3
3が接続したモード切替トランジスタ34のベース35
に遅延回路抵抗36,バイアス抵抗37を介して接続
し、遅延回路抵抗36とバイアス抵抗37の接続点38
とアースおよびモニタ制御端子32との間に遅延回路コ
ンデンサ39および遅延回路ダイオード40が、またモ
ード切替トランジスタ34のベース35とアース間に遅
延回路抵抗41がそれぞれ接続している。42は低圧出
力端子21とアース間に接続された平滑用コンデンサで
ある。またモニタ制御端子32はリレードライブ抵抗4
3を介してリレードライブトランジスタ44のベース4
5に接続し、リレードライブトランジスタ44のコレク
タ46はリレー9のリレー駆動コイル47を介して低圧
出力端子21に接続し、エミッタ48はアースに接続し
ている。
2. Description of the Related Art Regarding a conventional switching power supply circuit,
A case of a TV with a VTR having a light load mode in which only the VTR operates and a TV mode in which both the VTR and the TV operate will be described. FIG. 3 is a circuit diagram of a conventional switching power supply circuit, in which the DC input voltage terminals 1 and 2 are connected to the primary winding 5 of the switching transformer 4 via the switching output circuit 3 and the secondary transformer for medium voltage of the switching transformer 4 is connected. One terminal 7 of the winding 6 is connected to the intermediate pressure output terminal 11 via the rectifying diode 8 and the contact 10 of the relay 9, and the intermediate pressure output voltage detection circuit 12 connected to the intermediate pressure output terminal 11 outputs the intermediate voltage. The voltage detection terminal 13 is a medium voltage output voltage detection diode 1
4, it is connected to the switching control circuit 16 via the photo coupler 15, and the switching control circuit 16 is connected to the switching output circuit 3. 17 is a medium voltage output terminal 11
Is a smoothing capacitor connected between the ground and the ground. On the other hand, one terminal 19 of the low voltage secondary winding 18 of the switching transformer 4 is connected to a low voltage output terminal 21 via a rectifying diode 20, and the low voltage output terminal 21 is a voltage dividing resistor 23 of a low voltage output voltage detection circuit 22. Connected to ground via 24, the connection point 25 of the voltage dividing resistors 23, 24 is connected to the base 27 of the low voltage output voltage detection transistor 26, and the collector 28 of the low voltage output voltage detection transistor 26 has a low voltage output voltage detection diode 29, It is connected to the switching control circuit 16 via the photocoupler 15, and the emitter 30 of the low voltage output voltage detecting transistor 26 is connected to the ground via the low voltage output voltage setting zener diode 31. The monitor control terminal 32 has a collector 3 on the base 27 of the low voltage output voltage detecting transistor 26 of the low voltage output voltage detecting circuit 22.
3 is connected to the base 35 of the mode switching transistor 34
To the connection point 38 of the delay circuit resistor 36 and the bias resistor 37 via the delay circuit resistor 36 and the bias resistor 37.
A delay circuit capacitor 39 and a delay circuit diode 40 are connected between the ground and the monitor control terminal 32, and a delay circuit resistor 41 is connected between the base 35 of the mode switching transistor 34 and the ground. 42 is a smoothing capacitor connected between the low voltage output terminal 21 and the ground. The monitor control terminal 32 is a relay drive resistor 4
Base 4 of the relay drive transistor 44 through 3
5, the collector 46 of the relay drive transistor 44 is connected to the low voltage output terminal 21 via the relay drive coil 47 of the relay 9, and the emitter 48 is connected to the ground.

【0003】次に、上記の従来のスイッチング電源回路
の動作について説明をする。直流入力電圧端子1,2の
直流入力電圧をスイッチング出力回路3でスイッチング
し、スイッチングトランス4の1次巻線5に加え、中圧
用2次巻線6と低圧用2次巻線18からそれぞれTV用
の中圧出力電圧とVTR用の低圧出力電圧を取り出し、
整流ダイオード8,20と平滑用コンデンサ17,42
でそれぞれ整流,平滑し、中圧出力端子11にはリレー
接点10を介して、低圧出力端子21には直接に出力を
得るものである。次に中圧出力電圧または低圧出力電圧
の誤差を中圧出力電圧検出回路12または低圧出力電圧
検出回路22で検出し、その誤差信号をフォトカプラー
15を介してスイッチング制御回路16に伝え、この誤
差信号が最小になるようにスイッチング出力回路3の出
力電圧を制御するものである。
Next, the operation of the above conventional switching power supply circuit will be described. The DC input voltage of the DC input voltage terminals 1 and 2 is switched by the switching output circuit 3 and is added to the primary winding 5 of the switching transformer 4, and the secondary winding 6 for medium voltage and the secondary winding 18 for low voltage are respectively used for TV. Take out the medium voltage output voltage for VTR and the low voltage output voltage for VTR,
Rectifying diodes 8 and 20 and smoothing capacitors 17 and 42
Each of them is rectified and smoothed, and an output is directly obtained at the low voltage output terminal 21 via the relay contact 10 at the intermediate voltage output terminal 11. Next, the error of the medium voltage output voltage or the low voltage output voltage is detected by the medium voltage output voltage detection circuit 12 or the low voltage output voltage detection circuit 22, and the error signal is transmitted to the switching control circuit 16 via the photocoupler 15, and this error is detected. The output voltage of the switching output circuit 3 is controlled so that the signal becomes minimum.

【0004】このような状態において、モニタ制御端子
32に印加されるモニタ制御電圧Emが図4の(a)の
電圧波形図に示すように、0Vから5Vに変化すると、
リレードライブトランジスタ44のベース45に5Vの
モニタ制御電圧Emがリレードライブ抵抗43を介して
印加されることになり、リレードライブトランジスタ4
4が導通し、リレー駆動コイル47にリレー駆動電流が
流れ、リレー接点10が閉成し、中圧出力端子11にス
イッチングトランス4の中圧用2次巻線6の一方の端子
7の電圧例えば中圧出力電圧検出回路12で設定される
140VのTV用の中圧出力電圧が現れるのであるが、
図4の(b)に示すようにモニタ制御端子32に5Vの
モニタ制御電圧Emが印加されてからリレー接点10が
閉成するまでにTαの時間遅れが生じ、中圧出力電圧検
出回路12からの出力が無い時間が生じることになり、
その間、中圧出力電圧の誤差信号に基づくスイッチング
出力回路3の制御が行われなくなる。しかしその時、モ
ニタ制御端子32に印加された5Vのモニタ制御電圧E
mは図4の(c)に示すように、遅延回路抵抗36,遅
延回路コンデンサ39等よりなる遅延回路によりTβの
時間遅れてモード切替トランジスタ34のベース35に
加えられることになり、モード切替トランジスタ34が
導通し、低圧出力電圧検出トタンジスタ26が遮断状態
になり、低圧出力電圧の誤差信号に基づくスイッチング
出力回路3の制御が行われなくなるのは、5Vのモニタ
制御電圧Emが印加されてからTβの時間後になり、T
α<Tβに選ぶことにより、スイッチング出力回路3の
制御が全く無くなる状態を無くしている。この時、低圧
出力端子21に現れる低圧出力電圧はスイッチングトラ
ンス4の中圧用2次巻線6と低圧用2次巻線18の巻数
比、負荷で設定した電圧例えば14.5Vになる。
In such a state, when the monitor control voltage Em applied to the monitor control terminal 32 changes from 0V to 5V as shown in the voltage waveform diagram of FIG.
The monitor control voltage Em of 5V is applied to the base 45 of the relay drive transistor 44 via the relay drive resistor 43, and the relay drive transistor 4
4, the relay drive current flows through the relay drive coil 47, the relay contact 10 is closed, and the voltage of one terminal 7 of the intermediate voltage secondary winding 6 of the switching transformer 4 at the intermediate voltage output terminal 11, for example, The 140V TV medium voltage output voltage set by the voltage output voltage detection circuit 12 appears.
As shown in FIG. 4B, there is a time delay of Tα from the application of the 5V monitor control voltage Em to the monitor control terminal 32 until the relay contact 10 is closed. There will be a time when there is no output of
During that time, the switching output circuit 3 is not controlled based on the error signal of the medium voltage output voltage. However, at that time, the monitor control voltage E of 5 V applied to the monitor control terminal 32 is applied.
As shown in (c) of FIG. 4, m is added to the base 35 of the mode switching transistor 34 with a delay of Tβ by a delay circuit including a delay circuit resistor 36, a delay circuit capacitor 39, etc. 34 becomes conductive, the low-voltage output voltage detection transistor 26 is turned off, and the control of the switching output circuit 3 based on the error signal of the low-voltage output voltage is not performed because Tβ is applied after the monitor control voltage Em of 5V is applied. After time, T
By selecting α <Tβ, the state where the control of the switching output circuit 3 is completely lost is eliminated. At this time, the low-voltage output voltage appearing at the low-voltage output terminal 21 becomes a voltage set by the winding ratio of the intermediate-voltage secondary winding 6 and the low-voltage secondary winding 18 of the switching transformer 4 and the voltage set at the load, for example, 14.5V.

【0005】今度は逆に、モニタ制御電圧Emが5Vか
ら0Vに変化すると、リレードライブトランジスタ44
が遮断状態となり、リレー駆動コイル47に流れていた
リレー駆動電流が無くなり、モニタ制御電圧Emが0V
に切替わってからTα時間後にリレー接点10が開き、
中圧出力端子11の中圧出力電圧は0となり、中圧出力
電圧検出回路12からの出力が無くなり、中圧出力電圧
の誤差信号に基づくスイッチング出力回路3の制御が行
われなくなる。一方、モニタ制御電圧Emが0Vに切替
わる前はスイッチング出力回路3の制御を行なう低圧出
力電圧検出回路22の出力が0であった状態が、モニタ
制御電圧Emが0Vに切替わっても直ちに変化して、低
圧出力電圧検出回路22に制御信号が現れるものではな
く、遅延回路抵抗36,遅延回路コンデンサ39等より
なる遅延回路により制御信号が現れるのはモニタ制御電
圧Emが0Vに切替わってからTβ時間後であり、Tα
<Tβであるため、中圧出力電圧検出回路12からの出
力が無くなった後も暫くは低圧出力電圧検出回路22か
らの出力が無い状態が続き、一定時間後に低圧出力電圧
検出回路22に制御信号が現れるものである。この時、
モード切替トランジスタ34が非導通となり、低圧出力
電圧検出トタンジスタ26が導通し、低圧出力端子21
に現れる低圧出力電圧は低圧出力電圧設定用の分圧抵抗
23,24の分割比、低圧出力電圧設定ツエナーダイオ
ード31および低圧出力電圧検出トランジスタ26のベ
ース電圧できまり、例えば14.5Vである。
Conversely, when the monitor control voltage Em changes from 5V to 0V, the relay drive transistor 44 is turned on.
Turns off, the relay drive current flowing through the relay drive coil 47 disappears, and the monitor control voltage Em is 0V.
The relay contact 10 opens after Tα time after switching to
The intermediate voltage output voltage of the intermediate voltage output terminal 11 becomes 0, the output from the intermediate voltage output voltage detection circuit 12 disappears, and the switching output circuit 3 is not controlled based on the error signal of the intermediate voltage output voltage. On the other hand, the state in which the output of the low-voltage output voltage detection circuit 22 that controls the switching output circuit 3 was 0 before the monitor control voltage Em was switched to 0V immediately changed even when the monitor control voltage Em was switched to 0V. Then, the control signal does not appear in the low voltage output voltage detection circuit 22, but the control signal appears by the delay circuit including the delay circuit resistor 36, the delay circuit capacitor 39, etc. after the monitor control voltage Em is switched to 0V. After Tβ time, Tα
Since <Tβ, there is no output from the low-voltage output voltage detection circuit 22 for a while after the output from the medium-voltage output voltage detection circuit 12 disappears, and the control signal is sent to the low-voltage output voltage detection circuit 22 after a certain period of time. Is what appears. At this time,
The mode switching transistor 34 becomes non-conductive, the low voltage output voltage detection transistor 26 becomes conductive, and the low voltage output terminal 21
The low-voltage output voltage appearing at is determined by the division ratio of the voltage dividing resistors 23 and 24 for setting the low-voltage output voltage, the base voltage of the low-voltage output voltage setting zener diode 31 and the low-voltage output voltage detecting transistor 26, and is, for example, 14.5V.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、上記の
従来のスイッチング電源回路ではモニタ制御電圧Emが
5Vから0Vに切替わってリレー接点10が開き、中圧
出力電圧検出回路12がノンアクティブとなった後、低
圧出力電圧検出回路22での電圧安定制御がアクティブ
になるのが、遅延回路抵抗36,遅延回路コンデンサ3
9等よりなる遅延回路でモード切替トランジスタ34が
非導通になるのが遅れるため、遅延回路ダイオード4
0,遅延回路抵抗41の改善回路を付けても完全には電
圧安定の制御の途切れを無くすることができず、例え
ば、図4の(d)に示すような低圧出力電圧における過
電圧を発生するという問題を有していた。
However, in the above-mentioned conventional switching power supply circuit, the monitor control voltage Em is switched from 5V to 0V to open the relay contact 10 and the intermediate voltage output voltage detection circuit 12 becomes non-active. After that, the voltage stabilization control in the low voltage output voltage detection circuit 22 becomes active when the delay circuit resistor 36 and the delay circuit capacitor 3 are activated.
Since it is delayed that the mode switching transistor 34 becomes non-conductive in the delay circuit including the delay circuit 9 and the like, the delay circuit diode 4
0, even if the improvement circuit of the delay circuit resistance 41 is attached, the interruption of the voltage stability control cannot be completely eliminated, and, for example, an overvoltage at the low voltage output voltage as shown in FIG. 4D is generated. Had a problem.

【0007】本発明は上記の従来の問題点を解決するこ
とを目的とするものである。
The present invention aims to solve the above conventional problems.

【0008】[0008]

【課題を解決するための手段】上記の問題点を解決する
ために、本発明は、第1の電圧と第2の電圧を出力し、
その出力電圧を検出して得た電圧に基づいて出力電圧を
安定に制御する電圧制御回路を備えたスイッチング電源
回路において、モード切替時に、リレーの動作遅れによ
り第1の電圧が現れず、第1の電圧に基づく出力電圧安
定の制御が途切れている間、第2の電圧を通常の状態に
おける電圧よりも一時的に高くし、第2の電圧に基づく
出力電圧安定の制御が途切れるのを一時的に遅らせるこ
とにより、出力電圧安定の制御が全く無くなると言った
事態を無くするものである。
In order to solve the above-mentioned problems, the present invention outputs a first voltage and a second voltage,
In a switching power supply circuit including a voltage control circuit that stably controls the output voltage based on the voltage obtained by detecting the output voltage, the first voltage does not appear due to a delay in the operation of the relay during mode switching, and the first voltage While the control of the output voltage stabilization based on the voltage of is interrupted, the second voltage is temporarily made higher than the voltage in the normal state, and the control of the output voltage stabilization based on the second voltage is temporarily interrupted. This delays the situation in which the output voltage stabilization control is completely lost.

【0009】これにより、モード切替時の過電圧発生を
安定的に抑えたスイッチング電源回路を得ることができ
る。
As a result, it is possible to obtain a switching power supply circuit in which the occurrence of overvoltage during mode switching is stably suppressed.

【0010】[0010]

【発明の実施の形態】本発明の請求項1に記載の発明
は、第1の電圧と第2の電圧を出力し、その出力電圧を
検出して得た電圧に基づいて出力電圧を安定に制御する
電圧制御回路を備え、モード切替時にリレーの動作遅れ
により第1の電圧が現れず、第1の電圧に基づく出力電
圧安定の制御が途切れている間、第2の電圧を通常の状
態における電圧よりも一時的に高くし、第2の電圧に基
づく出力電圧安定の制御が途切れるのを一時的に遅らせ
ることにより、出力電圧安定の制御が全く無くなる事態
を無くしたスイッチング電源回路であり、モード切替時
に、第1の電圧に基づいた電圧安定制御が行われるまで
第2の電圧に基づいた電圧安定制御が継続して行われる
ものである。
BEST MODE FOR CARRYING OUT THE INVENTION The invention according to claim 1 of the present invention outputs a first voltage and a second voltage, and stabilizes the output voltage based on the voltage obtained by detecting the output voltage. The first voltage does not appear due to the delay of the operation of the relay at the time of mode switching, and the control of the output voltage stabilization based on the first voltage is interrupted while the second voltage in the normal state is provided. It is a switching power supply circuit that eliminates the situation where the output voltage stabilization control is completely lost by temporarily raising the voltage higher than the voltage and temporarily stopping the interruption of the output voltage stabilization control based on the second voltage. At the time of switching, the voltage stabilization control based on the second voltage is continuously performed until the voltage stabilization control based on the first voltage is performed.

【0011】本発明の請求項2に記載の発明は、第1の
電圧と第2の電圧の出力電圧を検出して得た電圧に基づ
いて出力電圧を安定に制御する電圧制御回路と、前記第
1の電圧の出力を遮断して第2の電圧だけを出力するモ
ードと第1の電圧と第2の電圧の両方を出力するモード
を切替える切替手段と、前記第1,第2の電圧出力を検
出する第1,第2の検出手段と、前記切替手段の切替制
御と前記第2の検出手段の動作/不動作制御を同時に制
御する制御信号を発生する制御手段とよりなり、前記第
1の電圧と第2の電圧が同時に出力されている時には、
前記電圧制御回路に印加する電圧を第1の検出手段から
検出し、第2の電圧だけが出力されている時には、前記
電圧制御回路に印加する電圧を第2の検出手段から検出
し、前記切替手段の切替制御により前記第1の電圧を出
力するまでの間、前記第2の検出手段を動作状態に保持
する電圧を一時的に付加したスイッチング電源回路であ
り、切替制御により前記第1の電圧を出力するまでの
間、前記第2の検出手段を動作状態にしているので、切
替手段の切替操作時、第1の電圧に基づいた電圧制御が
行われる前でも第2の電圧に基づいた電圧制御が行われ
る。
According to a second aspect of the present invention, a voltage control circuit for stably controlling the output voltage based on the voltage obtained by detecting the output voltage of the first voltage and the second voltage, Switching means for switching between a mode for cutting off the output of the first voltage and outputting only the second voltage and a mode for outputting both the first voltage and the second voltage; and the first and second voltage outputs. The first and second detection means for detecting the above, and the control means for generating a control signal for simultaneously controlling the switching control of the switching means and the operation / non-operation control of the second detection means. When the voltage of and the second voltage are output at the same time,
The voltage applied to the voltage control circuit is detected by the first detection means, and when only the second voltage is output, the voltage applied to the voltage control circuit is detected by the second detection means and the switching is performed. A switching power supply circuit to which a voltage for holding the second detection means in an operating state is temporarily added until the first voltage is output by the switching control of the means, and the first voltage is controlled by the switching control. Since the second detecting means is in the operating state until the output of, the voltage based on the second voltage is applied during the switching operation of the switching means even before the voltage control based on the first voltage is performed. Control is performed.

【0012】本発明の請求項3に記載の発明は、第1の
電圧がVTRとTV両方を動作させるTVモードにおけ
る中圧電圧であり、第2の電圧がVTRのみを動作させ
る軽負荷モードにおける低圧電圧である請求項2に記載
のスイッチング電源回路であり、切替手段によるTVモ
ードへの切替操作時、TVモードにおける中圧電圧が現
れる前でも軽負荷モードにおける低圧電圧に基づいた電
圧制御が行われる。
According to a third aspect of the present invention, the first voltage is a medium voltage in the TV mode in which both the VTR and the TV are operated, and the second voltage is in the light load mode in which only the VTR is operated. The switching power supply circuit according to claim 2, wherein the voltage is a low voltage, and voltage control based on the low voltage in the light load mode is performed even before the medium voltage in the TV mode appears during the switching operation to the TV mode by the switching means. Be seen.

【0013】以下、本発明のスイッチング電源回路の実
施の形態について、図面を用いて説明する。
Embodiments of a switching power supply circuit according to the present invention will be described below with reference to the drawings.

【0014】(実施の形態)図1は本発明の実施の形態
における回路図であり、従来例を示す図3の部分と同じ
構成,作用,動作を有する部分には同じ符号を付し、説
明は省略する。
(Embodiment) FIG. 1 is a circuit diagram according to an embodiment of the present invention, in which parts having the same structure, operation, and operation as those of the conventional example shown in FIG. Is omitted.

【0015】図1は、モード切替トランジスタ34のコ
レクタ33と低圧出力電圧検出トランジスタ26のベー
ス27の間に抵抗49を挿入接続し、図3における遅延
回路抵抗36,遅延回路コンデンサ39,遅延回路ダイ
オード40,遅延回路抵抗41を取り除いた以外は図3
と同じ構成の回路図である。
In FIG. 1, a resistor 49 is inserted and connected between the collector 33 of the mode switching transistor 34 and the base 27 of the low voltage output voltage detecting transistor 26, and the delay circuit resistor 36, the delay circuit capacitor 39 and the delay circuit diode in FIG. 40 except that the delay circuit resistor 41 is removed from FIG.
3 is a circuit diagram of the same configuration as FIG.

【0016】このような状態において、モニタ制御端子
32に印加されるモニタ制御電圧Emが図2の(a)の
電圧波形図に示すように、0Vから5Vに変化した時、
図2の(b)に示すように、中圧出力端子11に140
VのTV用の中圧出力電圧がTαの時間後に現れる。5
Vが印加されてからTαの時間はTV用の中圧出力電圧
に基づくスイッチング制御回路16の制御は行われな
い。一方、図2の(c)に示すように、低圧出力端子2
1の低圧出力電圧が14.5Vの間はモニタ制御電圧E
mが0Vから5Vに変化すると低圧出力電圧検出トラン
ジスタ26が不導通となり、低圧出力電圧に基づくスイ
ッチング制御回路16の制御が行われなくなる。そこで
本実施の形態においては、低圧出力端子21の14.5
Vの低圧出力電圧を前記Tαの時間だけ15.5Vとす
ることにより、モニタ制御電圧Emが0Vから5Vに変
化しても、低圧出力電圧検出トランジスタ26のベース
27の電位が低圧出力電圧検出トランジスタ26を導通
させるに足るだけの高さになり、Tαの時間だけ低圧出
力電圧に基づくスイッチング制御回路16の制御が行わ
れることになり、Tαの時間経過後、中圧出力電圧に基
づくスイッチング制御回路16の制御が行われるまでの
間、スイッチング制御回路16の制御が途切れることが
なくなる。
In such a state, when the monitor control voltage Em applied to the monitor control terminal 32 changes from 0V to 5V, as shown in the voltage waveform diagram of FIG.
As shown in FIG. 2B, the medium voltage output terminal 11 has 140
The V medium voltage output voltage for TV appears after time Tα. 5
The control of the switching control circuit 16 based on the medium-voltage output voltage for TV is not performed for the time Tα after V is applied. On the other hand, as shown in FIG. 2C, the low voltage output terminal 2
Monitor control voltage E while low voltage output voltage of 1 is 14.5V
When m changes from 0V to 5V, the low voltage output voltage detection transistor 26 becomes non-conductive, and the switching control circuit 16 is not controlled based on the low voltage output voltage. Therefore, in the present embodiment, 14.5 of the low voltage output terminal 21 is used.
By setting the low voltage output voltage of V to 15.5V for the time of Tα, even if the monitor control voltage Em changes from 0V to 5V, the potential of the base 27 of the low voltage output voltage detection transistor 26 is low voltage output voltage detection transistor. 26 becomes high enough to conduct 26, and the switching control circuit 16 based on the low voltage output voltage is controlled for the time of Tα. After the time of Tα, the switching control circuit based on the intermediate voltage output voltage is controlled. Until the control of 16 is performed, the control of the switching control circuit 16 is not interrupted.

【0017】[0017]

【発明の効果】以上のように、本発明は、第1の電圧と
第2の電圧を出力し、その出力電圧を検出して得た電圧
に基づいて出力電圧を安定に制御する電圧制御回路を備
えたスイッチング電源回路において、モード切替時に、
リレーの動作遅れにより第1の電圧が現れず、第1の電
圧に基づく出力電圧安定の制御が途切れている間、第2
の電圧を通常の状態における電圧よりも一時的に高く
し、第2の電圧に基づく出力電圧安定の制御が途切れる
のを一時的に遅らせることにより、出力電圧安定の制御
が全く無くなると言った事態を無くするものであり、こ
れにより、モード切替時の過電圧発生を安定的に抑える
ことができる。
As described above, the present invention outputs the first voltage and the second voltage and stably controls the output voltage based on the voltage obtained by detecting the output voltage. In a switching power supply circuit equipped with
The first voltage does not appear due to the operation delay of the relay, and while the control of the output voltage stabilization based on the first voltage is interrupted, the second voltage
A situation in which the output voltage stabilization control is completely lost by temporarily increasing the voltage of the output voltage above the voltage in the normal state and temporarily delaying the interruption of the output voltage stabilization control based on the second voltage. This makes it possible to stably suppress the occurrence of overvoltage during mode switching.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のスイッチング電源回路の一実施の形態
における回路図
FIG. 1 is a circuit diagram of an embodiment of a switching power supply circuit of the present invention.

【図2】図1の回路図の各部分における電圧波形図FIG. 2 is a voltage waveform diagram in each part of the circuit diagram of FIG.

【図3】従来のスイッチング電源回路における回路図FIG. 3 is a circuit diagram of a conventional switching power supply circuit.

【図4】図3の回路図の各部分における電圧波形図4 is a voltage waveform diagram in each part of the circuit diagram of FIG.

【符号の説明】[Explanation of symbols]

1,2 直流入力電圧端子 3 スイッチング出力回路 4 スイッチングトランス 8 整流ダイオード 9 リレー 10 接点 11 中圧出力端子 12 中圧出力電圧検出回路 13 中圧出力電圧検出端子 14 中圧出力電圧検出ダイオード 15 フォトカプラー 16 スイッチング制御回路 21 低圧出力端子 22 低圧出力電圧検出回路 23,24 分圧抵抗 26 低圧出力電圧検出トタンジスタ 29 低圧出力電圧検出ダイオード 32 モニタ制御端子 34 モード切替トランジスタ 36,41 遅延回路抵抗 37 バイアス抵抗 39 遅延回路コンデンサ 40 遅延回路ダイオード 44 リレードライブトランジスタ 47 リレー駆動コイル 49 抵抗 1, 2 DC input voltage terminal 3 Switching output circuit 4 Switching transformer 8 Rectifying diode 9 Relay 10 Contact 11 Medium pressure output terminal 12 Medium pressure output voltage detection circuit 13 Medium pressure output voltage detection terminal 14 Medium pressure output voltage detection diode 15 Photo coupler 16 switching control circuit 21 low voltage output terminal 22 low voltage output voltage detection circuit 23, 24 voltage dividing resistor 26 low voltage output voltage detection transistor 29 low voltage output voltage detection diode 32 monitor control terminal 34 mode switching transistor 36, 41 delay circuit resistance 37 bias resistance 39 Delay circuit capacitor 40 Delay circuit diode 44 Relay drive transistor 47 Relay drive coil 49 Resistance

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 第1の電圧と第2の電圧を出力し、その
出力電圧を検出して得た電圧に基づいて出力電圧を安定
に制御する電圧制御回路を備え、モード切替時にリレー
の動作遅れにより第1の電圧が現れず、第1の電圧に基
づく出力電圧安定の制御が途切れている間、第2の電圧
を通常の状態における電圧よりも一時的に高くし、第2
の電圧に基づく出力電圧安定の制御が途切れるのを一時
的に遅らせることにより、出力電圧安定の制御が全く無
くなる事態を無くしたスイッチング電源回路。
1. A voltage control circuit for outputting a first voltage and a second voltage, and stably controlling the output voltage based on a voltage obtained by detecting the output voltage, and operating a relay at the time of mode switching. While the first voltage does not appear due to the delay and the control of the output voltage stabilization based on the first voltage is interrupted, the second voltage is temporarily made higher than the voltage in the normal state,
The switching power supply circuit eliminates the situation where the output voltage stabilization control is completely lost by temporarily delaying the interruption of the output voltage stabilization control based on the voltage.
【請求項2】 第1の電圧と第2の電圧の出力電圧を検
出して得た電圧に基づいて出力電圧を安定に制御する電
圧制御回路と、前記第1の電圧の出力を遮断して第2の
電圧だけを出力するモードと第1の電圧と第2の電圧の
両方を出力するモードを切替える切替手段と、前記第
1,第2の電圧出力を検出する第1,第2の検出手段
と、前記切替手段の切替制御と前記第2の検出手段の動
作/不動作制御を同時に制御する制御信号を発生する制
御手段とよりなり、前記第1の電圧と第2の電圧が同時
に出力されている時には、前記電圧制御回路に印加する
電圧を第1の検出手段から検出し、第2の電圧だけが出
力されている時には、前記電圧制御回路に印加する電圧
を第2の検出手段から検出し、前記切替手段の切替制御
により前記第1の電圧を出力するまでの間、前記第2の
検出手段を動作状態に保持する電圧を一時的に付加した
スイッチング電源回路。
2. A voltage control circuit for stably controlling an output voltage based on a voltage obtained by detecting an output voltage of a first voltage and a second voltage, and shutting off the output of the first voltage. Switching means for switching between a mode for outputting only the second voltage and a mode for outputting both the first voltage and the second voltage, and first and second detection for detecting the first and second voltage outputs. Means and a control means for generating a control signal for simultaneously controlling the switching control of the switching means and the operation / non-operation control of the second detection means, and the first voltage and the second voltage are simultaneously output. The voltage applied to the voltage control circuit is detected by the first detection means when the voltage control circuit is being output, and the voltage applied to the voltage control circuit is output from the second detection means when only the second voltage is output. The first voltage is detected by the switching control of the switching means. A switching power supply circuit in which a voltage for holding the second detecting means in an operating state is temporarily added until output.
【請求項3】 第1の電圧がVTRとTV両方を動作さ
せるTVモードにおける中圧電圧であり、第2の電圧が
VTRのみを動作させる軽負荷モードにおける低圧電圧
である請求項2に記載のスイッチング電源回路。
3. The method according to claim 2, wherein the first voltage is a medium voltage in the TV mode in which both the VTR and the TV are operated, and the second voltage is a low voltage in the light load mode in which only the VTR is operated. Switching power supply circuit.
JP32392695A 1995-11-17 1995-11-17 Switching power supply circuit Pending JPH09149641A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32392695A JPH09149641A (en) 1995-11-17 1995-11-17 Switching power supply circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32392695A JPH09149641A (en) 1995-11-17 1995-11-17 Switching power supply circuit

Publications (1)

Publication Number Publication Date
JPH09149641A true JPH09149641A (en) 1997-06-06

Family

ID=18160175

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32392695A Pending JPH09149641A (en) 1995-11-17 1995-11-17 Switching power supply circuit

Country Status (1)

Country Link
JP (1) JPH09149641A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103855702A (en) * 2012-11-30 2014-06-11 海洋王(东莞)照明科技有限公司 High-voltage-impact-resisting protection circuit and power supply accessing testing device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103855702A (en) * 2012-11-30 2014-06-11 海洋王(东莞)照明科技有限公司 High-voltage-impact-resisting protection circuit and power supply accessing testing device

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