JPH09146775A - Prolog code generation method for subroutine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the method which can reduce the code size of a program by deleting the instruction string that is used for setting a relevant register out of the subroutine instruction string to be compiled. SOLUTION: A prolog code generation part 22 deletes the constant data setting instruction out of the subroutine instruction string which is generated by an intermediate code generation/optimization part 21 and undergone assignment of a register. Then the part 22 adds the instructions to the inlet and the outlet of the subroutine instruction string to call out the prolog/epilog routines 4 and also assigns the constant data set by the deleted constant data setting instruction to a memory. A machine language code generation part 23 converts the instruction string given from the part 22 into a machine language instruction of a target CPU to generate an object program 3. Thus it is possible to reduce the size of the program 3 by adding the constant data setting instruction into the prolog routine.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a subroutine prologue code generation method for compiling a program written in a high-level language so that the prologue code of the subroutine of the object program is reduced to reduce the code amount of the object program. Regarding

[0002]

2. Description of the Related Art High-level languages for describing programs, such as Cobol, Fortran, C language, and basic, are compiled by a compiler to generate an object program. In this case, an optimizing compiler that generates code for a processor having a large number of registers performs optimization by making full use of abundant registers. Normal,
This corresponds to a processor having 16 or more registers. In such a compiler, frequently used variables and constants are assigned to registers, the contents of memory are retained to reduce the number of execution instructions, and the number of accesses to memory, which has a slower access speed than registers, is reduced. A machine language instruction sequence capable of high-speed arithmetic processing is generated.

On the other hand, in the compiler, a plurality of registers are used by dividing them into registers that need to save the values before and after calling a subroutine and registers that do not. The former register is called a call save register. When such a register is allocated to a subroutine being compiled, it is necessary to generate an instruction sequence for saving the values of those call save registers at the entrance of the subroutine. Furthermore, when the subroutine uses a stack, it is necessary to generate an instruction sequence for allocating an area on the stack. At the exit of the subroutine, it is necessary to generate an instruction sequence for restoring the call save register value saved at the entrance and releasing the stack area. Generally, an instruction sequence for register saving and stack allocation generated at the entrance of a subroutine is called a prolog code. The instruction sequence for register restoration and stack release generated at the exit of the subroutine is called an epilogue code. Some processors with many registers have special mechanisms such as register windows and register stacks, and special instructions to save (write) or restore (read) multiple registers at once. is there. However, in a processor that does not have such a special mechanism or instruction, the prolog code or epilog code becomes large due to the instruction sequence for register saving / restoring or stack allocation release, and the size of the entire object program becomes large. .

Therefore, the compiler for such a processor adopts the following method in order to reduce the code size. That is, a prologue code for saving the call save register and allocating the stack area, and an epilogue code for returning the call save register and releasing the stack area are separately prepared as library routines (subroutines), and the entrance and exit of the subroutine are prepared. Generate code to call each library routine. As a result, although the execution speed is partially sacrificed by the overhead of calling the library routine of the prolog code or the library routine of the epilog code, it is possible to reduce the size of the program code and the epilog code.
This type of technology is described in the following literature (COMUNICATIONS OF
THE ACM. June 1994 / Vol.37, No.6 pp62)).

[0005]

The conventional prologue code generation method for a subroutine as described above has the following problems to be solved. The subroutine to be compiled may refer to or change the variable allocated in memory, or use a numerical constant with a large value. In addition, a subroutine described in C language may refer to or change a variable defined outside the subroutine. In these cases, it is necessary to temporarily set the symbol address of the variable in the register and access the memory using the register, or store the symbol address or a numeric constant having a large value in the immediate operand of the instruction.

Further, when the symbol address is set in the register, the memory address is represented by a 32-bit length,
For some processors, the instruction length is fixed at 32 bits. In such a processor, setting a memory address in a register requires at least two instructions. That is, for example, the first instruction sets the lower 16 bits of the 32-bit address, and the next instruction sets the upper 16 bits.

Further, even in a processor capable of storing the symbol address directly in the operand of the instruction, when the same symbol address is used a plurality of times, it is possible to set the symbol address in a certain register and reuse it. preferable. In that case, the code size can be made smaller than that of storing a symbol address of, for example, about 32 bits in the immediate operand of the instruction every time. In this case, it is a condition that a sufficient number of registers are secured and there is a space. The above situations are known numerical constants,
For example, it occurs when a numerical value such as "0x4fff00ff" is used. When a large amount of constant data such as a symbol address of a variable allocated in memory or a numerical constant with a large value is used in a subroutine like this, if the number of instructions to set that constant data in a register increases, the code size of the object program will increase. Will be increased. This tendency is often found in RISC type processors that employ fixed length instructions. Further, if there are many copy instructions of the argument register of the subroutine, the code size of the program is also increased.

[0008]

The present invention employs the following structure to solve the above problems. <Structure 1> A compiler that implements a subroutine call using a prologue code that executes processing including register saving at the entrance of a subroutine of an object program and an epilogue code that executes processing including restoration of the register at the exit of the subroutine From the instruction sequence of the subroutine, the instruction that sets the specified constant data in the call save register and that can be moved to the entrance of the subroutine is extracted and deleted, and is used as the call save register of the constant data setting destination. , An instruction including a process of allocating a predetermined specific call save register, storing constant data in the memory, and calling a prologue routine for copying the constant data in the memory to the predetermined specific call save register Generate prolog code containing columns .

<Description> The object program calls a subroutine at a predetermined timing. At this time, the prologue code at the entrance of the subroutine saves the call save register and allocates the stack. The epilogue code at the exit of the subroutine opens the stack and restores the registers. On the other hand, the subroutine may include an instruction string for setting constant data in the register. Constant data refers to symbol addresses and numerical constants. This setting destination register is normally assigned any register, but it is assigned to a specific call save register. In this way, the process of copying the constant data from the memory to the specific call save register can be made into a subroutine. Therefore, the above prolog code and this copy instruction are combined into a subroutine. This subroutine is a prologue routine. This is a common process that can be called from other subroutines. Therefore, the prolog routine is called in the prolog code. In this way, the instruction sequence for register setting can be deleted from the subroutine instruction sequence to be compiled, so that the code size is reduced.

<Structure 2> A call save register set by a constant setting instruction for setting predetermined constant data in the register extracted from the instruction sequence of the subroutine is called in a predetermined place with the prolog routine. If it is not included in the save register group, check whether the register that can be exchanged with the call save register set by the constant setting instruction exists in the specified call save register group, and replace the exchangeable registers with each other. , Rewrite the operand of the instruction in the subroutine that refers to or defines these registers.

<Description> When the call save register set by the constant setting instruction for setting the predetermined constant data in the register happens to coincide with the call save register group predetermined between the prologue code and the subroutine. It is not necessary to replace such a register. The call save register to which the constant is set by the register setting instruction sequence after rewriting becomes the specific call save register of configuration 1.

<Structure 3> A subroutine call is realized by using a prologue code for executing a process including saving of registers at the entrance of a subroutine of an object program and an epilogue code for executing a process including restoration of registers at the exit of the subroutine. When the argument register is copied by the compiler in the basic block at the entrance of the subroutine, the copy instruction is extracted and deleted, and a specific call is saved in advance as the register to which the argument register is copied. Prologue code is generated that includes the process of allocating registers and calling a prologue routine that contains a copy instruction of the argument to a particular call save register.

<Explanation> The copy instruction can be made into a subroutine by allocating the register of the copy destination of the argument to a specific call save register. If this copy instruction sequence is deleted from the subroutine, the code size of the object program can be reduced as in the case of the configuration 1.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to specific examples. SPECIFIC EXAMPLE 1 FIG. 1 is a block diagram of a system for carrying out the method of the present invention. That is, as shown in the figure, this system links a compiler 2 that reads a source program 1 and compiles it to generate an object program 3, an object program 3, a prolog routine, an epilog routine 4, and another library routine 5. And a linker 6 for generating an execution program 7.

The compiler 2 includes an intermediate code generation / optimization unit 21, a prologue code generation unit 22, and a machine language code generation unit 23. The intermediate code generation unit and the optimization unit 21 saves and restores the call save register, and allocates and releases the stack for each subroutine in the source program 1, and an intermediate language instruction string other than the prologue code and epilogue code ( (Hereinafter, simply referred to as "instruction sequence") is generated, various optimizations are performed on the instruction sequence, and registers of the target CPU are allocated. The prologue code generation unit 22 deletes the constant data setting instruction from the subroutine instruction sequence after register allocation generated by the intermediate code generation unit and the optimization unit 21 (only those that can be deleted), the prologue routine and the epilogue routine. The instruction for calling 4 is added to each of the entry and the exit of the instruction sequence of the subroutine, and the constant data set by the deleted constant data setting instruction is allocated on the memory. The machine language code generation unit 23 converts the instruction sequence (intermediate language) passed from the prologue code generation unit 22 into a machine language instruction sequence of the target CPU to generate the object program 3.

Further, the prologue code generator 22 comprises a constant data setting instruction extracting means 221, a register exchanging means 222, a constant data setting instruction deleting means 223, and a subroutine call instruction generating means 224. The constant data setting instruction extracting means 221 searches for a constant data setting instruction group that calls constant data such as a symbol address or a numerical constant having a large value in the save register from the subroutine instruction sequence, and sets the constant data setting instruction group. From the above, as an instruction that can be moved to the subroutine entry, the instruction that first sets the call save register of the constant data setting destination in the basic block of the subroutine entry, or is set only once in the entire instruction sequence of the subroutine Select only the instructions for which the call save register is set.

The register exchanging means 222, for each instruction in the constant data setting instruction group that can be moved to the above-mentioned subroutine entry, has a call save register (b) at the constant data setting destination with the prolog routine 4. If the call save register group (A) is not included in the predetermined call save register group (A), the exchangeable register (a) is selected from the call save register group (A) (if any).
The two registers (a) and (b) are exchanged, and the operand of the instruction that refers to or defines the two registers (a) and (b) in the subroutine instruction sequence is also rewritten accordingly. The constant data setting command deletion means 223
From the constant data setting instruction group after the operand rewriting by the register exchanging means 222, the constant data setting destination register (b) is included in the register group (A) determined with the prolog routine 4. Find (K) and delete it from the subroutine instruction sequence.

Subroutine call instruction generation means 224
Adds a sequence of instructions that calls the prologue routine and the epilogue routine 4 to the beginning and end of the sequence of instructions of the subroutine, and sets the constant data set by the instructions in the constant data setting instruction group (K) to the prologue routine. It is assigned immediately after the instruction sequence to be called.

FIG. 2 shows a C language subroutine to be compiled, and FIG. 3 shows an instruction sequence as a compilation result. Hereinafter, the operation of the prologue code generation method according to the present invention will be described in detail with reference to the instruction sequence shown in FIG. 3, which is a compilation example of the subroutine f () shown in FIG.
However, the intermediate language instructions used inside the compiler and the machine language instructions of the target CPU will be described using the same type of instructions for simplification. In addition, if there is no particular need to distinguish between them, both the intermediate language instruction (sequence) and the machine language instruction (sequence) will be simply referred to as the instruction (sequence). The instruction sequence shown in FIG. 3 corresponds to that shown in FIG.
The instruction sequence after register allocation output from the intermediate code generation unit and the optimization unit 21 is shown. In this instruction sequence, the symbol addresses _a to _d are set to the immediate value setting instruction set.
It is set in the register with d. ((S1) to (s of FIG. 3
4)). The prologue code and epilogue code have not yet been added here.

FIG. 4A shows a list of registers used in the following description, and FIG. 4B shows examples of some instructions using the registers. The length of each register is 32 bits (4 bytes), the address width is 32 bits, and it is specified by a byte address. Also, an immediate value setting command set
It is assumed that d has a length of 64 bits (8 bytes) and the other instructions have a length of 32 bits. To set a symbol address whose value is unknown at compile time to a register, use s
Use setd instructions instead of eti instructions.

FIG. 5 shows a call save register group to which constant data is preset, which is predetermined by the prologue routine. When arranging the constant data set in these registers on the memory,% r18,% r19,% r2
It is assumed that the addresses are arranged in the order of 0 from the side having the smallest address, and when there is no corresponding constant data, the data are arranged so as to be arranged on the side having the smallest address.

FIGS. 6A and 6B show examples of a conventional prologue routine and epilogue routine, respectively.
Further, FIG. 7 shows an example of the storage position on the stack (relative position to the stack pointer% r31) used by the prolog routine and the epilog routine shown in FIG. 6 for saving and restoring the call save register, respectively. There is. The prologue routine and the epilogue routine shown in FIG. saveN and. restoreN (N = 1 to 1
A plurality of entries (labels) called 2) are prepared. Each entry corresponds to the number N of call save registers to be saved or restored. Further, the stack size allocated by the prolog routine is placed on the register% r16 which is not stored as a call and passed, and the stack extends to the side having a smaller address.

For example,% r18 of the call save register
~ To save% r21 (4 pieces) and allocate a stack area of 52 bytes, a prolog routine. It suffices to call save4 with the following three instruction sequences. sw% r0, [% r31] (1) seti 52,% r16 (2) call. save4 (3) The first store instruction “sw% r0, [% r31]” is a prologue routine. Make sure that the return address% r0 of the subroutine (S) is not destroyed by calling save4.
This is for saving on the stack in advance.

On the other hand, the call save register% r18 to%
To restore the value of r24 (4) and release the stack area (52 bytes), the epilog routine. resto
It suffices to call re4 with one instruction below. bra. restore4 ... (4). A call to restoreN calls the label. resto
An unconditional branch (bra instruction) to reN is sufficient. Because the return address of the subroutine (S) is. This is because it is saved on the stack before calling saveN.
Also, the prologue routine. In saveN, as shown in (1) of FIG. 6, the frame pointer% r30 is set to the position (value) of the stack pointer% r31 before the change. Therefore, in order to release the stack in the epilogue routine, the frame pointer % R30 is the stack pointer% r
All we have to do is substitute 31. This is shown in (2) of FIG. If the frame pointer is not available ,. sav
As with calling eN, set the stack size to% r16 and then. Call restoreN ,.
In restoreN,% r16 may be used to change the stack pointer.

In FIG. 8, the conventional prolog routine. save3 and epilogue routine. An example in which an instruction to call restore3 is added will be shown. FIG. 9 shows the prologue routine used in this specific example. An example of newsaveN is shown. This prologue routine includes a load instruction for setting the constant data arranged on the memory in the call saving register of FIG. 5 (portion (1) of FIG. 9). The meaning of the number N is. save
As in the case of N, this is the number of call save registers to be saved.

Each constant data arranged on the memory has a fixed length of 32 bits, and each register% r18 to FIG.
Whether or not the constant data to be set in% r20 is on the memory is assumed to be set as a bit flag in the register% r17. Note that% r16 is the conventional prolog routine. Similar to saveN, the size of the stack area is set. Bit 0 of register% r17
(Least significant bit) to bit 2 are register% r
It indicates whether or not constant data to be set to 18 to% r20 is stored in the memory. If the bit value is 1, there is corresponding constant data. The memory address that stores constant data is the prolog routine. newsav
It is assumed that it is stored in the return address register% r0 from the eN, and the actual return address is the instruction immediately after the constant data storage area.

For example, when the constant data is set only in% r18 and% r20, the bit flag 0x5 is set in the register% r17 and the prolog routine. All you have to do is call newsaveN. ".Int"
Is a (pseudo) instruction for arranging 32-bit constant data on the memory. sw% r0, [% r31] seti <stack size>,% r16 seti 0x5,% r17 call. newsaveN. int <32-bit constant data set to% r18> (n1). int <32-bit constant data set to% r20><Next instruction x> (n2)

[0028] Immediately after branching to newsaveN,
The return address register% r0 points to the above-mentioned (n1) data storage address. . The actual return destination from newsaveN is the instruction (n2) above. Adjustment of the return address register% r0 for this purpose is performed by the bit flag set in% r17. done by newsaveN.

In FIG. 10, the prologue code generation method described in this specific example is applied to the subroutine instruction sequence of FIG. An example in which an instruction to call newsave4 is added will be shown. The call instruction of the epilogue routine is the same as in the conventional method of FIG. In the following, details of how the instruction sequence of FIG. 10 is generated by the prolog code generation unit 22 shown in FIG. 1 will be described. Constant data setting instruction extraction means 221
First, from among the setd instruction (64-bit length) group in the first basic block of the subroutine instruction sequence of FIG. 3, the one in which the call save register of the setting destination is set for the first time in that basic block is searched. However, the end of the basic block is the instruction immediately before the label or the last instruction of the subroutine instruction sequence. In the case of FIG. 3, the end of the basic block is the instruction immediately before the label L100 as described below. sw% r9, [% r21]

The list of setd instructions satisfying the above conditions is the following three in the order of appearance. setd_a,% r18 (s1) setd_b,% r21 (s2) setd_d,% r19 (s4) The setd instruction of (s3) in FIG. 3 is the set of (s1).
Since the same register% r18 as the d instruction is set, it is not included in the above list. Next, the constant data setting instruction extraction means 221 does not change the call save register of the set destination from the setd instruction group in the subroutine instruction sequence by another instruction in the subroutine instruction sequence (that is, The setd instruction itself only modifies its register) and adds it to the setd instruction list above. In the subroutine of FIG. 3, there is no such setd instruction.

The register exchanging means 222 shown in FIG. 1 uses the above setd instruction list (s1)-(s2)-(s4).
For each instruction in the inside, it is checked whether the call save register of the setting destination is included in the register group shown in FIG. 5 which is predetermined with the prolog routine, and if it is not included, the register is saved. Try to replace. Setd above
There is no problem because (s1) and (s4) in the instruction list have registers% r18 and% r19 as the setting destinations, respectively. However, the setting register of (s2) is% r21, which is not included in the register of FIG.

For register exchange, is it possible to select one of the registers in FIG. 5 which is not set by another setd instruction in the setd instruction list, and replace that register with the register set by the setd instruction? Whether or not the instruction that refers to or defines the two registers is checked. If the exchange is not possible, the setd instruction is deleted from the setd instruction list without exchanging the register. In the case of the above (s2), the possibility of exchanging the register% r21 of the setting destination and the register% r20 of FIG. 5 is examined. Note that% r18 and% r19
Are set by (s1) and (s4), respectively.

Registers% r20 and% in the instruction sequence of FIG.
The instruction group that references or sets r21 is as follows. mov% r8,% r20 setd_b,% r21 lw [% r21],% r9 sw% r9, [% r21] add% r20,1,% r12 These instructions are arbitrary registers as shown in FIG. Since (% r0 to% r31) can be specified as an operand,
% R20 and% r21 can be exchanged and rewritten as follows. mov% r8,% r21 setd_b,% r20 lw [% r20],% r9 sw% r9, [% r20] add% r21,1,% r12

Also, setd after this rewriting
The list of instructions looks like this: setd _a,% r18 (s1) setd _b,% r20 (s2) setd _d,% r19 (s4) If there is an instruction that can only specify a specific call save register as an operand, such rewriting cannot be performed. It will be. For example, the above add instruction is%
If r21 cannot be specified as an operand, the above rewriting is not performed.

Constant data setting instruction deleting means 2 shown in FIG.
23 is a setd instruction list (s1)-(s2)-(s4) after the above-mentioned register exchange, and the register of the setting destination is included in the register group shown in FIG. To delete. Above (s1), (s2), (s
All of the setd instructions in 4) set the registers in FIG. 5, so they can all be deleted. The instruction sequence after deletion is shown in Figure 1.
It becomes part (3) of 0. The subroutine call instruction generation means 224 shown in FIG. 1 adds the prolog routine call instruction of FIG. 9 containing the constant data setting instruction to the head of the instruction sequence after the constant data setting instruction is deleted. The epilogue routine call instruction is added to the end of the instruction sequence.

The part (1) of FIG. 10 shows an instruction sequence for calling the prologue routine. In the example of this subroutine, since four call save registers of% r18 to% r21 are used, the prolog routine. newsa
calling ve4. The prologue routine.
The arguments to newsave4 are set to% r16 and% r17. Also, in order to allocate the stack area of 52 bytes, set the size to% r16, register% r18,
Symbol addresses _a, _b, _ at% r19 and% r20
A bit flag 0x7 is set in% r17 to set d. The constant data is arranged immediately after the prologue routine calling instruction "call.newsave4" (portion (2) in FIG. 10).

When the deletable constant data setting instruction is not found, the subroutine call instruction generating means 224 shown in FIG. 1 is the conventional prolog routine. save
An instruction sequence for calling N is generated. However, as a prologue routine. If only newsaveN is prepared, 0 is set in the register% r17, and. newsa
You may call veN.

The machine language code generator 23 shown in FIG. 1 converts the instruction string of the intermediate language into the machine language of the target CPU to generate the object program 3. Linker 6
Creates an execution program 7 by linking the object program 3, the prolog routine and the epilog routine 4, and other library routines 5 as necessary.

<Effect of Concrete Example 1> By the above processing,
Instead of deleting the three setd instructions (64 bits) of (s1), (s2), and (s4), prepare three constant data (each data is 32 bits long) shown in part (2) of FIG. The bit flag 0x7 setting instruction “set
Since i 0x7,% r17 ”is simply added, the code is reduced by 64 bits (8 bytes). That is, in the above prolog code generation method, conventionally, the call save register is saved, the stack is allocated, or In order to enable the prologue routine that performed only both of these processes to include the process of setting constant data such as symbol addresses and numeric constants in registers, the constant data is registered in the register from the subroutine instruction string to be compiled. Find a command that can be set and that can be moved to the entrance of the subroutine, assign a specific call save register that has been determined in advance to the register to which the constant data is set, and store the constant data that is set in that specific register in the memory. Stored on the memory by the prolog routine The constant data stored above is set to a specific call save register that has been determined in advance.By including the constant data setting instruction in the prolog routine, the constant data setting instruction is deleted from the instruction string of the subroutine body. It becomes possible to reduce the size of the object program.

<Specific Example 2> The method of this specific example 2 has a plurality of registers, and those registers are used by being divided into those which are called and saved and those which are not called, and the subroutine arguments are called and saved. In a compiler that generates code that is passed in a non-register, the following processing is performed. First, a pair of an argument register (A) which is not a call save and a call save register (B) which is the save destination is determined in advance. The prolog routine including an instruction sequence for copying the argument register (A) into the call save register (B) and the instruction sequence in the basic block at the entrance of the subroutine after the compiler register allocation is completed ) Is stored in the call save register (C), and an argument copy instruction detecting means for searching the instruction group (I) is provided.

Furthermore, for each instruction in the argument copy instruction group (I), the call save register (C) of the copy destination is a call save register (B) which is predetermined with the prologue routine. If the two registers (B) and (C) can be exchanged,
All the instruction groups (J) in the subroutine referencing or defining the two registers are inspected, and if they are exchangeable, the two registers are exchanged and the operands of the instruction group (J) are rewritten accordingly. A register exchange means is provided. Further, from the argument copy instruction group (I) after the operand rewriting by the register exchanging means, the set of the argument register and the call save register of the copy destination is the register set (A) determined between the prolog routine. ) And (B) are found, and an argument copy instruction deleting means for locating the same thing as the instruction string in the basic block at the entrance of the subroutine and an instruction for calling the prolog routine are generated at the head of the instruction string of the subroutine. And a subroutine call instruction generating means for performing the same.

FIG. 11 shows the subroutine f () in FIG.
The instruction sequence of 1 represents the instruction sequence after register allocation output by the intermediate code generation unit and the optimization unit 21 shown in FIG. 1 to implement the second specific example. The prologue code and epilogue code have not been added yet. FIG. 13 shows an argument register which is predetermined in the prologue routine,
The set of call save registers of the copy destination is shown.

FIG. 14 shows the conventional epilogue routine. save3 and epilogue routine. An example in which an instruction to call restore3 is added will be shown. FIG. 15 shows a prologue routine used in the second specific example. An example of newsaveN is shown. FIG.
6 includes a prolog routine used in the prolog code generation method described in the second specific example in the subroutine instruction sequence of FIG. An example in which an instruction to call newsave3 is added will be shown. The instruction to call the epilogue routine is shown in FIG.
This is the same as in the conventional method of. Hereinafter, the details of how the prolog code generation unit 22 shown in FIG. 1 generates the instruction sequence of FIG. 16 will be described.

Constant data setting command extracting means 221 shown in FIG.
Operates as argument copy instruction extracting means in this specific example, and calls the argument save registers% r8 to% r11 from the basic block at the head of the instruction sequence in FIG.
The group of commands (argument copy commands) copied from r18 to% r29 is searched for. Since the end of the basic block is the instruction immediately before the label or the subroutine call instruction, or the last instruction of the subroutine instruction sequence, the next subroutine call instruction is the end of the basic block in the example of FIG. call g Further, the following two argument copy instructions are included in the basic block. mov% r8,% r18 (m1) mov% r9,% r20 (m2)

The register exchanging means 222 checks whether or not the call save register of the copy destination is the same as the register shown in FIG. 13 for the above two argument copy instructions (m1) and (m2). The argument copy instruction (m1) copies the argument register% r8 to the call save register% r18 shown in FIG. 13, but the argument copy instruction (m2)
Calls the argument register% r9 and save register% r
Instead of 19, it is copied to another call save register% r20. Therefore, the register exchanging unit 222 checks whether or not the call save registers% r19 and% r20 can be exchanged for all the instruction sequences shown in FIG. The instruction groups that refer to or define% r19 and% r20 in the instruction sequence of FIG. 12 are as follows.

Mov% r9,% r20 add% r18,% r20,% r19 cmpi% r20, 0 mov% r18,% r20 add% r18,% r19,% r12 add% r12,% r20,% r12 These instructions Is any register (% r0 to% r31)
Can be specified as an operand,% R19 and% r20 can be exchanged and rewritten as follows. mov% r9,% r19 add% r18,% r19,% r20 cmpi% r19,0 mov% r18,% r19 add% r18,% r20,% r12 add% r12,% r19,% r12

The argument copy instruction after this rewriting is as follows. mov% r8,% r18 (m3) mov% r9,% r19 (m4) If there is an instruction in which only a specific call save register can be designated as an operand, such rewriting cannot be performed. For example, if the above cmpi instruction can specify only% r20 as an operand, the above rewriting is not performed.

The constant data setting command deleting means 223 shown in FIG.
Operates as argument copy instruction deleting means in the second specific example,
Argument copy instruction (m after replacement of the above registers)
Among 3) and (m4), those satisfying the set of argument register and copy destination register shown in FIG. 13 are deleted. Since both of (m3) and (m4) are the same as the set of registers in FIG. 13, they can all be deleted. The instruction sequence after the above-mentioned register exchange and the deletion of the argument copy instructions (m3) and (m4) becomes the portion of the equation (2) in FIG. The subroutine call instruction generation means 224 executes the prolog routine call instruction of FIG. 15 including the argument copy instruction,
Add to the beginning of the command sequence after the argument copy command is deleted. The epilogue routine call instruction is added to the end of the instruction sequence.

The part (1) of FIG. 16 shows an instruction sequence for calling the prologue routine. This subroutine f ()
In the above example, since the three call save registers of% r18 to% r20 are saved and the stack area of 52 bytes is allocated, the prolog routine. Set the size 52 of the stack area in the argument register% r16 to newsave3. Calling newsave3. If there is no deletable argument copy instruction, the subroutine call instruction generation means 224 is the same as the conventional prolog routine.
An instruction sequence for calling saveN is generated. However, as a prologue routine. When only newsaveN is prepared, always. You may call newsaveN. In that case, the argument copy instruction part of saveN is a wasteful process.

<Effect of Concrete Example 2> In the above prolog code generation method, the argument copy instruction can be deleted from the original subroutine by including it in the prolog routine, and the size of the object program can be reduced. .

[Brief description of the drawings]

FIG. 1 is a system block diagram for implementing the method of the present invention.

FIG. 2 is an explanatory diagram of an example of a C language source program of a subroutine.

FIG. 3 is an explanatory diagram of an instruction sequence resulting from compilation.

FIG. 4 is a diagram illustrating the contents of registers and instructions.

FIG. 5 is an explanatory diagram of a call storage register.

FIG. 6 is an explanatory diagram of a prologue routine and an epilogue routine.

FIG. 7 is an explanatory diagram of contents of a stack.

FIG. 8 is an explanatory diagram of an instruction sequence of a compilation result by the conventional method.

FIG. 9 is an explanatory diagram of an example of a prologue routine.

FIG. 10 is an explanatory diagram of an instruction sequence of a compilation result according to the present invention.

FIG. 11 is an explanatory diagram of an example of a C language source program of a subroutine.

FIG. 12 is an explanatory diagram of an instruction sequence resulting from compilation.

FIG. 13 is an explanatory diagram of a call saving register.

FIG. 14 is an explanatory diagram of an instruction sequence of a compilation result by the conventional method.

FIG. 15 is an explanatory diagram of an example of a prologue routine.

FIG. 16 is an explanatory diagram of an instruction sequence of a compilation result according to the present invention.

[Explanation of symbols]

 1 Source Program 2 Compiler 3 Object Program 4 Prolog Routine, Epilog Routine 5 Library 6 Linker 7 Execution Program 21 Intermediate Code Generator and Optimizer 22 Prolog Code Generator 23 Machine Language Code Generator

Claims (3)

[Claims] 1. A compiler that implements a subroutine call by using a prologue code that executes a process including register saving at a subroutine entrance of an object program and an epilogue code that executes a process including register restoration at a subroutine exit , An instruction that sets a predetermined constant data in a register from the instruction sequence of the subroutine and that can be moved to the entrance of the subroutine is extracted and deleted. Allocating a predetermined specific call save register, storing the constant data in a memory, and calling a prologue routine for copying the constant data in the memory to the predetermined specific call save register Characterized by generating a prologue code Prologue code generation method of the subroutine that. 2. Extracted from the instruction sequence of the subroutine,
Set by the constant setting instruction when the call save register set by the constant setting instruction that sets the predetermined constant data in the register is not included in the call save register group in the place predetermined with the prologue routine. Check whether or not there is a register that can be exchanged with the call save register that is exchanged in the specified call save register group, replace the exchangeable registers with each other, and refer to or define these registers in the subroutine. 2. The method of claim 1, wherein the operand of the instruction is rewritten. 3. A compiler that implements a subroutine call by using a prologue code that executes processing including register saving at the entrance of a subroutine of an object program and an epilogue code that executes processing including register restoration at the exit of the subroutine. If a copy of the argument register is performed in the basic block at the entrance of the subroutine, the copy instruction is extracted and deleted, and a predetermined specific call save is performed as a register to which the argument register is copied. A method of generating a prologue code for a subroutine, which comprises allocating a register and generating a prologue code including a process of calling a prologue routine including a copy instruction of an argument to the specific call save register.