JPH09120497A - Control unit pulse communication system for automobile and frequency-divided signal communication system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a control unit pulse communication system for automobiles and the signal communication system which performs transmission while varying a frequency division ratio according to frequencies at low cost. SOLUTION: This system is equipped with a sensor 5 which is provided in an automobile and outputs a pulse signal varying in frequency according to a detected state, a common frequency division processing circuit 14 which receives the pulse signal outputted by the sensor 5 and outputs a frequency- divided signal, and plural control units 11, 12, and 13 which perform control operation according to the frequency-divided signal outputted by the common frequency division processing circuit 14. The common frequency division processing circuit 14 varies the frequency division ratio according to the frequency of the pulse signal and outputs information showing the frequency division ratio and the control units processes the frequency-divided signals according to the information showing the frequency division ratio.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vehicle control unit that controls a plurality of control units in a vehicle in cooperation with each other and communicates signals such as output signals of sensors commonly used by the control units to the control unit. The present invention relates to a pulse communication system and a frequency-divided signal communication system that communicates a divided pulse signal while changing a frequency division ratio according to the frequency of the original pulse signal, and in particular, a plurality of engine control units (hereinafter,
Referred to as ECU. ) Jointly controls the engine E
The present invention relates to a pulse signal communication system between CUs.

[0002]

2. Description of the Related Art An ECU is composed of a computer, and a plurality of computers usually share control to control an automobile engine. The cost per computer is very low compared to the case where one expensive high-performance computer performs all control, so the cost is low as a whole, and the computers monitor each other. This improves the reliability. Each E
The CU performs necessary control based on output signals of various sensors and output signals of other ECUs. The output signal of the sensor includes a signal commonly used by a plurality of ECUs, such as a vehicle speed sensor signal. In the conventional engine control system, a signal commonly used by such a plurality of ECUs is supplied from a sensor to each ECU.

FIG. 9 is a diagram showing a configuration of a conventional example of a pulse signal communication system between ECUs. In FIG. 9, reference numeral 1 is an engine, 2 is a transmission, 3 is a drive shaft, 4 is a propeller shaft,
Reference numeral 5 is a vehicle speed sensor, and reference numerals 18, 19, and 20 are first, second, and third ECU units. The first ECU unit 18 is a first ECU
The second ECU unit 19 includes a CU 11 and a first frequency dividing circuit 15 that divides a frequency according to a vehicle speed sensor signal.
The third ECU unit 20 includes a U12 and a second frequency dividing circuit 16 that divides a frequency according to a vehicle speed sensor signal.
A third frequency dividing circuit 1 for dividing the frequency by receiving 13 and the vehicle speed sensor signal
7 are provided. In this way, each ECU unit
It has a frequency dividing circuit for dividing the vehicle speed sensor signal for each time.
Each ECU controls each of them based on the vehicle speed sensor signal divided by the frequency dividing circuit. However, since the frequency division ratio of the vehicle speed sensor signal suitable for control differs depending on the control content, each frequency dividing circuit Frequency division is performed at a frequency division ratio suitable for the corresponding ECU.

The vehicle speed sensor 5 is one of the propeller shafts 4.
Generate a predetermined number of pulses for rotation. Since the rotation speed of the propeller shaft 4 changes according to the change of the vehicle speed, the frequency of the vehicle speed sensor signal also changes according to the change of the vehicle speed.
Therefore, the rotation speed of the propeller shaft 4 becomes low during low speed traveling, and the rotation speed of the propeller shaft 4 also becomes maximum during high speed traveling, and the frequency of the vehicle speed sensor signal becomes considerably high. That is, the frequency change range of the vehicle speed sensor signal is quite large.

[0005]

As shown in FIG. 9, since the vehicle speed sensor signal is transmitted from the vehicle speed sensor 5 to each ECU section through a separate signal path, the signal path is also the number of ECUs using the vehicle speed sensor signal. There is a problem in that it is necessary to provide the additional cost, and the cost is increased accordingly. As described above, the variation range of the frequency of the vehicle speed sensor signal is large, and the maximum frequency is considerably high. Therefore, the frequency dividing circuit provided in each ECU unit changes the number of stages of frequency division according to the frequency of the vehicle speed sensor signal, so that the signal is suitable for processing by the corresponding ECU. Further, the frequency dividing circuit needs to be a circuit capable of processing a high frequency signal. Therefore, it is necessary to provide a high-cost frequency dividing circuit in each ECU section, which causes a problem that the cost of the entire system increases.

The present invention has been made to solve the above problems, and is a simple and low-cost automobile control unit pulse communication system, and has a large frequency change range and a frequency division ratio changed according to the frequency. An object of the present invention is to realize a signal communication system suitable for communicating a pulse signal to a system using the pulse signal.

[0007]

A vehicle control unit pulse communication system according to a first aspect of the present invention, which achieves the above object, provides a pulse signal which is provided in an automobile and whose frequency changes according to a detected state. A sensor for outputting, a common frequency division processing circuit for receiving a pulse signal output from the sensor and outputting a frequency division signal obtained by dividing the pulse signal, and a plurality of control operations according to the frequency division signal output by the common frequency division processing circuit. And a control unit of.

With such a configuration, it is possible to share the portion for performing the frequency division processing and also share the signal path from the sensor that transmits a high-speed signal to the frequency division processing circuit, so that the overall circuit scale can be reduced. The cost can be reduced. Furthermore, in the first aspect, the common frequency division processing circuit changes the frequency division ratio according to the frequency of the pulse signal, and outputs information indicating the frequency division ratio together with the frequency division signal, and the plurality of control units divide the frequency. The divided signal is processed based on the information indicating the division ratio.

In the frequency-divided signal communication system according to the second aspect of the present invention, the frequency-divided circuit for dividing the original pulse signal to generate the divided signal and transmitting the divided signal, In a frequency division signal communication system including a reception circuit for receiving a frequency division signal to be output, in order to achieve the above object, the frequency division circuit changes the frequency division ratio according to the frequency of the original pulse signal, The information indicating is output together with the frequency-divided signal, and the receiving circuit processes the frequency-divided signal based on the information indicating the frequency division ratio.

With this configuration, even if the frequency of the pulse signal changes, the frequency of the frequency-divided signal to be transmitted does not change so much and the frequency-divided signal becomes a signal of a relatively low frequency.
There are few restrictions on the communication path. When changing the frequency dividing ratio, the frequency for changing the frequency dividing ratio is changed according to the increase and decrease of the frequency of the pulse signal, and the change of the frequency dividing ratio has hysteresis. As a result, the frequency division ratio does not change frequently, and stable frequency division signal transmission becomes possible.

Information indicating the frequency division ratio at that time is included in the frequency division signal. The information indicating the frequency division ratio is represented by the pulse width of the short pulse when a pulse shorter than one pulse of the frequency division signal is added to the first state change portion of the frequency division signal when the frequency division ratio is changed.

[0012]

1 is a diagram showing the configuration of an embodiment of the present invention. As is clear from comparing FIGS. 1 and 9,
In this embodiment, the present invention is applied to an engine control system of an automobile similar to that shown in FIG. 9, and the first control unit provided in each of the first ECU unit 18, the second ECU unit 19, and the third ECU unit 20. Frequency circuit 15, second frequency divider circuit 16, third frequency circuit
The difference is that a common frequency division processing ECU 14 is provided instead of the frequency division circuit 17.

Normally, the first ECU 11, the second ECU 12,
The third ECU 13 is provided close to a position close to the driver's seat, but the vehicle speed sensor 5 is provided at a position away from them. Therefore, it is necessary to lengthen the signal line that is the signal path from the vehicle speed sensor 5 to the common frequency division processing ECU 14. As shown in FIG. 9, in the conventional engine control system, three such long signal lines are provided, but in the present embodiment, only one is required. There are many other signals to which the present invention can be applied, so applying the present invention to all of them
The number of signal lines that can be reduced is very large. In recent years, automobiles are becoming electronic, and the number of wire harnesses such as power supply lines and signal lines provided in automobiles is ever increasing. Therefore, there is a strong demand for reducing the number of wire harnesses, and the present invention brings great effects.

Further, as is apparent from comparison between FIG. 1 and FIG. 9, the number of frequency dividing circuits is reduced from three to one in this embodiment, and the circuit scale required for that purpose can be reduced.
As described above, the vehicle speed sensor signal output by the vehicle speed sensor 5 is a pulse generated in response to the rotation of the propeller shaft 4, and changes the frequency in a wide range according to the change in the vehicle speed. Although each ECU performs various controls based on the vehicle speed sensor signal, it is necessary to receive the outputs of other sensors to perform control, and there is a problem that control is difficult if the frequency of the vehicle speed sensor signal changes in a too wide range. For example, each ECU detects a change in the vehicle speed sensor signal in order to detect the vehicle speed, but if the frequency of the vehicle speed sensor signal is high, the EC
Most of the processing time of U needs to be used for the processing for detecting the change of the vehicle speed sensor signal, which causes a problem that the burden on the ECU becomes too large. Therefore, when the frequency of the vehicle speed sensor signal becomes high for high-speed traveling, the frequency division ratio in the frequency division circuit is increased so that the frequency of the frequency division signal output from the frequency division circuit to each ECU is not increased. Is done. Since the vehicle speed sensor signal is used in connection with the processing of other signals, if the pulse of the vehicle speed sensor signal does not change for a long time, the control will be hindered. Therefore, it is necessary to reduce the frequency division ratio on the contrary at low speed traveling so that the pulse changes within a certain period. As shown in FIG. 9, in the conventional example, the frequency dividing circuit is provided so as to form a part of the circuit for each ECU, and when the frequency dividing ratio in the frequency dividing circuit is changed, each ECU Should detect this and perform processing according to the change in the division ratio. On the other hand, as shown in FIG. 1, in the present embodiment, the first ECU 11,
The common frequency division processing ECU 14 is provided for the second ECU 12 and the third ECU 13, and it is not preferable in terms of cost and the like to provide another signal system for transmitting signals other than the frequency division signal. Therefore, in this embodiment, the frequency division signal is made to include information regarding the frequency division ratio.

FIG. 2 is a diagram showing a frequency-divided signal generated in this embodiment, where (1) shows the frequency-divided signal and (2) shows the frequency-divided information. In this embodiment, the frequency range of the vehicle speed sensor signal is divided into a plurality of stages, and at each stage, 1/1 and 1
The frequency division ratios are set to ½, ¼, ⅛. Here, 1, 2, 4, and 8 will be referred to as frequency division coefficients.

FIG. 2A shows a frequency division signal when the frequency of the vehicle speed sensor signal gradually increases. When the frequency of the vehicle speed sensor signal is small, the original pulse is directly divided without being divided. It is a signal, but when the frequency is equal to or higher than the first predetermined value, it is divided into 1/2, and when the frequency is further equal to or higher than the second predetermined value, it is divided into 1/4. The coefficient is changed to 2 and 4. The same applies when the frequency decreases.

The frequency division coefficient is changed by determining the frequency division coefficient by detecting the frequency of the pulse signal immediately before the frequency division signal, that is, the time corresponding to one cycle of the pulse signal, at the time when the frequency division signal rises. Change if it is different from the frequency division coefficient up to. When it is determined that the frequency division coefficient needs to be changed at the time when the frequency division signal rises, the frequency is sufficiently shorter than the cycle of the frequency division signal.
A pulse with a short width is inserted as shown in (1). The pulse having the short width is a pulse having the same width in the “high” state and the “low” state, and the frequency division coefficient is represented by the pulse width. As shown in (2) of FIG. 2, the pulse width is set to 4n according to the frequency division coefficient.
s, 8 ns, 16 ns, 32 ns.

The common frequency division processing ECU 14 is provided with a register for storing the frequency division coefficient at that time as shown in (2) of FIG. 2, and stores the frequency division coefficient at that time. The short pulse as shown in (1) of FIG. 2 is inserted only when the frequency division coefficient is changed. Therefore, when there is no short pulse, the frequency division coefficient up to that time is maintained.

As described above, the frequency division coefficient is determined depending on whether the frequency of the vehicle speed sensor signal is equal to or higher than or equal to a predetermined value. When the frequency of the vehicle speed sensor signal fluctuates in the vicinity of the predetermined value, the frequency division is frequently performed. The frequency coefficient changes, which is not preferable in terms of processing. Therefore, in the present embodiment, as shown in FIG. 3, the frequency dividing the range of the frequency division coefficient is made different when the frequency is increased and when the frequency is decreased so that the frequency division coefficient is changed to have a hysteresis. There is.

The common frequency division processing ECU 14 for performing the frequency division processing as described above is composed of a computer.
The processing will be described. 4, 5, and 6 are flowcharts showing the processing procedure in the common frequency division processing ECU 14, and FIG. 7 is a time chart showing an example of frequency division processing in the common frequency division processing ECU 14. The processing procedure will be described with reference to these. It should be noted that although the frequency division coefficient has four stages in FIG. 2, it has three stages here for the sake of simplicity.

First, the common frequency division processing ECU 14 includes a frequency division timing counter CNT set by hardware or software, a frequency detection circuit for detecting the time of one cycle of the pulse signal, and (2) in FIG. ), A buffer CNTBU for storing the frequency division coefficient at that time shown in FIG. In step 101, an interrupt occurs in response to the rising or falling of the vehicle speed sensor signal.

In step 102, the frequency detection circuit detects the input frequency at that time. In step 103,
The count value of the counter CNT is decremented by 1. In step 104, it is determined whether the count value of the counter CNT is zero. The fact that this count value is zero means that it is the timing to change the divided signal. If the count value is not zero, the process proceeds to step 127.

If the count value is zero, step 10
In step 5, the output pulse output as the divided signal is inverted. In step 106, the frequency division coefficient CNTBU at that time is set in the accumulator A. In step 107, it is determined whether the change in the output pulse performed in step 105 is a rising change or a falling change. As described above, since the division coefficient is changed at the rising edge of the divided signal, if the change is a falling edge, step 1
08, the value of the accumulator A, that is, the frequency division coefficient CNTBU at that time is set in CNT, and step 1
Proceed to 27. If it is a rising change, it is determined whether the frequency division coefficient needs to be changed.

In step 109, the input frequency is set to the value shown in FIG.
Is less than L. If the input frequency is lower than L, the process proceeds to step 110, and if it is higher than L, the process proceeds to step 114. In step 110, it is determined whether or not the frequency division coefficient CNTBU so far is 2 or more. If CNTBU is 2 or more, the process proceeds to step 111. If CNTBU is 1, it is sufficient to maintain the frequency division coefficient as it is, so the routine proceeds to step 112, where 1 is set in the accumulator B.

In step 111, it is further determined whether the input frequency is 1 or less in FIG. When the input frequency is 1 or less, it is changed, and when the input frequency is 1 or more and L or less, the frequency division coefficient is 2. Therefore, when the input frequency is 1 or less, the process proceeds to step 112 and the accumulator B is entered. When 1 is set and the input frequency is 1 or more and L or less, the process proceeds to step 113 and 2 is set in the accumulator B.

In step 114, it is further determined whether the input frequency is higher or lower than H in FIG. When the input frequency is higher than H, the frequency division coefficient unconditionally becomes 4. Therefore, the routine proceeds to step 115, where 4 is set in the accumulator B, and when the input frequency is lower than H, step 1
Proceed to 16. In step 116, it is determined whether the frequency division coefficient CNTBU set in the accumulator A at that time is 4. If the frequency division coefficient at that time is 2, the input frequency is smaller than H and the frequency division coefficient may be 2. Therefore, the routine proceeds to step 117, and 2 is set in the accumulator B. If CNTBU is 4, the process proceeds to step 118.

In step 118, it is determined whether the input frequency is less than or equal to h in FIG. The division factor at that time is 4
If the input frequency is less than or equal to h, the frequency division coefficient is changed to 2. Therefore, the process proceeds to step 117, 2 is set in the accumulator B, and if the input frequency is more than h, the frequency division coefficient remains 4. Therefore, the process proceeds to step 119 and 4 is set in the accumulator B.

In step 120, the values of accumulators A and B are compared to determine if the frequency division coefficient needs to be changed. If there is no need to change, it is not necessary to input the short pulse shown in FIG. 2, so the process proceeds to step 121, the interruption by the computer is prohibited, and step 122
Set the value of accumulator B in CNT with step 1
Proceed to 27. If changes are needed, step 12
Proceed to 3.

In step 123, CNT, CNTBU
Set the value of accumulator B to. In step 124, accumulator A is set to zero. Step 12
In 5, the pulse width indicating the frequency division coefficient to be changed is read from the register shown in (2) of FIG. 2, and the time at which the output pulse falls is set based on that value. Specifically, if the frequency division coefficient is 1, 4 ns is set, if it is 2, 8 ns is set, and if it is 4, 16 ns is set. Actually, it is set by subtracting the time required from step 101 to step 125.

In step 126, it is set to allow the computer interrupt. In step 127, the polarity for interrupting in the next step 101, that is, if the vehicle speed sensor signal that generated the interrupt in step 101 is rising, next is falling, and if it is falling, next rising is interrupted. To set.

The above is the processing for determining whether or not it is necessary to generate the divided signal and change the dividing coefficient. In the above process, the insertion of the short pulse accompanying the change of the frequency division coefficient is performed by the computer interrupt in steps 125 and 126, so this computer interrupt process will be described below. When the time set in step 125 has elapsed, a computer interrupt occurs in step 201.

In step 202, the output pulse is inverted, which produces a short pulse with the modified frequency division factor. At step 202 it is determined if it is a falling edge. If it is a trailing edge, in step 204, in order to raise the output pulse again after the elapse of the same pulse width for a short pulse, the time at which the next computer interrupt occurs is set according to the frequency division coefficient and the processing ends. .

If it is a rising edge, since it is a rising edge after inserting a short pulse, the routine proceeds to step 205, where the next computer interrupt is prohibited. This prevents short pulses from being generated until the next division factor change. As shown in FIG. 7, each time the pulse of the vehicle speed sensor signal changes, the polarity interrupt of step 101 is generated, but the processing of step 105 and subsequent steps is performed only when the divided output rises. , Steps 123 to 126 and steps 201 to 205
Is processed only when the frequency division coefficient is changed and a short pulse is input to the frequency division output.

The common frequency division processing ECU 14 performs the above-mentioned processing to generate a frequency division signal.
It is necessary for 11 to 12 to receive such a frequency-divided signal, detect the frequency-division coefficient from the signal, and perform subsequent processing. Hereinafter, the first
The detection processing of the frequency division coefficient in the third ECUs 11 to 12 will be described. FIG. 8 is a flowchart showing a frequency division coefficient detection process in each ECU.

At step 301, an interrupt occurs at the rising edge of the divided signal. In step 302, the time from the rising edge of the divided signal to the next rising edge is detected. In step 303, step 3
It is determined whether the pulse cycle detected in 02 is 64 μs or more. If it is 64 μs or less, it means that the pulse is a short pulse showing the changed frequency division coefficient, and therefore the process proceeds to step 304 and 64
If it is equal to or less than μs, the frequency division coefficient is not changed and the frequency division signal is a normal frequency division signal.

In step 304, the frequency division coefficient is changed and the change is set in the register indicating that the frequency division coefficient has been changed. In step 305, if the register indicating that the frequency division coefficient has been changed is changed immediately before, the period of the pulse detected in step 302 is corrected by the amount of the short pulse, and then the division is performed. Clear the register that indicates that the frequency coefficient has been changed. If the register indicating that the frequency division coefficient has been changed does not indicate that it has been changed immediately before, the period of the pulse detected in step 302 is directly used as the pulse period.

In step 306, the number of revolutions of the propeller shaft, that is, the vehicle speed is calculated based on the above pulse period. In the embodiment described above, the engine control of the automobile has been described as an example, but the present invention can be applied to other control of the automobile, and further, a system for transmitting a frequency division signal whose frequency division coefficient changes. If so, the present invention can be applied to things other than automobiles.

[0038]

According to the present invention, since a control unit pulse communication system for an automobile can be realized with a simple structure, cost reduction can be achieved, and a pulse having a wide frequency change range and a frequency division coefficient changed according to the frequency. Since a system that communicates a divided pulse signal to a system that uses signals can be realized with a single signal line, such a system can be realized at low cost.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a diagram showing a divided signal generated in the embodiment.

FIG. 3 is a diagram illustrating a method of changing a frequency division coefficient according to the present invention.

FIG. 4 is a part of a flow chart showing a divided signal generation process in the embodiment.

FIG. 5 is a part of a flow chart showing a divided signal generation process in the embodiment.

FIG. 6 is a part of a flow chart showing a divided signal generation process in the embodiment.

FIG. 7 is a time chart of frequency division processing.

FIG. 8 is a flow chart showing frequency division coefficient detection processing on the receiving side.

FIG. 9 is a diagram showing a conventional example of a pulse signal communication system between ECUs.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Engine 2 ... Transmission 3 ... Drive shaft 4 ... Propeller shaft 5 ... Vehicle speed sensor 11, 12, 13 ... ECU 14 ... Common frequency division processing ECU

Claims (9)

[Claims] 1. A sensor (5) which is provided in an automobile and outputs a pulse signal whose frequency changes according to a detected state, and which receives the pulse signal output from the sensor (5) and outputs the pulse signal. A common frequency division processing circuit (14) that outputs a frequency-divided frequency division signal, and a plurality of control units (11, 1) that perform control operation according to the frequency division signal output by the common frequency division processing circuit (14).
2, 13) and a control unit pulse communication system for an automobile. 2. The common frequency division processing circuit (14) changes the frequency division ratio according to the frequency of the pulse signal, and outputs information indicating the frequency division ratio together with the frequency division signal. The vehicle control unit pulse communication system according to claim 1, wherein the control unit (11, 12, 13) processes the frequency-divided signal based on the information indicating the frequency division ratio. 3. The common frequency division processing circuit (14) changes the frequency for changing the frequency division ratio according to the increase and decrease of the frequency of the pulse signal, and gives a hysteresis to the change of the frequency division ratio. Item 2. A vehicle control unit pulse communication system according to Item 2. 4. The vehicle control unit pulse communication system according to claim 2, wherein the frequency division signal includes information indicating the frequency division ratio. 5. The information indicating the frequency division ratio is a pulse width of a pulse shorter than one pulse of the frequency division signal added to the first state change portion of the frequency division signal divided by the frequency division ratio. A vehicle control unit pulse communication system according to claim 4 represented. 6. A frequency dividing circuit (14) for frequency-dividing an original pulse signal to generate a frequency-divided signal and transmitting the frequency-divided signal, and the frequency-divided signal output from the frequency-dividing circuit (14). In a frequency division signal communication system comprising a receiving circuit (11, 12, 13) for receiving, the frequency division circuit (14) changes the frequency division ratio according to the frequency of the original pulse signal, and the frequency division ratio Is output together with the frequency-divided signal, and the reception circuit (11, 12, 13) processes the frequency-divided signal based on the information indicating the frequency-division ratio. system. 7. The frequency dividing circuit (14) varies the frequency for changing the frequency dividing ratio according to the increase and decrease of the frequency of the original pulse signal, and gives a hysteresis to the change of the frequency dividing ratio. 6. The frequency division signal communication system according to item 6. 8. The frequency division signal communication system according to claim 6, wherein the frequency division signal includes information indicating the frequency division ratio. 9. The information indicating the frequency division ratio is a pulse width of a pulse shorter than one pulse of the frequency division signal added to the first state change portion of the frequency division signal divided by the frequency division ratio. The divided signal communication system according to claim 8, which is represented.