JPH09116937A - Line system interface for private branch exchange - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily locate a fault location in a private branch exchange by quickly testing a network. SOLUTION: A loopback mode set switch 1 instructs setting of the loopback mode, A loopback control program for call control processing in layer 3 processing is stored in a ROM 5, and when the loopback mode is set by the loopback mode set switch 1, a processor 3 instructs loopback to a layer 1 circuit 9 for call connection processing. The layer 1 circuit 9 makes loopback of data of a B channel from an opposite station. Thus, the loopback is finished in a line system interface section. Furthermore, since a host device higher than an HWIP interface 6 is disconnected, even when a fault takes place, whether or not the fault occurrence location is resident at a line side of the line system interface section is easily located.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a line interface of a private branch exchange installed in a private branch exchange and having functions of a subscriber interface and an office line interface.

[0002]

2. Description of the Related Art A private branch exchange accommodates a station line, a subscriber line, and a line interface to perform exchange processing between the station line and the subscriber line. That is, the private branch exchange has a line interface as a package, a line trunk device (LTE) including a plurality of the line interfaces, a switching unit for switching signals input / output through the line interface of the line trunk device, and The main components are the main processor of the private branch exchange that performs switching control and maintenance operation control of the exchange unit.

[0003]

However, in the structure of such a private branch exchange, call processing cannot be performed unless the main processor is completely up and in an operating state. Therefore, for example, a test such as a line error check is required. There was a problem that could not be swift. Further, when a failure occurs in the private branch exchange, it is difficult to isolate the failure location such as whether the failure location is the main processor or switching unit or the line side.

From this point of view, it has been desired to realize a structure of a private branch exchange capable of promptly performing a test such as an error check and easily isolating a failure point in the private branch exchange.

[0005]

The present invention employs the following structure to solve the above-mentioned problems. <Structure of claim 1> In the line interface of the private branch exchange having the functions of the subscriber interface and the office line interface, it is possible to specify whether the relay between the office line and the subscriber line or the loopback operation is performed. A loopback mode setting switch, a layer 1 circuit that performs a loopback operation, and a loopback control unit that instructs the layer 1 circuit to perform the loopback operation when the loopback operation is designated by the mode setting switch. It is characterized by that.

<Explanation of Claim 1> The line interface unit in the private branch exchange has a function of a subscriber interface and a station line interface, and normally performs a relay process between the station line and the subscriber line. On the other hand, when performing a network test, first turn on the loopback mode setting switch.
And As a result, the processor in the loopback control means executes the loopback control program provided as the firmware program. This loopback control is a control for instructing a loopback operation to a layer 1 circuit having a layer 1 function. Upon receiving this instruction, the layer 1 circuit performs a loopback operation of the signal from the opposite station.

As a result, in the case of the loopback mode, it is possible to make the higher-order interface irrelevant to the line interface unit in the private branch exchange, and as a result, for example, even if the software is not installed in the private branch exchange itself, the network. Tests and the like can be conducted. Further, even if a communication failure occurs between different private branch exchanges, it is possible to easily determine whether the failure occurrence point is on the line side of the line interface unit or on the upper interface side.

<Structure of Claim 2> In the line interface of the private branch exchange having the functions of the subscriber interface and the office line interface, there is a layer 1 circuit for performing a loopback operation and a loopback mode setting instruction in the control channel. A loopback mode setting instruction detecting means for detecting whether or not there is a loopback mode setting instruction means and a loopback control means for instructing the layer 1 circuit to perform a loopback operation when there is a loopback instruction. It is characterized by having.

<Explanation of Claim 2> The loopback mode setting instruction detecting means detects, when the control channel of the signal from the opposite station includes the loopback mode setting instruction information. When the loopback mode setting instruction information is detected, the processor of the loopback control means performs the same loopback control operation as in the first aspect of the invention. This allows network tests to be performed even if software is not installed in the private branch exchange itself, and even if a communication failure occurs between different private branch exchanges, it is easy to isolate the location of the failure. Can be done. Further, even when performing a network test or the like, the test mode can be set by a message from the partner station.

<Structure of claim 3> In the line interface of the private branch exchange according to claim 1 or 2, as a loopback operation, a layer 1 circuit for returning all traffic channels except a control channel and a mode setting switch are used. When the loopback operation is designated, the loopback control means for performing the call control processing in the layer 3 processing is provided.

<Explanation of Claim 3> When there is a loopback instruction, the processor in the loopback control means performs the call control processing in the layer 3 processing. This call control processing is call processing such as call setup, response, and release. Further, when the loopback control means instructs the loopback operation, the layer 1 circuit loops back only all traffic channels (B channels) except the control channel (D channel) in the signal received from the opposite station.

Therefore, in the case of the loopback mode, it is possible to make the part of the interface higher than the line interface part in the private branch exchange that performs the processing of layer 3 irrelevant. Even if the software for three processes is not installed, a network test or the like can be performed. Further, since loopback is performed only on the B channel, call control in layer 3 can be reliably performed by the signal on the D channel.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a block diagram showing a specific example 1 of a line interface of a private branch exchange of the present invention. Prior to this explanation, a private branch exchange premised on the present invention will be described.

FIG. 2 is a block diagram of a private branch exchange. The device shown in the figure is a private branch exchange applicable to accommodate medium to large capacity subscribers, and includes a central processing module (CPM) 101, an interface processor (IP) 102, a time division switch (TSW) 103, and a line trunk device (LTE). ) 10
4 (104-1, ..., 104-n).

Further, each line trunk device 104 (10
4-1, ..., 104-n) are a highway interface processor (HWIP) 105 and a line interface unit (LC) 106 (106-1, 106-, respectively).
2, ..., 106-n). The line interface unit 106 is an interface for accommodating a station line or a subscriber line. For example, the line interface unit 1
06-1 is an ISDN primary rate interface (PR
It has a function as I). Also, in the figure, 107
Is a line terminating device / multiplexing circuit (DSU / MU) for the office line accommodated in the line interface unit 106-1.
X). Furthermore, each line interface unit 106
A preprocessor (PP) 108 is provided in each of (106-1, 106-2, ..., 106-n).

In the following, each line trunk device 104
(104-1, ..., 104-n) and the line interface unit 106 (106-1, 106-2, ..., 106).
-N) will be described as the line trunk device 104 and the line interface unit 106, respectively, on behalf of these.

As described above, the private branch exchange comprises a plurality of processors (central processing module 101, interface processor 102, highway interface processor 10).
5, the functions are distributed by the preprocessor 108). The central processing module 101 is a main control unit in the private branch exchange, includes a main processor, a memory, etc., executes call processing, maintenance operation control, and the like, and is loaded with software of the main body of the private branch exchange. The preprocessor 108 provided in the line interface unit 106 of the line trunk device 104 is a processor that mainly performs signal transmission and detection of the line interface unit 106. Substantial processing as a private branch exchange is performed by the central processing module 101 and the preprocessor 108.

On the other hand, the interface processor 102 and the highway interface processor 105 are communication processors for executing communication between the central processing module 101 and the preprocessor 108 which are physically separated from each other. The interface processor 102 has a common memory CM1. When the order for the preprocessor 108 is written from the central processing module 101 to the common memory CM1, the interface high-speed channel 1ch of the interface of the time division switch 103 (or Insert in multiple channels). The highway interface processor 105
The data is dropped from the channel including the order of the down highway in the interface of the time division switch 103, and the event coming from the line interface unit 106 is inserted into the up highway.

In the central processing module 101, S
An interface processor 102 and a highway interface processor 105 that perform loop communication by DLC
And each channel are connected as shown by the broken line in the figure to form a loop. Here, the highway interface processor 105 has a common memory CM2, and this common memory CM2 is provided for communication between the highway interface processor 105 and the interface processor 102.

When the line interface unit 106 mounted on the line trunk device 104 is an ISDN leased line interface (primary group speed interface) like the line interface unit 106-1, the line interface unit 106 is used. Then, the end of layer 1 (ITU-T Recommendation I.431) in the OSI reference model,
The layer 2 (ITU-T recommendation Q.921_a) is terminated, and the central processing module 101 executes the layer 3 (ITU-T).
-T recommendation Q. 931_a) is divided into functions. Therefore, the layer 3 message from the opposite station located on the opposite side of the leased line reaches the central processing module 101 via the interface processor 102 and the highway interface processor 105. Therefore, the network test using such a private branch exchange is as follows.

FIG. 3 is an explanatory diagram of this network test, which is a comparison of the network test of the present invention. In the figure, a private branch exchange (PBX) 200A is a new private branch exchange (PBX) 200B is an existing private branch exchange,
Here, a loopback test is shown when the private branch exchange 200A is connected to the private branch exchange 200B via a communication line (ISDN dedicated line) 202.

The private branch exchange 200B has already started up, and the test terminal 201B is installed on the subscriber line side. Private branch exchange 2 whose test terminal 201B is the opposite station
00A test terminal 201A to the private branch exchange 20
By returning the B channel (traffic channel) on the 0A side, the error check of the channel can be performed. 10 in private branch exchange 200A
6a and 106b are the primary group speed interface (PR) that constitutes the line interface unit 106 described in FIG.
I) and the functional blocks of the basic interface (BRI) are shown, and the test terminal 201 on the side of the private branch exchange 200B is shown.
It has a function of relaying a signal from B and a signal looped back at the test terminal 201A.

However, when such a private branch exchange is newly installed, the startup of the device (hardware) has been completed, but software has not been installed in the device or station data has not been set. There are cases. In such a case, since the loopback test cannot be performed, it is not known at that time whether or not the wiring work from the line interface unit 106 of the private branch exchange 200A to the communication line 202 is normally completed. Become.

Therefore, in the present invention, by providing the loop interface function to the line interface unit 106,
Even if software is not installed in the private branch exchange itself, such a line test or the like can be performed. The line interface of the private branch exchange of the present invention will be described below with reference to FIG.

<Specific Example 1> The apparatus of FIG. 1 shows a primary group speed interface block portion of the line interface section 106 of FIG. The apparatus shown in the figure includes a loopback mode setting switch 1, an interface (I / F) 2, a processor (CPU) 3, a RAM 4,
ROM 5, HWIP interface 6, pad control circuit (PAD) 7, layer 2 controller (LAPD) 8,
It is composed of the layer 1 circuit 9.

The loopback mode setting switch 1 is a switch for designating whether to perform relay between a normal office line and a subscriber line or to perform a loopback operation, and is connected to the bus 10 via the interface 2. It is connected. That is, the loopback mode setting switch 1 is for setting the level signals of "0" and "1" in the I / O space of the processor 3.

The processor 3, the RAM 4 and the ROM 5 constitute a loopback control means 11. The loopback control means 11 has a function of instructing the layer 1 circuit 9 to perform the loopback operation when the loopback operation is designated by the loopback mode setting switch 1. That is, the ROM 5 of the present invention stores a loopback control program 5a as a firmware program, and the processor 3 executes the loopback control program 5a to perform a loopback operation. .

The loopback control program 5a has a ITU-T recommendation 9 as shown in an SDL chart described later.
It is a processing program that sends out only the part of the 31_a (PBX digital interface layer 3 specification) message necessary for call establishment and call maintenance. Here, the processor 3 is the preprocessor (PP) 108 in FIG. 2, and the RAM 4 is
It is a memory for storing data and configuring a work area during loopback control operation. And in the figure, 12
Is a reset switch to the processor 3.

The HWIP interface 6 has an interface function with the highway interface processor 105 shown in FIG. Pad control circuit 7
Has a function to optimize the voice level, and to distribute the traffic channel (B channel) to the HWIP interface 6 and the control channel (D channel) to the layer 2 controller 8.
The layer 2 controller 8 has a function of terminating the D channel and performing layer 2 processing. Layer 1 circuit 9
Is a circuit having a function of performing processing of layer 1, loopback at the layer 1 level, that is, based on a loopback operation instruction from the processor 3, returns all B channel data except D channel, and returns to the opposite station. It has a function to send it back.

Next, the operation will be described. The loopback mode setting switch 1 is set to OFF (“0”) except when performing the loopback test.
Therefore, the line interface unit 106 performs normal signal relay processing.

When carrying out the loopback test, the loopback mode setting switch 1 is set to ON and the reset switch 12 is pressed. That is, the loop-back mode setting switch 1 is restarted with the ON (“1”) state.
As a result, the processor 3 recognizes the loopback mode setting instruction and executes the loopback control program 5a in the ROM 5.

4 and 5 are SDL charts of the loopback operation. FIG. 6 is an explanatory diagram of a network test when the line interface of the private branch exchange of the present invention is used.

The line interface unit 106 shown in FIG.
Primary group velocity interface block 106a
Then, after setting the loopback mode as described above, when the test terminal 210B of the opposite station makes a call to the test terminal 201A, the primary group velocity interface block 106
a performs the process of FIG.

That is, when the private branch exchange 200A receives the call setup (SETUP) from the private branch exchange 200B, the private branch exchange 200A enters the incoming call state and returns a call setting acceptance (CALL PROCESSEDING) to the private branch exchange 200B. Then, the incoming call acceptance state (INCOMING CALL PR
Then, the loopback point of layer 1 is set (the loopback operation instruction is given to the layer 1 circuit 9). This allows layer 1
The circuit 9 loops back the B channels other than the D channel, and thereafter, makes a virtual call (ALERTI) to the test terminal 201A.
NG), response (CONNECT) processing, a response state (CONNECT REQUEST) is reached, and when a response confirmation (CON ACK) is received from the private branch exchange 200B side, communication is in progress (Q931_a, state 10).

As a result, the test terminal 201B on the side of the private branch exchange 200B is in a communication state, and the data (for example, the code of the test pattern such as PN9.11) transmitted by itself on the B channel and the loop on the side of the private branch exchange 200A. The data returned and returned is collated, and the test terminal 20
It is possible to confirm the settings from 0B to the primary group speed interface block 106a of the private branch exchange 200A and the normality of the work wiring.

When the loopback test is completed, the primary group velocity interface block 106a is released (RELEAS) from the test terminal 200B as shown in FIG.
E) is received and release complete (RELESE COMPLE
TE) is returned, the loopback point is released (the loopback operation instruction of the layer 1 circuit 9 is released), and the call number is released (RELEASE CALL REFERENCE).
I do.

After that, when the test mode is to be released, the loopback mode setting switch 1 is turned off and the reset switch 12 is pressed down to enter the normal operation mode. In the normal operation mode, as far as the layer 3 message is concerned, the line interface unit 106
The primary group velocity interface block 106 a only performs a relay function to the central processing module 101.

As described above, according to the first specific example, the primary group velocity interface block 106a is provided with the loopback mode setting switch 1 for setting the loopback mode, and by setting the loopback mode setting switch 1, Since the loopback control means 11 issues the loopback operation instruction in the layer 1 circuit 9, the network test and the like can be performed even when the software is not installed in the private branch exchange itself. That is, according to the specific example 1, even before the software installation and the station data setting of the private branch exchange 200A, the primary group speed interface block 1
The error rate test can be easily performed from the normal test terminal 201B as long as construction wiring and power supply to 06a are performed.

A private branch exchange 200 as shown in FIG.
In the case where a communication failure occurs between the terminals connected to A and 200B, with the conventional configuration, it is possible to quickly separate the line interface unit 106 from the DSU / MUX 107 side or the upper interface side. Although difficult, in the first specific example, the upper interface and the line interface unit 106 can be completely separated from each other, so that the location of the failure can be easily identified.

By the way, in the specific example 1, the loopback operation is set by the setting of the loopback mode setting switch 1. However, in addition to this, the signal from the other party is used as a trigger to shift to the loopback mode. You may comprise. This will be described below as a second specific example.

<Specific Example 2> FIG. 7 is a block diagram of a specific example 2. The specific example 2 is different from the specific example 1 in that the loopback mode is set according to the information of the D channel from the other party. In order to detect this information, the specific example 2 is different. A loopback mode setting instruction detecting means 13 is provided. The loopback mode setting instruction detecting means 13 has a function of detecting whether or not there is a loopback mode setting instruction in the control channel (D channel), and the processor 3 and the layer 2 controller 8 have this function. Are configured. That is,
The processor 3 is a D that is terminated by the layer 2 controller 8.
When the loopback mode setting instruction information is included in the channel, the setting of the loopback mode is recognized as in the case of the first specific example. Since the other configurations are the same as those in the specific example 1, the corresponding parts are designated by the same reference numerals and the description thereof will be omitted.

The operation at the time of the network test of the specific example 2 configured in this way is as follows. In FIG. 6, when the private branch exchange 200B side gives a signal containing loopback setting instruction information to the D channel to the private branch exchange 200A side, the primary group speed interface block 10
The loopback mode setting instruction detecting means 13 of 6a detects this setting instruction. Thereby, the loopback control means 11 performs loopback control. Since this loopback control is the same as that of the first specific example, its description is omitted here.

As described above, according to the second specific example, the loopback mode setting instruction detecting means 13 checks whether or not there is loop mode setting instruction information in the D channel from the opposite station. Since the loopback control is performed, the same effect as that of the above-described specific example 1 is achieved, and in the private branch exchange 200A on the side to be tested, it is not necessary to make settings for the test and the control is performed on the side to execute the test. be able to.

In each of the above specific examples, the line speed is not particularly mentioned, but if the D channel common line interface is applied to the recommendation Q921_a (layer 2) and the recommendation Q931_a (layer 3), the line speed is 1.5
The present invention is not limited to Mbps, and the same effect can be obtained even at 2 Mbps. Also, the number of D channels accommodated in the primary group speed interface block 106a is not limited to one, and is a private branch exchange in which a plurality of D channels are mounted and route division is performed based on each D channel. However, the same is applicable.

[0045]

As described above, according to the line interface of the private branch exchange of the present invention, a network test or the like can be performed even when the software is not installed in the private branch exchange itself. Further, even if a communication failure occurs between different private branch exchanges, it is possible to easily determine whether the failure occurrence point is on the line side of the line interface unit or on the upper interface side.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a line interface of a private branch exchange according to a specific example 1 of the present invention.

FIG. 2 is a configuration diagram of a private branch exchange.

FIG. 3 is an explanatory diagram of a network test.

FIG. 4 is an SDL chart (1) of a loopback operation in the line interface of the private branch exchange of the present invention.

FIG. 5 is an SDL chart (No. 2) of the loopback operation in the line interface of the private branch exchange of the present invention.

FIG. 6 is an explanatory diagram of a network test when the line interface of the private branch exchange of the present invention is used.

FIG. 7 is a configuration diagram of a line interface of a private branch exchange according to specific example 2 of the present invention.

[Explanation of symbols]

 1 Loopback Mode Setting Switch 5a Loopback Control Program 9 Layer 1 Circuit 11 Loopback Control Means 13 Loopback Mode Setting Instruction Detection Means 106-1 to 106-n Line Interface Unit 106a Primary Group Speed Interface Block

Claims (3)

[Claims] 1. A loopback for designating whether to relay between a local line and a subscriber line or to perform a loopback operation in a line interface of a private branch exchange having functions of a subscriber interface and a local line interface. A mode setting switch, a layer 1 circuit that performs a loopback operation, and a loopback control unit that instructs the layer 1 circuit to perform the loopback operation when the loopback operation is designated by the mode setting switch. A line interface for a private branch exchange. 2. A layer 1 circuit for performing a loopback operation in a line interface of a private branch exchange having functions of a subscriber interface and a local line interface, and detecting whether or not there is a loopback mode setting instruction in a control channel. Loopback mode setting instruction detecting means for performing the loopback mode setting instruction means, and loopback control means for instructing the loopback operation to the layer 1 circuit when the loopback instruction is issued by the loopback mode setting instruction means. The line interface of the private branch exchange. 3. The line interface of the private branch exchange according to claim 1, wherein a loopback operation is performed by a layer 1 circuit that loops back all traffic channels except a control channel and a mode setting switch as a loopback operation. A loop interface control means for performing call control processing in layer 3 processing when specified, a line interface of a private branch exchange.