JPH09100738A - Idle engine speed controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the excessive increase of an idling engine speed and to properly issue and alarm about a failure even during any failure which makes it impossible to shut off the flowing of electricity from a switching element to a coil. SOLUTION: A first transistor Tr1 switched ON/OFF by a duty ratio which is based on an objective idling engine speed at the time is connected to the ground side of the coil 6a of an ISC valve 6 and a second transistor Tr2 switched ON/OFF by a prescribed duty ratio when shutting of electricity flowing to the coil 6a by the first transistor Tr1 is made impossible is connected to the battery side of the coil 6a. A CPU 21 detects a failure which makes it impossible to shut off electricity flowing to the coil 6a by the first transistor Tr1 based on the existence of the edge of the comparator output of a voltage level determination circuit 32. Also, the CPU 21 lights a failure alarming lamp when the failure is detected and limits the increase of an idling engine speed based on a prescribed engine speed higher than the objective idling engine speed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an idle speed control valve (hereinafter referred to as an idle speed control valve for adjusting an intake air amount at idle).
The present invention relates to an engine idle speed control device equipped with an ISC valve).

[0002]

2. Description of the Related Art An ISC valve for controlling an intake air amount to an engine at idle is composed of a linear solenoid type electromagnetic valve, and its driving method is known to control a current value flowing in an electromagnetic coil by duty. is there. In such a case, IS is
The opening degree of the C valve is controlled. In addition, as the configuration of the drive circuit of the ISC valve, the drive circuit composed of two control systems
A technique for duty-controlling the C valve has been disclosed (for example, Japanese Patent Publication No. 5-36623 and Japanese Patent Laid-Open No. 4-2528).
37), it is described that the ISC valve can be continuously controlled even if a failure such as a short circuit occurs in one of the control systems.

Specifically, the transistor for normal control is connected to either one of the power supply side terminal and the ground side terminal of the ISC valve, and the auxiliary control transistor is connected to the other. In the normal state, the former transistor is duty-controlled to turn on / off the energization of the ISC valve, thereby controlling the idle speed. Also,
When it becomes impossible to turn on / off the power supply by the transistor, the latter transistor is turned on / off by duty control, whereby the idle speed is controlled. According to the above configuration, even if the ISC valve cannot be controlled by one control system (transistor for normal control) (even if the function of shutting off the current is lost), the other control system (transistor for auxiliary control) The control of the ISC valve can be continued, and the control failure due to the abnormal opening of the ISC valve can be eliminated.

[0004]

However, in the above-mentioned prior art, when a failure occurs in the normal-time control system (a failure to lose the function of shutting off the current) as described above, the auxiliary control system causes normal idle operation. The rotation speed control is continued,
The driver does not notice that the failure has occurred and continues to drive. In addition, even if the auxiliary control system loses its function of shutting off the current first, the ISC function of the control system for normal operation can be performed without any problem, so the driver does not notice that a failure has occurred. , Keep driving as it is. for that reason,
If a failure occurs in the remaining one normal control system during the subsequent engine operation, the ISC valve may be fully opened. In such a case, the idle rotation speed may be excessively increased, which may give an uncomfortable feeling to a vehicle occupant.

These failures are so-called "double failures".
(It is usually not necessary to consider this when designing a system), but the first failure cannot be detected by the driver, and the driver cannot take any appropriate action. Therefore, it was necessary to consider it in the design.

The present invention has been made in view of the above problems, and its object is to prevent the double failure in an apparatus for driving an ISC valve with two switching elements for normal control and auxiliary control. IS in any case including
It is possible to prevent the idle speed from rising excessively even in the event of a failure that makes it impossible to cut off the power to the C valve, properly warn of the failure, and easily identify the failure content at a repair shop or the like. An object is to provide an idle speed control device for an engine.

[0007]

According to the first aspect of the invention, the idle speed control valve (ISC valve) adjusts the intake air amount during idling by the average current flowing through the coil. More specifically, during normal control, the switching element for normal control is turned on / off by duty control, and the engine speed during idle operation is controlled to the target idle speed. Further, when it is impossible to interrupt the energization of the coil by the switching element for normal control, the switching element for auxiliary control is turned on / off at a predetermined duty ratio to control the idle speed.

On the other hand, the failure detecting means detects a failure that makes it impossible to interrupt the energization of the coil by the switching element for normal control. The warning means warns that there is a failure when the failure detection means detects a failure. The rotation speed regulation means, when the failure is detected by the failure detection means, a predetermined rotation speed higher than the target idle rotation speed (for example, about 1000).
(-1200 rpm) limits the increase in idle speed.

That is, in the event of a failure that makes it impossible to interrupt the energization of the coil by the switching element for normal control (ON failure or short-circuit failure of the switching element), the switching element for auxiliary control is turned on. The idling speed is controlled by turning off. At this time, since the increase in the idle speed is regulated, even if the switching element for auxiliary control fails, the engine can be continuously operated without causing an excessive increase in the speed. Further, when the above-mentioned failure occurs, a warning is issued by the warning means, so that the driver can be appropriately notified of the failure.

On the other hand, when the failure diagnosis is carried out in a repair shop or the like according to the warning by the warning means, it is determined that a failure has occurred on the switching element side for normal control based on the failure information of the failure detection means. Of course, it is possible to specify whether or not there is a failure on the switching element side for auxiliary control. That is, when the switching element side for normal control fails, the idle speed is controlled by the switching element for auxiliary control as described above. Therefore, if the rotation speed control by the switching element for auxiliary control is continued, the idle rotation speed becomes stable at the target idle rotation speed (for example, about 750 rpm). On the other hand, if the switching element for auxiliary control also fails so that the power supply to the coil cannot be cut off, the idle speed increases and the speed becomes higher than the target idle speed (about 1000 to 1200 rpm). fluctuate. Therefore,
As described above, the movement of the idle speed changes depending on whether the energization interruption by the auxiliary control switching element is normal or not, and thus it is possible to easily specify the presence or absence of a failure of the auxiliary control switching element.

According to the second and third aspects of the present invention, the cut-off cylinder control of the fuel cut or the fuel injection suppresses the increase of the idle speed when the switching elements for the normal control and the auxiliary control fail. . In this case, it is possible to surely and easily prevent the idle speed from increasing.

According to the fourth aspect of the present invention, the existing device (warning light for warning the exhaust gas level) is used to notify the driver of the failure information, thereby eliminating the need to install a new warning device. As a result, parts can be shared, which contributes to cost reduction.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) A first embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic configuration diagram showing, together with a multi-cylinder gasoline engine, an electronic control unit (ECU) for controlling the drive of various actuators (ignition system, fuel injection system, etc.) necessary for operating the engine.

In the illustrated engine 1, intake air is taken in from an air cleaner (not shown), and its flow rate is controlled by a throttle valve 2 which is interlocked with an accelerator pedal (not shown) operated by a driver. 4 is led to the intake port 4a. The intake system is provided with a bypass passage 5 that bypasses the throttle valve 2. The bypass passage 5 is provided with a valve element (not shown) driven by a solenoid coil.
An ISC valve 6 is provided to control the amount of air passing through.

A fuel injection valve 7 is provided in the intake pipe 4, and fuel is supplied to the fuel injection valve 7 from a fuel tank (not shown) through a fuel pipe. Since a known pressure regulator is provided in the middle of the fuel pipe, the fuel pressure is kept constant. Therefore, when an injection pulse is given to the fuel injection valve 7 and opened, the amount of fuel exactly proportional to the effective pulse width is injected into the intake port 4a. The air-fuel mixture generated in the intake port 4a is introduced into the combustion chamber 9 of the engine 1 via the intake valve 8 and ignited by the spark formed by the spark plug 10 at a predetermined timing. The exhaust gas generated by the combustion of the air-fuel mixture is released to the atmosphere via the exhaust valve 12, the exhaust pipe 13 and the catalytic converter (not shown).

As is well known, the distributor 14 distributes the high voltage generated at a predetermined timing by the igniter 15 to the spark plug 10 of each cylinder. Further, the engine 1 is provided with an air flow meter (not shown), an intake air temperature sensor 16, a throttle sensor 17, an air-fuel ratio sensor 18, a crank angle sensor 19 and the like as various sensors for detecting the operating state thereof.

Each of the above-mentioned sensors is an ECU 2 for controlling the idle speed, the fuel injection amount and the ignition timing of the engine 1.
Connected to 0. The ECU 20 operates by the power supply from the battery 30, inputs signals from the above-mentioned sensors, and drives the ISC valve 6, the fuel injection valve 7, the igniter 15 and the like according to a predetermined procedure. That is, the ECU 2
0 controls the idle speed of the engine 1 to a target value.
Further, the ECU 20 executes fuel injection according to the engine operating state and controls the ignition timing to an optimum advance angle. On the other hand, the ECU 20 is provided with a malfunction warning light 35 (MIL: Malfunction in) for warning the driver of deterioration of the exhaust gas level.
dicator light) is connected, and the ECU 20 turns on the failure warning light 35 when a failure that causes deterioration of the exhaust gas level occurs.

FIG. 2 is a block diagram showing the configuration of the ECU 20, and as shown in the figure, the ECU 20 is a well-known C
The PU 21, the ROM 22, the RAM 23, etc. are mainly configured as a logical operation circuit. The ECU 20 is further provided with input / output ports such as a digital input port 24, an analog input port 25, a fuel injection valve drive circuit 26, an igniter drive circuit 27, an ISC valve drive circuit 28, etc. Are connected to each other via. The crank angle sensor 19 is connected to the digital input port 24, and the intake air temperature sensor 1 is connected to the analog input port 25.
6, a throttle sensor 17, and an air-fuel ratio sensor 18 are connected to each other. In this embodiment, the CPU 2
1 constitutes failure detection means, warning means, rotation speed regulation means, and fuel cut means.

The fuel injection valve drive circuit 26 includes a compare register and a timer (not shown). When the time measured by the timer reaches the time written in the compare register,
The fuel injection valve 7 is closed. Therefore, if the CPU 21 outputs a control signal for opening the fuel injection valve 7 and writes the valve closing time in the compare register, the fuel injection valve drive circuit 26 closes the fuel injection valve 7 at that time.
The igniter drive circuit 27 turns on and off the primary coil of the step-up transformer (not shown) of the igniter 15 at high speed to generate a high voltage in the secondary coil of the igniter 15 at a desired timing. Then, this high voltage applied through the distributor 14 causes the spark plug 10 of each cylinder to form a spark.

On the other hand, the ISC valve drive circuit 28 is for displacing a valve body (not shown) by turning on / off the current flowing through the coil of the ISC valve 6, the details of which are shown in FIG. In FIG. 3, the ISC valve drive circuit 28 is an ECU.
Coil 6 of ISC valve 6 through P terminal and N terminal of 20
a first and second transistors Tr connected to both ends of a
1 and Tr2. That is, the first transistor T
The r1 is connected between the N terminal of the ECU 20 and the ground GND, and the transistor Tr1 corresponds to a “switching element for normal control”. Also, the second transistor T
The r2 is connected between the P terminal of the ECU 20 and the battery power source + B, and the transistor Tr2 corresponds to a “switching element for auxiliary control”. Each transistor Tr1, T
The r2 is turned on / off according to the control signals S1 and S2 from the CPU 21.

The control signal S1 for operating the first transistor Tr1 is a duty signal for controlling the average current flowing through the coil 6a, and its duty ratio is set according to the target idle speed at that time. The duty ratio of the control signal S1 is set within the range of 5 to 95%, for example. On the other hand, the control signal S2 for operating the second transistor Tr2 is a signal that is normally on (duty ratio = 100%) during normal operation, and it becomes impossible to interrupt the energization of the coil 6a by the first transistor Tr1. Only when it becomes, the duty signal is changed as the emergency control signal. The current detection resistor R1 is connected between the emitter terminal of the first transistor Tr1 and the ground GND.

Therefore, normally, the average current flowing through the coil 6a of the ISC valve 6 is controlled by the on / off operation of the first transistor Tr1, that is, the duty ratio of the control signal S1. At this time, the ISC valve 6 is opened / closed by a required amount according to the target idle speed to increase or decrease the intake air amount to the engine 1 required during idling.

A current feedback circuit 31 is connected to the base terminal of the first transistor Tr1. The current value detected by the current detection resistor R1 and the control signal S1 are input to the circuit 31. . The current feedback circuit 31 has a duty ratio of the control signal S1 and
The duty ratio of the control signal S1 is corrected in order to eliminate the deviation from the current value to be supplied to the coil 6a at the duty ratio, and the first duty is corrected by the corrected duty signal.
The transistor Tr1 of is turned on / off. That is, if the resistance value of the coil 6a is unchanged and the battery voltage is constant, a predetermined average current corresponding to the duty ratio at that time flows through the coil 6a, but the resistance value changes depending on the temperature of the coil 6a, for example. Also, the battery voltage fluctuates. Therefore, even if the duty ratio is the same, the coil 6
The average current flowing through a changes, and an error occurs in the valve opening, making it impossible to obtain the desired intake air amount. 4. FIG. 4 is a graph showing the change characteristic of the intake air amount with respect to the duty ratio when the coil temperature or the battery voltage changes.

According to the current feedback circuit 31, the duty ratio given to the control signal S1 and the average current at that time always match, and even if the resistance value of the coil 6a changes, a desired intake air according to the duty ratio is obtained. The amount is obtained.

On the other hand, the voltage level determination circuit 32 outputs a high or low output according to the voltage level applied to the N terminal by CP.
Send to U21. More specifically, the voltage level determination circuit 3
2, the voltage VN of the N terminal is input to the inverting input terminal of the comparator 33, and the reference voltage VTH obtained by dividing the battery voltage by the resistors R2 and R3 is input to the non-inverting input terminal. If the resistance values of the resistors R2 and R3 are the same,
The reference voltage VTH becomes 1/2 of the battery power source + B. In such a case, if the voltage VN of the N terminal is smaller than the reference voltage VTH, the output of the comparator 33 (the voltage level determination circuit 32
Output becomes high, and the voltage VN of the N terminal becomes the reference voltage V
If it is equal to or higher than TH, the output of the comparator 33 becomes low.

Next, the failure detection process by the ECU 20 will be described with reference to FIGS. 5 is a flowchart showing a failure detection routine executed by the CPU 21, and this routine is executed in synchronization with the duty cycle of the ISC valve 6a (for example, if the duty frequency is 200 Hz, 5 ms). It is executed every time).
Further, FIG. 6 is a time chart showing movements of various signals related to the failure detection processing. In the figure, before time t1,
It is assumed that there is no failure (the ON failure of the transistor Tr1 or the ground short circuit of the N terminal) that makes it impossible to interrupt the energization by the first transistor Tr1, and the failure occurs at time t1.

The principle of failure detection in this embodiment will be described below with reference to the timing chart of FIG. FIG.
, The control signal S1 is turned on with 5 ms as one cycle.
The off state is repeated, and the first transistor Tr1 is turned on / off by the on signal or the off signal of the control signal S1. Before the time t1 indicating a normal time, the coil 6a is energized or deenergized by the on / off operation of the first transistor Tr1 associated with the control signal S1, and the output of the comparator 33 in the voltage level determination circuit 32 (hereinafter, comparator output). Is repeated high and low in synchronization with the control signal S1. In this case, the CPU 21 can detect the edge of the comparator output each time the failure detection routine is executed (every 5 ms), and this state is determined to be a normal state.

Also, at time t1, for example, the first transistor Tr1 has an ON failure (or the N terminal is ground shorted).
Then, after the time t1, the power supply to the coil 6a cannot be interrupted regardless of whether the control signal S1 is on or off, and the voltage VN of the N terminal is maintained at the low level. In this case, since the comparator output is always high, the CPU 21 cannot detect the edge of the comparator output, and this state is determined to be a failure. In the figure, the counter indicates the number of times the failure is determined. "XFAIL" is a failure flag that is set when the counter value reaches a predetermined value K for avoiding erroneous determination due to noise or the like, and the flag is set to "1" at time t2. As described above, the failure can be detected by determining the presence or absence of the edge of the comparator output (the output of the voltage level determination circuit 32).

Next, the failure detection routine of FIG.
Will be described according to various timings. Now, the routine of FIG. 5 is started, for example, in synchronization with the rising edge of the control signal S1, and the CPU 21 first determines in step 101 whether or not the failure flag XFAIL has already been set to "1". Then, if XFAIL = 0 (before time t2 in FIG. 6), the CPU 21 proceeds to step 102 and determines whether or not the value of the counter is equal to or more than a predetermined value K.

If counter <K and step 102 is negatively determined, the CPU 21 proceeds to step 103 to determine whether or not there is an edge of the comparator output between the previous processing and the current processing. If the determination in step 103 is affirmative (before time t1 in FIG. 6), the CPU 21
Advances to step 104, the counter value is cleared to "0", and this routine ends.

If the determination in step 103 is negative (after time t1 in FIG. 6), the CPU 21 determines in step 10
In step 5, the counter value is incremented by "1". Then, if the counter value ≧ K is determined (time t in FIG. 6).
2), the CPU 21 steps 102 to 106
Going to step S1, the failure flag XFAIL is set to "1".
In the subsequent process, step 101 is positively determined, and the CP
After the processing of step 101, U21 directly ends the routine.

On the other hand, the ECU 20 carries out the following fail-safe processing by using the failure information detected as described above. Hereinafter, a fail-safe routine executed by the CPU 21 in a cycle of 65 ms will be described with reference to FIG.

Now, when the routine of FIG. 7 starts,
First, in step 201, the CPU 21 determines whether or not the failure flag XFAIL set in the failure detection routine is "1". If XFAIL = 0, CPU2
In step 1, the routine proceeds to step 202, where the starting rotational speed of fuel cut (F / C) and the returning rotational speed of fuel injection are set to preset regular rotational speeds, and then this routine ends. More specifically, as shown in FIG. 8, fuel cut start rotation speed = 2200 rpm, fuel injection return rotation speed = 190.
0 rpm. That is, there is no change in the fuel cut area.

If XFAIL = 1, CPU2
1 executes steps 203 to 205. Specifically, C
In step 203, the PU 21 outputs the second transistor Tr.
The second control signal S2 is switched from the always-on signal to a predetermined duty signal. That is, when XFAIL = 1,
This means that the first transistor Tr1 has lost the control function in the shut-off direction. Therefore, if the second transistor Tr2 is always turned on as it is, the ISC valve 6 will be fully opened. Therefore, the second transistor Tr2 is switched to the duty control so that the idle speed can be controlled by the target idle speed.

Next, in step 204, the CPU 21 changes the fuel cut start rotation speed and the fuel injection return rotation speed to predetermined rotation speeds higher than the target idle rotation speed (for example, 750 rpm). More specifically, as shown in FIG. 8, the fuel cut start rotation speed is 1200 rpm, and the fuel injection return rotation speed is 1000 rpm. Finally, C
In step 205, the PU 21 turns on the failure warning light 30 to notify the driver of the failure.

The above operation is summarized as follows. When a failure that makes it impossible to cut off the energization by the first transistor Tr1 (ON failure of Tr1 or ground short of the N terminal) occurs, the second transistor Tr1
By the duty control of 2, the idle speed is controlled near the target idle speed. However, the fuel cut rotation speed is set at a rotation speed higher than the target idle rotation speed. At this time, the failure warning light 35 is turned on, and the driver stores the vehicle in the repair shop according to the warning.

When a failure on the side of the first transistor Tr1 and a failure on the side of the second transistor Tr2 (both of which have lost the function of shutting off the current) occur simultaneously, the coil 6a of the ISC valve 6 is always energized. It becomes a state. Therefore, the engine speed increases, but the fuel cut range is set slightly higher than the target idle speed, so that the increase of the idle speed is limited by the speed corresponding to the fuel cut range. At this time, the failure warning light 35 is turned on, and the driver stores the vehicle in the repair shop according to the warning.

When only the second transistor Tr2 has an ON failure by itself, since it is originally controlled to be always ON, the idle speed control is not affected at all. Therefore, the driver continues driving as it is, without performing such failure detection.

When the vehicle is put into a repair shop or the like according to the lighting of the failure warning light 30 described above, the failure location is specified by the following procedure. First, the fault code is identified using a diag checker. At this time, the failure flag XFAIL set by the failure detection routine determines that a failure has occurred on the first transistor Tr1 side. Further, the engine 1 is idled, and it is determined from the movement of the engine speed at that time whether or not a failure has occurred on the second transistor Tr2 side.

That is, when the first transistor Tr1 side fails, the idle speed is controlled by the drive duty of the second transistor Tr2 as described above. Therefore, if the energization function and the energization cutoff function by the second transistor Tr2 are normally maintained, the idle speed is almost the target idle speed (for example, about 750 rpm).
And stabilized. On the other hand, if a failure occurs that makes it impossible to cut off the current even in the second transistor Tr2 (Tr1,
Both Tr2 are out of order, the idle speed increases, and the speed is higher than the target idle speed (for example, about 1000 to
It fluctuates around 1200 rpm). Therefore, the presence or absence of a failure in the second transistor Tr2 can be easily specified by observing the above-described movement of the idle speed.

According to this embodiment described in detail above, the following effects can be obtained. That is, in this embodiment, the coil 6a for opening and closing the ISC valve 6 is provided in the middle of the electric path from the battery 30, and the first transistor Tr1 is connected to the ground side of the coil 6a as a switching element for normal control. In addition, the second transistor Tr2 was connected to the battery side of the coil 6a as a switching element for auxiliary control. And, normally, the first
Of the transistor T1 is controlled by controlling the average current flowing in the coil 6a.
When a failure of r1 (a failure that makes it impossible to cut off the energization) occurs, the second transistor Tr2 is switched from the normally-on state up to that point to the duty control to control the energization of the coil 6a. Further, when a failure occurs on the first transistor Tr1 side, the fuel cut region is reduced to a speed slightly higher than the target idle speed (fuel cut start speed: 2200 rpm → 1200).
rpm), the rise of the idle speed is regulated even if the coil 6a is always energized.

With the above configuration, the two transistors Tr
Even if a failure occurs in which the control system of 1 or Tr2 loses the function of shutting off the current, it is possible to prevent an excessive increase in engine speed contrary to the intention of the driver. In particular, in the present embodiment, by providing the above-described function of restricting the engine speed, it is possible to perform a complete fail-safe measure even when a double failure occurs in the transistors Tr1 and Tr2.

Further, in this embodiment, since the failure warning lamp 35 is turned on when the failure of the first transistor Tr1 is detected, the driver can be surely notified of the failure. In such a case, since the existing failure warning light 35 for warning the deterioration of the exhaust gas level warns the above-mentioned failure, a new warning device dedicated to the ISC failure becomes unnecessary, which can contribute to cost reduction.

Further, in this embodiment, the failure warning light 35
When performing a failure diagnosis in a repair shop, etc. according to the warning by, the failure information (failure flag XFAIL)
It is of course possible to specify that a failure has occurred on the transistor Tr1 side of the above, and it is also possible to specify whether or not there is a failure on the second transistor Tr2 side. With this configuration, it is possible to improve convenience during failure diagnosis.

Further, in this embodiment, the voltage level determination circuit 32 for detecting the presence or absence of a failure is provided only in one transistor Tr1 (transistor for normal control), and C
Regarding the arithmetic processing of the PU 21, the failure detection is performed only for the transistor Tr1. In this case, it is possible to suppress an excessive increase in the idle speed as described above and to identify a failure point, and further, it is possible to realize simplification of an electric circuit in the ECU 20 and a calculation process of the CPU 21 regarding the failure detection. . Specifically, the memory area and the development man-hours can be reduced by setting the failure flag. In addition, reducing the number of failure flags while maintaining the ability to specify a failure location facilitates failure diagnosis in a repair shop.

In the above structure, the second transistor Tr2 is operated by the control signal S2 which is always on.
The control signal S2 may be changed to a duty signal synchronized with the control signal S1 of the first transistor Tr1. In this case, when a failure occurs on the first transistor Tr1 side,
There is no change in the driving method of the second transistor Tr2, and the idle speed is controlled to the target speed according to the on / off state of the second transistor Tr2. Also in this configuration, the same operation and effect as those of the above-described embodiment can be obtained.

In the above description, the failure detection routine (FIG. 5)
Was executed in synchronism with the drive duty of the ISC valve 6, but this execution cycle can be arbitrarily changed.
The same applies to the execution cycle of the fail-safe routine (FIG. 7).

(Second Embodiment) Next, a second embodiment in which the failure detection method is changed will be described focusing on the differences from the first embodiment.

FIG. 9 is a circuit diagram showing the configuration of the ISC valve drive circuit 28 according to the second embodiment. In the ISC valve drive circuit 28, the first transistor Tr1 is duty-controlled and the second transistor Tr2 is always on (the same as in the first embodiment). An A / D converter 40 for detecting the current flowing through the resistance R1 as a voltage value is connected to both ends of the current detection resistance R1 provided between the first transistor Tr1 and the ground GND. The output voltage Vi of the A / D converter 40 is the CPU 21
Is input to the output voltage Vi and the resistance value R (Ω) of the current detection resistor R1 to detect the current flowing in the coil 6a of the ISC valve 6, that is, the current I (A) flowing in the current detection resistor R1 (I = Vi / R).

On the other hand, the drive duty (%) of the first transistor Tr1 and the current I (= Vi / R) have a proportional relationship as shown by the characteristic line L1 in FIG.
When the function of blocking the current by the transistor Tr1 is lost, the proportional relationship of FIG. 10 is broken. That is, when the first transistor Tr1 has an ON failure, an excessive current flows through the current detection resistor R1, and when the N terminal is ground-shorted, no current flows through the current detection resistor R1.

Therefore, in the present embodiment, a normal region having a predetermined width is set around the characteristic line L1 of FIG. 10, and it is determined whether the current I with respect to the drive duty at that time is in the normal region.
A failure determination is performed by the PU 21 making a determination. More specifically, a part of the failure detection routine of FIG. 6 is modified to detect a failure, and step 1 of FIG.
04 is changed to the judgment "Is the relationship between the drive duty and the current value I in the normal range in FIG. 10?" Then, when the process of the same step is negatively determined a predetermined number of times, the failure flag XFAIL is set.

With the above configuration, appropriate fault detection can be realized in this embodiment as well. Then, by performing the fail-safe process using the failure detection result, it is possible to suppress an excessive increase in the engine speed during idle operation in any case, and it is possible to achieve the object of the present invention.

(Third Embodiment) In the first and second embodiments, the first transistor Tr1 is the normal control transistor and the second transistor Tr2 is the auxiliary control transistor. And the second transistor Tr2 is used as a normal control transistor, and the first transistor Tr1 is used as an auxiliary control transistor. That is, during the normal control, the duty of the second transistor Tr2 is controlled, and the first transistor Tr2 is always turned on (control signal S2 = duty signal, control signal S1 = on signal). And CP
U21 detects a failure in the control system of the second transistor Tr2 that makes it impossible to cut off the energization. In addition, in the present embodiment, the configuration of FIG. 3 used in the first embodiment is used as it is as an electronic circuit in the ECU 20.

The fault detecting process in this embodiment is briefly described. In this process, both transistors Tr1 and Tr2 are turned off at the same time, and if the voltage level of the N terminal at that time is low (comparator output = high), the second process is performed. Transistor Tr2
If the function of shutting off electricity by means of normal is high and the voltage level of the N terminal is high (comparator output = low), it is judged that the function of shutting off electricity by the second transistor Tr2 is defective. Here, as described above, the second transistor Tr2
The failure to lose the function of shutting off the current due to ON refers to an ON failure of the second transistor Tr2 or a failure in which the P terminal is + B short-circuited, and in the case of such failure occurrence, the voltage V of the N terminal is
N is always at a high level and the comparator output becomes a low signal.

It should be noted that this failure detection processing is not executed during execution of the idle speed control, but is executed during high speed where the same control is not required. The failure detection routine will be described below with reference to the flowchart of FIG. The routine of FIG. 11 is performed, for example, in synchronization with the duty cycle of the ISC valve 6 (every 5 ms if the duty frequency is 200 Hz).

In FIG. 11, the CPU 21 first determines in step 301 whether the engine speed is in a predetermined high speed range (3000 rpm or more in this embodiment). If the engine speed is less than 3000 rpm, the CPU 21 proceeds to step 302, clears the failure detection end flag XEND, and ends this routine.

If the engine speed is 3000 rpm or more, the CPU 21 proceeds to step 303 and determines whether the failure detection end flag XEND is "0", that is, 3
It is determined whether or not the failure detection after 000 rpm or more has not been completed. If XEND = 1, it indicates that the failure detection has already been completed, so the CPU 21 ends this routine as it is. If XEND = 0,
In step 304, the CPU 21 increments the counter A for counting the time during the failure detection period by "1".

Thereafter, the CPU 21 determines in step 305 whether or not the failure detection period has reached the predetermined time, that is, whether or not the counter A is larger than the predetermined value K1. When the failure detection period has reached the predetermined time (counter A> K1), the CPU 21 considers that the failure detection is completed, and proceeds to step 306. In step 306, the CPU 21 sets the failure detection end flag XEND to "1", clears the counter A, and ends this routine.

If the failure detection period has not reached the predetermined time (counter A≤K1), the CPU 21 executes step 3
The failure detection processing is performed at 07-312. Specifically, C
In step 307, the PU 21 sets the transistors Tr1 and T1.
Both r2 are turned off, and the process proceeds to the next step 308. C
In step 308, the PU 21 determines whether the comparator output is high, that is, whether the voltage level of the N terminal is low. Then, if the determination in step 308 is negative, the CPU 21 determines that the function of cutting off the energization by the second transistor Tr2 is lost, and proceeds to step 309 to increment the failure duration time counter B by “1”. If step 308 is affirmatively determined, CP
U21 considers that the energization of the second transistor Tr2 is normally interrupted, and proceeds to step 310 to clear the failure duration time counter B.

After that, the CPU 21 determines in step 311 whether the failure duration time counter B has exceeded a predetermined time K2 (however, K2≤K1). When the counter B> K1, the CPU 21 proceeds to step 312, sets the failure flag XFAIL to "1", and ends this routine. When the counter B ≦ K1, the CPU 21 ends the present routine as it is.

In this embodiment, the transistors for normal control and the transistors for auxiliary control are configured in the opposite manner to the first and second embodiments, but in idle speed control the same as in each of the above embodiments. The action and effect of can be obtained.
In this case, the voltage level determination circuit 32 and the CPU 21 perform arithmetic processing to independently detect the failure of the normal control transistor (second transistor Tr2), and the auxiliary control transistor (first transistor Tr1 of FIG. 3) is detected. Prevented failure detection. Thereby, the simplification of the configuration can be realized also in this embodiment.

In the description of the third embodiment,
While the first transistor Tr1 is always turned on and the second transistor Tr2 is duty-controlled, the same effect can be obtained by changing both transistors to duty-controlled.

The present invention can be embodied in the following modes other than the above embodiment. (1) In the above-described first embodiment, the fuel cut region is changed to a rotational speed slightly higher than the target idle rotational speed as fail-safe processing (rotational speed restriction means) for limiting the increase in the idle rotational speed (FIG. 7). This step 204), the fail safe process may be changed. For example, a part of the cylinders of the engine 1 may be stopped at a predetermined engine speed or higher (for example, 1000 rpm or higher) to perform the reduced cylinder operation, thereby limiting the increase in the idle speed. Further, the fuel injection amount may be reduced and corrected at a predetermined engine speed or higher. In short, the rotation speed regulating means may be any one that can suppress an excessive increase in the idle rotation speed when the coil 6a is constantly energized and the ISC valve 6 is fully opened.

(2) In the third embodiment, the transistors Tr1 and Tr1 are operated at a high rotation speed when idle speed control is not required.
Although 2 is turned off and a failure in which the function of shutting off the current is lost is detected, this failure detection may be changed to be executed immediately after the ignition switch is turned on. In short, if idle speed control is not required, it may be arbitrarily executed.

(3) In each of the above embodiments, the two transistors Tr1 and Tr2 are used as the switching element for normal control and the switching element for auxiliary control.
This may be changed to a FET or thyristor.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing an engine control system according to an embodiment of the invention.

FIG. 2 is a block diagram showing an electrical configuration inside the ECU.

FIG. 3 is a circuit diagram showing a configuration of an ISC valve drive circuit.

FIG. 4 is a graph showing the relationship between the duty ratio and the intake air amount.

FIG. 5 is a flowchart showing a failure detection routine according to the first embodiment.

FIG. 6 is a time chart showing a failure detection operation.

FIG. 7 is a flowchart showing a fail-safe routine.

FIG. 8 is a time chart for explaining a fail-safe operation by changing the fuel cut area.

FIG. 9 is a circuit diagram showing a configuration of an ISC valve drive circuit according to a second embodiment.

FIG. 10 is a graph showing the relationship between drive duty and detected current.

FIG. 11 is a flowchart showing a failure detection routine according to the third embodiment.

[Explanation of symbols]

1 ... Engine, 6 ... ISC valve (idle speed control valve), 6a ... Coil, 21 ... Failure detection means, warning means,
CPU as rotation speed regulation means, fuel cut means, 30
... Battery, 35 ... Fault warning light, Tr1 ... First transistor as switching element for normal control, Tr2
... A second transistor as a switching element for auxiliary control.

Claims (4)

[Claims] 1. An idle speed control valve having a coil provided in an electric path from a battery, and adjusting an intake air amount at idle by an average current flowing through the coil, and connected to one terminal of the coil. The switching element for normal control, which is turned on / off at a duty ratio according to the target idle speed at that time, and the other terminal of the coil, are connected to at least the switching element to interrupt the energization of the coil. When it becomes possible, a switching element for auxiliary control that is turned on and off at a predetermined duty ratio, and a failure detection that detects a failure that makes it impossible to cut off power to the coil by the switching element for normal control Means, a warning means for warning that a failure has occurred when a failure is detected by the failure detection means, and a failure detected by the failure detection means, Idle speed control device for an engine is characterized in that a rotational speed restricting means for restricting the increase in the idle speed at standard higher than the idle rotational speed predetermined rotational speed. 2. A fuel cut means for stopping the fuel supply to the engine when the engine speed during idle operation reaches a predetermined fuel cut range, wherein the rotation speed regulation means sets a target idle speed in the fuel cut range. The engine idle speed control device according to claim 1, wherein the engine speed is reduced by a predetermined value higher than the engine speed. 3. The present invention is applied to a multi-cylinder engine, wherein the rotation speed regulating means, when the engine rotation speed during idle operation rises to a rotation speed higher than the target idle rotation speed by a predetermined value, The engine idle speed control device according to claim 1, wherein combustion of a predetermined cylinder is stopped among all the cylinders. 4. An engine control system provided with a warning light for warning deterioration of an exhaust gas level in advance, wherein the warning means turns on the warning light. The engine idle speed control device according to any one of 1 to 3.