JPH0884132A - Code division/multiplex communication equipment - Google Patents

Abstract

PURPOSE: To reduce the load of an upper layer protocol and to execute quick system control by transmitting and processing system control information such as an information transmission speed and address information by a modulation- demodulation circuit level. CONSTITUTION: When an information transmission speed is high, a transmitting station sends a signal PNO modulated by a symbol '1' e.g. to a preamble to be sent, and when the information transmission speed is low, sends the inverted signal of the signal PNO moduled by a symbol '-1' to the preamble. On the other hand, a receiving station discriminates the polarity of the preamble by a timing pulse generated when information transmission is started after establishing code synchronization. When the symbol of the preamble is '1', high information transmission speed is judged, and when the symbol is '-1', a low information transmission speed is judged. Clocks generated from a high speed clock generator 201 and a low speed clock generator 202 are switched by controlling a change-over switch 203 and an information signal clock is supplied to a parallel/serial converter 104.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronous code division multiplex communication device for increasing the information transmission speed by multiplexing a plurality of different spread codes having a small cross-correlation value in spread spectrum communication. It is a thing.

[0002]

2. Description of the Related Art In spread spectrum communication, a code division multiple communication system has been conceived in which a plurality of communication paths are multiplexed in the same band by utilizing a low cross-correlation characteristic of a spread code to increase an information transmission speed. There is. However, when it is difficult for the receiver to capture the code synchronization for the information-modulated multiplexed signal, only a single spreading code is sent as the preamble before the information transmission and the receiver transmits it. It is conceivable that the code synchronization is established and the synchronization is held by a hold circuit or the like during the information transmission period.

On the other hand, a spread spectrum communication system is used to establish a wireless local area network (wireless LAN).
In order to realize the above, a communication protocol similar to that used in the existing wired LAN is required for network management so that a plurality of stations share one communication path. In addition, slow down the information transmission speed in response to the influence of noise caused by the feature of using radio waves as a communication medium and the deterioration of the line quality due to the reduction of the power noise ratio of the received signal due to the propagation loss. It will also be necessary to prepare a protocol specific to wireless transmission such as the above.

[0004]

By the way, in general, the control of such a communication system often depends on an upper layer protocol for transmitting information. However, in code division multiplex communication, there are many processing steps in a demodulation circuit such as a correlation calculation between a received signal over one cycle of the spread code and a reference spread code, and parallel / serial conversion. Processing at a higher level causes a time overhead and hinders efficient network management.

According to the present invention, as described above, the system control information is not dependent on the upper layer protocol, but is transmitted and processed at the physical layer level by utilizing the characteristics of the code division multiplex communication to reduce the load of the upper layer protocol. An object of the present invention is to provide a code division multiplex communication device that reduces the number of times and enables quick system control.

[0006]

According to a first invention (claim 1) of the present application, system control information is held in a preamble transmitted prior to information transmission, and a second invention (claim 2). In (), a period for transmitting only system control information is provided between the preamble and the information transmission, and the system control signal is transmitted and processed in each modulation / demodulation circuit.

[0007]

First, a first embodiment corresponding to claim 1 will be described. Here, as the system control information, a means for switching the information transmission rate to a low speed will be taken as an example when the line quality is deteriorated due to interference due to noise or the like or propagation loss. Switching of the information transmission rate in code division multiplex communication can be realized by changing the number of multiplexing. In this case, in the receiver, the clock of the parallel / serial converter at the final stage of the demodulation circuit must be switched, but for that purpose, the information transmission rate must be known to the receiver. Therefore, in this embodiment, it is assumed that the preamble has clock switching information.

FIG. 1 is a block diagram showing the structure of the demodulation circuit in this embodiment. Further, FIG. 2 is a timing chart showing the operation of this embodiment.

Here, the number of code division multiplexes is n, the pseudo-random sequences used for spreading the information signal are PN1 to PNn, and the spreading code used for the preamble is PN.
Set to 0. Further, the present system enables switching of the information transmission speed in two steps, high speed and low speed.

First, in the transmitting station (not shown), when the information transmission rate is high, the signal PN0 modulated by the symbol "1" is transmitted with respect to the preamble to be transmitted, and when the information transmission rate is low, the preamble is transmitted. A signal PN0 _* (an inverted signal of PN0) modulated with the symbol "-1" is transmitted to

On the other hand, the receiving station demodulates the information signal by correlating the received signal with the pseudo-random sequences PN1 to PNn generated by the code generator 103 by the information signal correlator 101 shown in FIG. However, in addition to these information signal correlators 101, a preamble correlator 102 is provided, and the received signal and the preamble pseudo random sequence PN0 similarly generated from the code generator 103 are subjected to correlation calculation, The polarity of the preamble is determined by the timing pulse 1 generated when the code synchronization is established and the information transmission is started.

At this time, the preamble symbol is "1".
If it is, the information transmission speed is high, and if the symbol is "-1", it is judged to be low, and the changeover switch 203 is controlled to control the high-speed clock generator 2.
01 and the clock generated from the low-speed clock generator 202 are switched, and the information signal clock is supplied to the parallel-serial converter 104. This information signal clock is
It is useful to use not only the parallel-serial converter but also other parts of the communication device. Further, as the changeover switch 203, a mechanical relay, a semiconductor switch, a three-state gate, or the like can be used.

In this embodiment, the control of the information transmission rate is taken as an example, and the method in which the transmitting station transmits the system control information to the receiving station without interposing the upper layer protocol by using the preamble has been described.

Next, a second embodiment corresponding to claim 2 will be described. For example, when a large number of users share a single communication path such as a LAN, a unique address is set for each user, thereby managing packet call requests and connections on the network. At that time, the station that issues the packet generally arranges the addresses of the own station and the partner station together with the information signal in the packet frame and transmits the information signal. Is analyzed and the packet is analyzed to determine whether or not the packet is addressed to the own station. When the address is placed in the packet in this way, the system control signal is generated after the information is demodulated and analyzed as the upper layer protocol as described above, so that the load of the upper layer protocol is large and at the same time, Overhead is generated due to the time required for packet analysis from the information demodulation process.

In this embodiment, as the system control information,
The case of transmitting this destination address will be described as an example.

FIG. 3 is a block diagram showing the structure of the demodulation circuit in this embodiment. 4 is a timing chart showing the operation of this embodiment.

Here, the number of code division multiplexes is n, and the pseudo-random sequence used for spreading the information signal is PN1 to PNn. However, it is assumed that the multiplexing number n is a positive number of 8 or more, and each station of this system has an address of 8-bit length.

First, in a transmitting station (not shown), after transmitting a preamble and before transmitting information, PN1 to PN among n pseudo random sequences for a period of one cycle of the spreading code.
A multiplexed signal using only 8 of 8 is transmitted. that time,
These eight pseudo-random numbers are information-modulated in correspondence with the respective 8-bit address symbols of the partner station transmitting the packet.

On the other hand, the receiving station uses the information signal correlator 101 shown in FIG. 3 to generate received signals and the pseudo-random sequences PN1 to PN generated from the spread code generator 103.
The information signal is demodulated by performing the correlation calculation with n. When the control signal as described above is received, the system control information is output to the outputs corresponding to PN1 to PN8 among the n correlators 101. The address as is obtained in parallel. This output is latched by timing pulse 2,
By determining the address of the own station by the preset comparator 301, the receiving station can determine whether or not the received packet is addressed to the own station before the demodulation of the information signal starts.

Here, if the number n of multiplexed information signals is larger than 8, the system control signal, which is an 8-bit address as described above, can have a larger power per bit as compared with that at the time of information transmission. The reliability such as the error characteristic is relatively higher than that at the time of information transmission.

In the present embodiment, the address control is taken as an example, but other control information is not limited to 8 bits, but control information equivalent to the number of multiplexing can be transmitted from the transmitting station to the receiving station. Since the control signal is generated in parallel prior to the demodulation of the information signal, the delay is extremely small compared to the method of analyzing the protocol in the upper layer and controlling the system, and quick system control is possible.

[0022]

As described above, according to the present invention,
By utilizing the characteristics of code division multiplex communication, system control information such as information transmission speed and address information is transmitted and processed at the modulation / demodulation circuit level, reducing the load on the upper layer protocol and enabling quick system control. In particular, a great effect can be obtained particularly for improving the efficiency of network control of the wireless LAN system.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a timing chart showing the operation of the first embodiment.

FIG. 3 is a block diagram showing a second embodiment of the present invention.

FIG. 4 is a timing chart showing the operation of the second embodiment.

[Explanation of symbols]

 Reference numeral 101 ... Information signal correlator, 102 ... Preamble correlator, 103 ... Code generator, 104 ... Parallel-serial converter, 201 ... High-speed clock generator, 202 ... Low-speed clock generator, 203 ... Changeover switch

Claims (2)

[Claims] 1. A synchronous code division multiplex communication apparatus for multiplexing a communication path by using a plurality of different pseudo-random sequences as spreading codes to increase an information transmission speed, and synchronizing only for a certain period prior to transmission of multiplexed information. A spread spectrum signal with a single spread code for acquisition is sent as a preamble, and a modulation circuit for performing modulation on the preamble, demodulating information modulated in the preamble, and the demodulated information in a system A code division multiplex communication device, comprising: a demodulation circuit used as a control signal. 2. A synchronous code division multiplex communication apparatus for multiplexing a communication channel by using a plurality of different pseudo-random sequences as spreading codes to increase an information transmission speed, and synchronizing only for a certain period prior to transmission of multiplexed information. A spread spectrum signal with a single spread code is transmitted as a preamble for acquisition, and a system control signal is multiplexed for a period of one cycle of the spread code between the preamble transmission period and the multiplexed information transmission period. A code division multiplex communication device characterized by transmitting by a signal.