JPH0880049A - Dc power supply device - Google Patents

Dc power supply device

Info

Publication number
JPH0880049A
JPH0880049A JP20958594A JP20958594A JPH0880049A JP H0880049 A JPH0880049 A JP H0880049A JP 20958594 A JP20958594 A JP 20958594A JP 20958594 A JP20958594 A JP 20958594A JP H0880049 A JPH0880049 A JP H0880049A
Authority
JP
Japan
Prior art keywords
capacitor
load
rectifier circuit
power supply
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20958594A
Other languages
Japanese (ja)
Inventor
Yutaka Hosoya
裕 細谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP20958594A priority Critical patent/JPH0880049A/en
Publication of JPH0880049A publication Critical patent/JPH0880049A/en
Pending legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/30Reactive power compensation

Abstract

PURPOSE: To improve the power factor of a DC power supply device. CONSTITUTION: In the DC power supply device, a capacitor 5 discharges electricity for a period when an FET 1 is brought to an on state, and an output current IOUT1 . is made to flow through load 10 through a DC feeder circuit 8 from a rectifier circuit 7 for a period when the FET 1 is brought to an off state. When the rectified voltage VR of the rectifier circuit 7 exceeds the voltage VC1 of the capacitor 5, a charging current IC1 is made to flow through the capacitor 5 from the rectifier circuit 7. Since an input current IIN1 from an AC power supply 20 is represented by the sum of the output current IOUT1 to the load 10 of the rectifier circuit 7 and the charging current IC1 to the capacitor 5, a quiescent section is shortened and a peak value is formed in a low waveform in the input current IIN1 from the AC power supply 20, thus extremely improving the power factor.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は電源装置、特に力率を改
善して安定した直流出力を発生する直流電源装置に関す
るものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply device, and more particularly to a direct current power supply device for improving a power factor and generating a stable direct current output.

【0002】[0002]

【従来の技術】例えば図8に示すように、交流電源20
に接続した整流回路7の正側端子71と負側端子72と
の間にコンデンサ5を接続し、整流回路7の整流電圧を
コンデンサ5で平滑して負荷10に直流電力を供給する
コンデンサインプット型整流平滑回路を備えた直流電源
装置が従来から広く用いられている。
2. Description of the Related Art For example, as shown in FIG.
A capacitor input type in which a capacitor 5 is connected between the positive side terminal 71 and the negative side terminal 72 of the rectifier circuit 7 connected to the rectifier circuit 7, the rectified voltage of the rectifier circuit 7 is smoothed by the capacitor 5, and DC power is supplied to the load 10. A DC power supply device including a rectifying / smoothing circuit has been widely used.

【0003】[0003]

【発明が解決しようとする課題】ところで、従来の直流
電源装置では、負荷10への直流電圧の極端な変動を抑
制できる反面、力率が極めて低い欠点があった。即ち、
コンデンサ5が放電中は、整流回路7の整流電圧がコン
デンサ5の電圧よりも低いため、整流回路7からコンデ
ンサ5への充電電流は流れず、整流回路7から負荷10
への電流も流れない。一方、コンデンサ5の充電中は、
整流回路7からコンデンサ5へ充電電流が流れるととも
に、整流回路7から負荷10へ電流が流れる。このた
め、交流電源20からの入力電流は、整流回路7からコ
ンデンサ5へ充電電流を流している区間に限って流れ
る。したがって、交流電源20からの入力電流の波形は
休止区間が長くかつピーク値が高い波形となるので、力
率が非常に低かった。
By the way, in the conventional DC power supply device, although the extreme fluctuation of the DC voltage to the load 10 can be suppressed, there is a drawback that the power factor is extremely low. That is,
Since the rectified voltage of the rectifier circuit 7 is lower than the voltage of the capacitor 5 while the capacitor 5 is discharging, the charging current from the rectifier circuit 7 to the capacitor 5 does not flow and the rectifier circuit 7 loads the load 10
No current flows to. On the other hand, while the capacitor 5 is being charged,
A charging current flows from the rectifier circuit 7 to the capacitor 5, and a current flows from the rectifier circuit 7 to the load 10. Therefore, the input current from the AC power supply 20 flows only in the section where the charging current is flowing from the rectifying circuit 7 to the capacitor 5. Therefore, the waveform of the input current from the AC power source 20 has a long rest period and a high peak value, so that the power factor was extremely low.

【0004】そこで本発明の目的は、力率を改善し且つ
負荷に安定した直流出力を供給することのできる直流電
源装置を提供することにある。
Therefore, an object of the present invention is to provide a DC power supply device capable of improving the power factor and supplying a stable DC output to a load.

【0005】[0005]

【課題を解決するための手段】本発明による直流電源装
置は、交流電源に接続される整流回路と、該整流回路の
正側端子と負側端子との間に接続され且つ負荷の両端に
接続されたコンデンサとを備えている。この直流電源装
置では、前記整流回路と前記負荷とを直接接続する直流
供給回路と、前記整流回路と前記コンデンサとの間に接
続された整流素子と、前記コンデンサと前記負荷との間
に接続され、前記直流供給回路と前記コンデンサとの電
位差が所定のレベルになったときにオン状態となるスイ
ッチング素子とを備え、前記スイッチング素子がオン状
態のときに前記コンデンサから前記負荷に電力を供給
し、前記スイッチング素子がオフ状態のときに前記直流
供給回路から前記負荷に電力を供給する。前記整流素子
と直列に充電電流制御手段を接続してもよい。
A DC power supply device according to the present invention is connected between an AC power supply and a rectifying circuit, and is connected between a positive side terminal and a negative side terminal of the rectifying circuit and is connected to both ends of a load. It is equipped with a capacitor. In this DC power supply device, a DC supply circuit that directly connects the rectifier circuit and the load, a rectifying element connected between the rectifier circuit and the capacitor, and a rectifier element connected between the capacitor and the load. A switching element that is turned on when a potential difference between the DC supply circuit and the capacitor reaches a predetermined level, and supplies power from the capacitor to the load when the switching element is on. Electric power is supplied from the DC supply circuit to the load when the switching element is in the OFF state. A charging current control means may be connected in series with the rectifying element.

【0006】また、本発明による他の直流電源装置で
は、前記整流回路と前記負荷とを直接接続する直流供給
回路と、前記整流回路と前記コンデンサとの間に接続さ
れた整流素子と、前記コンデンサと前記負荷との間に接
続され、前記交流電源の電圧が所定のレベルになったと
きに出力を発生するレベル検出手段と、レベル検出手段
の出力によってオン状態となるスイッチング素子とを備
え、前記スイッチング素子がオン状態のときに前記コン
デンサから前記負荷に電力を供給し、前記スイッチング
素子がオフ状態のときに前記直流供給回路から前記負荷
に電力を供給する。前記整流素子と直列に充電電流制御
手段を接続してもよい。
Further, in another DC power supply device according to the present invention, a DC supply circuit for directly connecting the rectifier circuit and the load, a rectifying element connected between the rectifier circuit and the capacitor, and the capacitor And a load connected between the load and the load, the level detecting means generating an output when the voltage of the AC power supply reaches a predetermined level, and a switching element that is turned on by the output of the level detecting means, Power is supplied from the capacitor to the load when the switching element is in the on state, and power is supplied from the DC supply circuit to the load when the switching element is in the off state. A charging current control means may be connected in series with the rectifying element.

【0007】[0007]

【作用】整流回路の整流電圧がコンデンサの電圧を超え
且つスイッチング素子がオフ状態のとき、整流回路に接
続されたコンデンサが充電される。整流回路の直流出力
を負荷に直接供給する直流供給回路とコンデンサとの電
位差が所定のレベルになると、スイッチング素子がオン
状態となり、コンデンサに蓄積された電荷が負荷に放出
される。直流供給回路とコンデンサとの電位差が所定の
レベルを下回ると、スイッチング素子がオフ状態とな
り、コンデンサが負荷への放電を停止すると共に、整流
回路から直流供給回路を介して負荷へ電流が流れる。交
流電源からの入力電流は整流回路の負荷への出力電流と
コンデンサへの充電電流との和であるから、交流電源か
らの入力電流は休止区間が短くなり、力率が改善され
る。
When the rectified voltage of the rectifier circuit exceeds the voltage of the capacitor and the switching element is in the off state, the capacitor connected to the rectifier circuit is charged. When the potential difference between the DC supply circuit that directly supplies the DC output of the rectifier circuit to the load and the capacitor reaches a predetermined level, the switching element is turned on and the charge accumulated in the capacitor is discharged to the load. When the potential difference between the DC supply circuit and the capacitor falls below a predetermined level, the switching element is turned off, the capacitor stops discharging to the load, and a current flows from the rectifier circuit to the load via the DC supply circuit. Since the input current from the AC power supply is the sum of the output current to the load of the rectifier circuit and the charging current to the capacitor, the input current from the AC power supply has a shorter rest period and the power factor is improved.

【0008】更に、充電電流制御手段を設けた場合は、
整流回路からコンデンサへの充電電流が制限されて充電
電流のピーク値が低下するので、力率を更に向上するこ
とが可能である。本発明の他の実施例では、交流電源の
電圧にもとづいてスイッチング素子がオン・オフ状態と
なり、負荷に電力が供給される。
Further, when the charging current control means is provided,
Since the charging current from the rectifier circuit to the capacitor is limited and the peak value of the charging current is reduced, it is possible to further improve the power factor. In another embodiment of the present invention, the switching element is turned on / off based on the voltage of the AC power supply, and power is supplied to the load.

【0009】[0009]

【実施例】以下、本発明による直流電源装置の実施例を
図1〜図7について説明する。図1〜図5では図8に示
す箇所と同一の部分には同一の符号を付し、その説明を
省略する。本実施例の直流電源装置は、図1に示すよう
に、図8の回路に整流回路7の直流出力を負荷10に直
接供給する直流供給回路8を形成し、整流回路7とコン
デンサ5との間に整流素子として逆流阻止用ダイオード
6を接続する。また、コンデンサ5と負荷10との間に
スイッチング素子としてFET(電界効果トランジス
タ)1を接続すると共に、FET1のゲートとコンデン
サ5との間にゲート制御回路としてツェナダイオード4
を接続し、FET1と直列に逆流阻止用ダイオード12
を接続する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of a DC power supply device according to the present invention will be described below with reference to FIGS. 1 to 5, the same parts as those shown in FIG. 8 are designated by the same reference numerals, and the description thereof will be omitted. As shown in FIG. 1, in the DC power supply device of the present embodiment, a DC supply circuit 8 for directly supplying the DC output of the rectifier circuit 7 to the load 10 is formed in the circuit of FIG. A reverse current blocking diode 6 is connected between them as a rectifying element. Further, an FET (field effect transistor) 1 is connected as a switching element between the capacitor 5 and the load 10, and a Zener diode 4 is provided as a gate control circuit between the gate of the FET 1 and the capacitor 5.
And a reverse current blocking diode 12 connected in series with FET1.
Connect.

【0010】次に、図1の直流電源装置の動作を図6の
タイムチャートについて説明する。図6(a)は整流回
路7の整流電圧VRであり、この整流電圧VRが図6
(b)のコンデンサ5の電圧VC1を超えると、逆流阻止
用ダイオード6がオン状態となり、コンデンサ5の充電
が開始される。この充電は整流電圧VRが正弦半波のピ
ーク電圧に達するまで続き、図6(f)に示す充電電流
C1が流れる。その後、整流電圧VRが正弦半波に沿っ
て降下し、整流電圧VRとコンデンサ5の電圧VC1との
差が所定のレベルに達すると、ツェナダイオード4がオ
ン状態となり、FET1もオン状態となる。即ち、ツェ
ナダイオード4で設定された電圧を含むFET1の閾値
電圧をVTHとすると、整流電圧VRが図6(c)に示す
電圧VC1−VT Hを下回り、VC1−VRがVTHを超えるた
め、FET1がオン状態となる。その結果、コンデンサ
5が放電を開始し、コンデンサ5に蓄積された電荷が負
荷10に放出される。この時、図6(d)に示すよう
に、出力電圧VOUT1にはVC1−VTHが現われる。整流回
路7の整流電圧VRがコンデンサ5の電圧VC1よりも低
いために、整流回路7から直流供給回路8を介して負荷
10へ電流が供給されることはない。コンデンサ5に蓄
積された電荷が放電し、整流電圧VRとコンデンサ5の
電圧VC1との差が所定のレベルを下回ると、即ち、整流
回路7の整流電圧VRがVC1−VTHを超え、VC1−VR
THを下回るとツェナダイオード4がオフ状態となり、
FET1もオフ状態となり、コンデンサ5は負荷10へ
の放電を停止する。従って、これ以後、出力電圧VOUT1
には整流回路7の整流電圧VRがそのまま現われ、図6
(e)に示すように整流回路7から直流供給回路8を介
して負荷10へ電流IOUT1が流れる。この電流は、整流
回路7の整流電圧VRがVC1−VTHを下回りFET1が
オン状態となるまで継続して流れる。更に、整流回路7
の整流電圧VRがコンデンサ5の電圧VC1を上回ると、
逆流阻止用ダイオード6がオン状態となり、コンデンサ
5の充電が再び開始される。交流電源20からの入力電
流IIN1は整流回路7から直流供給回路8を介して負荷
10へ供給される電流IOUT1とコンデンサ5への充電電
流IC1との和であるから、交流電源20からの入力電流
IN1は図6(g)に示すように休止区間が短く且つピ
ーク値が低い電流波形を描き、力率が改善される。
Next, the operation of the DC power supply device of FIG. 1 will be described with reference to the time chart of FIG. 6 (a) is a rectified voltage V R of the rectifier circuit 7, the rectified voltage V R is 6
When the voltage V C1 of the capacitor 5 in (b) is exceeded, the backflow prevention diode 6 is turned on, and the charging of the capacitor 5 is started. This charging continues until the rectified voltage V R reaches the peak voltage of the half-sine wave, and the charging current I C1 shown in FIG. 6 (f) flows. After that, the rectified voltage V R drops along the half-sine wave, and when the difference between the rectified voltage V R and the voltage V C1 of the capacitor 5 reaches a predetermined level, the Zener diode 4 is turned on and the FET 1 is also turned on. Becomes That is, when the threshold voltage of the FET1 including a voltage set by the zener diode 4 and V TH, lower than the rectified voltage V R the voltage V C1 -V T H shown in FIG. 6 (c), is V C1 -V R Since it exceeds V TH , FET1 is turned on. As a result, the capacitor 5 starts discharging and the electric charge accumulated in the capacitor 5 is discharged to the load 10. At this time, as shown in FIG. 6D, V C1 −V TH appears in the output voltage V OUT1 . Since the rectified voltage V R of the rectifier circuit 7 is lower than the voltage V C1 of the capacitor 5, no current is supplied from the rectifier circuit 7 to the load 10 via the DC supply circuit 8. When the charge accumulated in the capacitor 5 is discharged and the difference between the rectified voltage V R and the voltage V C1 of the capacitor 5 falls below a predetermined level, that is, the rectified voltage V R of the rectifier circuit 7 becomes V C1 −V TH . When the voltage exceeds V C1 −V R below V TH , the Zener diode 4 is turned off,
The FET 1 is also turned off, and the capacitor 5 stops discharging the load 10. Therefore, after this, the output voltage V OUT1
Appeared rectified voltage V R of the rectifier circuit 7 is directly in, FIG. 6
As shown in (e), a current I OUT1 flows from the rectifier circuit 7 to the load 10 via the DC supply circuit 8. This current flows rectified voltage V R of the rectifier circuit 7 continues to V C1 -V TH until below FET1 is turned on. Furthermore, the rectifier circuit 7
When the rectified voltage V R of V exceeds the voltage V C1 of the capacitor 5,
The backflow prevention diode 6 is turned on, and the charging of the capacitor 5 is restarted. Since the input current I IN1 from the AC power supply 20 is the sum of the current I OUT1 supplied from the rectifier circuit 7 to the load 10 via the DC supply circuit 8 and the charging current I C1 to the capacitor 5, As shown in FIG. 6 (g), the input current I IN1 has a current waveform with a short rest period and a low peak value, and the power factor is improved.

【0011】図2は本発明による直流電源装置の第2の
実施例を示す。図2の回路は、図1の回路のFET1及
び逆流阻止用ダイオード12の代わりにサイリスタ2を
接続し、サイリスタ2のゲートとコンデンサ5との間に
ツェナダイオード4を接続すると共に、充電電流制御手
段としてのリアクトル21を逆流阻止用ダイオード6と
直列に接続する。リアクトル21は抵抗又は定電圧回路
に置換してもよい。その他の構成は図1の回路と同様で
ある。次に、図2の直流電源装置の動作を図7のタイム
チャートに基づいて説明する。図7(b)に示すコンデ
ンサ5の電圧をVC2、ツェナダイオード4で設定された
電圧を含むサイリスタ2のブレークオーバ電圧をVB
すると、図7(a)に示す整流回路7の整流電圧VR
図7(c)に示すVC2−VBを下回ると、VC2−VRがV
Bを超えツェナダイオード4がオン状態となり、サイリ
スタ2にゲート信号が付与される。このため、サイリス
タ2がオン状態となり、コンデンサ5が放電を開始す
る。この時、図7(d)に示すように出力電圧VOUT2
はコンデンサ5の電圧VC2がそのまま現われ、整流回路
7の整流電圧VRがコンデンサ5の電圧VC2よりも低い
ために、整流回路7から負荷10へ電流が供給されるこ
とはない。整流回路7の整流電圧VRがコンデンサ5の
電圧VC2に近づき、サイリスタ2に流れる電流がサイリ
スタ2の保持電流以下になると、サイリスタ2がオフ状
態となりコンデンサ5の放電は中断される。整流回路7
の整流電圧VRがコンデンサ5の電圧VC2を超えると、
逆流阻止用ダイオード6がオン状態となり、コンデンサ
5の充電が開始され、図7(f)に示すように整流回路
7からコンデンサ5へ充電電流IC2が流れる。この時、
出力電圧VOUT2には整流回路7の整流電圧VRがそのま
ま現われ、図7(e)に示すように整流回路7から直流
供給回路8を介して負荷10へ電流IOUT2が流れる。こ
の電流は、整流回路7の整流電圧VRがVC2−VBを下回
りサイリスタ2がオン状態となるまで継続して流れる。
整流回路7の整流電圧VRがコンデンサ5の電圧VC2
下回ると、逆流阻止用ダイオード6がオフ状態となり、
コンデンサ5の充電が終了する。図2に示す実施例でも
図1の場合と同様に、交流電源20からの入力電流IIN
2は、図7(g)に示すように休止区間が短くかつピー
ク値が低い電流波形となり、力率が非常に良くなる。図
2に示す実施例では、リアクトル21により整流回路7
からコンデンサ5への充電電流のピーク値が図7(g)
に示すように図1の実施例の場合(図6(g))に比較
して制限され、力率改善効果が大きい。
FIG. 2 shows a second embodiment of the DC power supply device according to the present invention. In the circuit of FIG. 2, a thyristor 2 is connected instead of the FET 1 and the reverse current blocking diode 12 of the circuit of FIG. 1, a zener diode 4 is connected between the gate of the thyristor 2 and the capacitor 5, and a charging current control means is provided. 21 is connected in series with the reverse current blocking diode 6. The reactor 21 may be replaced with a resistor or a constant voltage circuit. Other configurations are similar to those of the circuit of FIG. Next, the operation of the DC power supply device of FIG. 2 will be described based on the time chart of FIG. When the voltage of the capacitor 5 shown in FIG. 7B is V C2 and the breakover voltage of the thyristor 2 including the voltage set by the Zener diode 4 is V B , the rectified voltage of the rectifier circuit 7 shown in FIG. When V R falls below V C2 −V B shown in FIG. 7C, V C2 −V R becomes V
The Zener diode 4 is turned on beyond B and a gate signal is given to the thyristor 2. Therefore, the thyristor 2 is turned on and the capacitor 5 starts discharging. At this time, as shown in FIG. 7D, the voltage V C2 of the capacitor 5 appears as it is in the output voltage V OUT2, and the rectified voltage V R of the rectifier circuit 7 is lower than the voltage V C2 of the capacitor 5, so that the rectification is performed. No current is supplied from the circuit 7 to the load 10. When the rectified voltage V R of the rectifier circuit 7 approaches the voltage V C2 of the capacitor 5 and the current flowing through the thyristor 2 becomes less than the holding current of the thyristor 2, the thyristor 2 is turned off and the discharge of the capacitor 5 is interrupted. Rectifier circuit 7
When the rectified voltage V R of V exceeds the voltage V C2 of the capacitor 5,
The reverse current blocking diode 6 is turned on, charging of the capacitor 5 is started, and the charging current I C2 flows from the rectifier circuit 7 to the capacitor 5 as shown in FIG. This time,
The output voltage V OUT2 appears rectified voltage V R of the rectifier circuit 7 as it is, the current I OUT2 to the load 10 from the rectifying circuit 7 via the DC supply circuit 8 as shown in FIG. 7 (e) flows. This current continues to flow until the rectified voltage V R of the rectifier circuit 7 becomes lower than V C2- V B and the thyristor 2 is turned on.
When the rectified voltage V R of the rectifying circuit 7 becomes lower than the voltage V C2 of the capacitor 5, the reverse current blocking diode 6 is turned off,
Charging of the capacitor 5 is completed. In the embodiment shown in FIG. 2, as in the case of FIG. 1, the input current I IN from the AC power supply 20 is also changed.
For No. 2, the current waveform has a short rest period and a low peak value, as shown in FIG. 7 (g), and the power factor is very good. In the embodiment shown in FIG. 2, the rectifier circuit 7 is formed by the reactor 21.
Fig. 7 (g) shows the peak value of the charging current from the capacitor to the capacitor 5.
As shown in FIG. 6, the power factor improving effect is large compared to the case of the embodiment of FIG. 1 (FIG. 6 (g)).

【0012】図3に示す本発明の第3の実施例では、図
2に示すサイリスタ2、ツェナダイオード4、逆流阻止
用ダイオード6及びリアクトル21を整流回路7の負側
端子72側に接続した例を示す。第4図に示す本発明の
第4の実施例では、負荷10の負側端子とコンデンサ5
との間にFET1を接続し、コンデンサ5と整流回路7
の負側端子72との間に逆流阻止用ダイオード6を直列
に接続している。また、整流回路7の正側端子71とコ
ンデンサ5の負側端子との間にゲート制御回路としてF
ET1のバイアス用抵抗11とトランジスタ3とを直列
に接続すると共に、抵抗11とトランジスタ3のコレク
タとの接続点をFET1のゲートに接続する。更に、整
流回路7の負側端子72とコンデンサ5の負側端子との
間にツェナダイオード4と抵抗13とを直列に接続し、
ツェナダイオード4と抵抗13との接続点をトランジス
タ3のベースに接続している。この回路では、整流回路
7の整流電圧がコンデンサ5の電圧よりも高くなると、
逆流阻止用ダイオード6を介してコンデンサ5が充電さ
れると共に整流回路7から直流供給回路8を介して直接
負荷10に電流が供給される。このとき、ツェナダイオ
ード4及び抵抗13を通じて電流が流れるから、トラン
ジスタ3がオン状態となり、FET1がオフ状態とな
る。整流回路7の整流電圧がコンデンサ5に充電された
電圧レベルよりも低くなると、ツェナダイオード4及び
抵抗13を通じて電流が流れなくなるので、トランジス
タ3がオフ状態となり、FET1がオン状態となり、コ
ンデンサ5に蓄積された電荷が負荷10に放出される。
本発明の第5の実施例を示す図5では、負荷10の負側
端子とコンデンサ5の負側端子との間にダイオード12
とFET1とを直列に接続する。また、整流回路7の正
側端子71とコンデンサ5の負側端子との間にゲート制
御回路として抵抗11と、受光トランジスタ24と、抵
抗13とを直列に接続し、抵抗11と受光トランジスタ
34のコレクタとの接続点をFET1のゲートに接続す
る。また、トランジスタ3のコレクタをFET1のゲー
トに、ベースを受光トランジスタ24と抵抗13との接
続点に、エミッタをコンデンサ5の負側端子に接続す
る。更に、交流電源20の両端にそれぞれ接続した入力
電圧整流用ダイオード35と36の各カソードと整流回
路7の負側端子72との間に、交流電源電圧のレベル検
出手段となるツェナダイオード31、抵抗32及び受光
トランジスタ34とホトカプラを構成する発光ダイオー
ド33を直列に接続する。ツェナダイオード31は交流
電源20の電圧が所定のレベルを超えたときにオン状態
となり、ホトカプラを介してトランジスタ3をオン状態
にする。このため、FET1はオフ状態になる。交流電
源20の電圧が低下して、ツェナダイオード31がオフ
状態のときは、ホトカプラは作動せず、トランジスタ3
がオフ状態になる。このため、FET1はオン状態にな
り、コンデンサ5に蓄積された電荷が負荷10に放出さ
れる。
In the third embodiment of the present invention shown in FIG. 3, the thyristor 2, the Zener diode 4, the reverse current blocking diode 6 and the reactor 21 shown in FIG. 2 are connected to the negative terminal 72 side of the rectifier circuit 7. Indicates. In the fourth embodiment of the present invention shown in FIG. 4, the negative terminal of the load 10 and the capacitor 5 are
FET1 is connected between the capacitor 5 and the capacitor 5 and the rectifier circuit 7
The reverse current blocking diode 6 is connected in series with the negative side terminal 72 of the. Further, an F gate control circuit is provided between the positive terminal 71 of the rectifier circuit 7 and the negative terminal of the capacitor 5.
The bias resistor 11 of the ET1 and the transistor 3 are connected in series, and the connection point between the resistor 11 and the collector of the transistor 3 is connected to the gate of the FET1. Further, the Zener diode 4 and the resistor 13 are connected in series between the negative terminal 72 of the rectifier circuit 7 and the negative terminal of the capacitor 5,
The connection point between the Zener diode 4 and the resistor 13 is connected to the base of the transistor 3. In this circuit, when the rectified voltage of the rectifier circuit 7 becomes higher than the voltage of the capacitor 5,
The capacitor 5 is charged through the reverse current blocking diode 6 and current is directly supplied from the rectifier circuit 7 to the load 10 through the DC supply circuit 8. At this time, since a current flows through the Zener diode 4 and the resistor 13, the transistor 3 is turned on and the FET 1 is turned off. When the rectified voltage of the rectifier circuit 7 becomes lower than the voltage level charged in the capacitor 5, no current flows through the Zener diode 4 and the resistor 13, so that the transistor 3 is turned off, the FET 1 is turned on, and the charge is stored in the capacitor 5. The generated charge is discharged to the load 10.
In FIG. 5 showing the fifth embodiment of the present invention, a diode 12 is provided between the negative side terminal of the load 10 and the negative side terminal of the capacitor 5.
And FET1 are connected in series. Further, a resistor 11, a light receiving transistor 24, and a resistor 13 are connected in series as a gate control circuit between the positive side terminal 71 of the rectifier circuit 7 and the negative side terminal of the capacitor 5, and the resistor 11 and the light receiving transistor 34 are connected. The connection point with the collector is connected to the gate of FET1. Further, the collector of the transistor 3 is connected to the gate of the FET 1, the base is connected to the connection point between the light receiving transistor 24 and the resistor 13, and the emitter is connected to the negative terminal of the capacitor 5. Further, between each cathode of the input voltage rectifying diodes 35 and 36 connected to both ends of the AC power source 20 and the negative side terminal 72 of the rectifier circuit 7, a Zener diode 31 serving as a level detecting means of the AC power source, a resistor 32 and the light receiving transistor 34 and the light emitting diode 33 forming a photo coupler are connected in series. The Zener diode 31 is turned on when the voltage of the AC power supply 20 exceeds a predetermined level, and turns on the transistor 3 via the photocoupler. Therefore, the FET1 is turned off. When the voltage of the AC power supply 20 drops and the Zener diode 31 is in the OFF state, the photocoupler does not operate and the transistor 3
Turns off. Therefore, the FET 1 is turned on, and the charge accumulated in the capacitor 5 is discharged to the load 10.

【0013】[0013]

【発明の効果】本発明によれば、整流回路から整流電圧
をコンデンサを介さずに直接負荷に付与する回路と、整
流回路から整流電圧をコンデンサを介して負荷に付与す
る回路とを設け、整流回路の整流電圧がコンデンサ電圧
よりも高い期間にコンデンサを充電するとともに、負荷
に電力を供給するようにしたので、交流電源からの入力
電流の休止区間を短くすることができ、力率を改善して
電力を有効に使用することができる。また、負荷への安
定した直流電圧の付与が可能となり、電子機器を常に正
常に動作させることができる。
According to the present invention, a circuit for directly applying a rectified voltage from a rectifier circuit to a load without passing a capacitor and a circuit for applying a rectified voltage from the rectifier circuit to a load via a capacitor are provided, The capacitor is charged while the rectified voltage of the circuit is higher than the capacitor voltage, and the power is supplied to the load.Therefore, it is possible to shorten the pause period of the input current from the AC power supply and improve the power factor. Power can be used effectively. In addition, a stable DC voltage can be applied to the load, and the electronic device can always operate normally.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明による直流電源装置の第1の実施例を
示す電気回路図
FIG. 1 is an electric circuit diagram showing a first embodiment of a DC power supply device according to the present invention.

【図2】 本発明による直流電源装置の第2の実施例を
示す電気回路図
FIG. 2 is an electric circuit diagram showing a second embodiment of a DC power supply device according to the present invention.

【図3】 本発明による直流電源装置の第3の実施例を
示す電気回路図
FIG. 3 is an electric circuit diagram showing a third embodiment of the DC power supply device according to the present invention.

【図4】 本発明による直流電源装置の第4の実施例を
示す電気回路図
FIG. 4 is an electric circuit diagram showing a fourth embodiment of a DC power supply device according to the present invention.

【図5】 本発明による直流電源装置の第5の実施例を
示す電気回路図
FIG. 5 is an electric circuit diagram showing a DC power supply device according to a fifth embodiment of the present invention.

【図6】 図1の回路の各部の電圧及び電流を示すタイ
ムチャート
6 is a time chart showing the voltage and current of each part of the circuit of FIG.

【図7】 図2の回路の各部の電圧及び電流を示すタイ
ムチャート
7 is a time chart showing the voltage and current of each part of the circuit of FIG.

【図8】 従来の直流電源装置を示す電気回路図FIG. 8 is an electric circuit diagram showing a conventional DC power supply device.

【符号の説明】[Explanation of symbols]

1・・・FET、2・・・サイリスタ、4・・・ツェナ
ダイオード、5・・・コンデンサ、6、12・・・逆流
阻止用ダイオード、7・・・整流回路、8・・・直流供
給回路、10・・・負荷、20・・・交流電源、21・
・・リアクトル(充電電流制御手段)、71・・・正側
端子、72・・・負側端子
1 ... FET, 2 ... Thyristor, 4 ... Zener diode, 5 ... Capacitor, 6, 12 ... Reverse current blocking diode, 7 ... Rectifier circuit, 8 ... DC supply circuit 10 ... load, 20 ... AC power supply, 21 ...
..Reactor (charging current control means), 71 ... Positive side terminal, 72 ... Negative side terminal

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 交流電源に接続される整流回路と、該整
流回路の正側端子と負側端子との間に接続され且つ負荷
の両端に接続されたコンデンサとを備えた直流電源装置
において、 前記整流回路と前記負荷とを直接接続する直流供給回路
と、 前記整流回路と前記コンデンサとの間に接続された整流
素子と、 前記コンデンサと前記負荷との間に接続され、前記直流
供給回路と前記コンデンサとの電位差が所定のレベルに
なったときにオン状態となるスイッチング素子とを備
え、 前記スイッチング素子がオン状態のときに前記コンデン
サから前記負荷に電力を供給し、前記スイッチング素子
がオフ状態のときに前記直流供給回路から前記負荷に電
力を供給することを特徴とする直流電源装置。
1. A DC power supply device comprising: a rectifier circuit connected to an AC power supply; and a capacitor connected between a positive terminal and a negative terminal of the rectifier circuit and connected to both ends of a load. A direct current supply circuit that directly connects the rectifier circuit and the load; a rectifying element that is connected between the rectifier circuit and the capacitor; a direct current supply circuit that is connected between the capacitor and the load; A switching element that is turned on when the potential difference between the capacitor and the capacitor reaches a predetermined level, and supplies power from the capacitor to the load when the switching element is on, and the switching element is off. A DC power supply device, which supplies power from the DC supply circuit to the load at the time.
【請求項2】 前記整流素子と直列に充電電流制御手段
を接続した「請求項1」に記載の直流電源装置。
2. The DC power supply device according to claim 1, wherein a charging current control means is connected in series with the rectifying element.
【請求項3】 交流電源に接続される整流回路と、該整
流回路の正側端子と負側端子との間に接続され且つ負荷
の両端に接続されたコンデンサとを備えた直流電源装置
において、 前記整流回路と前記負荷とを直接接続する直流供給回路
と、 前記整流回路と前記コンデンサとの間に接続された整流
素子と、 前記コンデンサと前記負荷との間に接続され、前記交流
電源の電圧が所定のレベルになったときに出力を発生す
るレベル検出手段と、 レベル検出手段の出力によってオン状態となるスイッチ
ング素子とを備え、 前記スイッチング素子がオン状態のときに前記コンデン
サから前記負荷に電力を供給し、前記スイッチング素子
がオフ状態のときに前記直流供給回路から前記負荷に電
力を供給することを特徴とする直流電源装置。
3. A DC power supply device comprising: a rectifier circuit connected to an AC power source; and a capacitor connected between a positive side terminal and a negative side terminal of the rectifier circuit and connected to both ends of a load. A DC supply circuit that directly connects the rectifier circuit and the load, a rectifying element that is connected between the rectifier circuit and the capacitor, and a voltage of the AC power supply that is connected between the capacitor and the load. Is provided with a level detection means for generating an output when the level reaches a predetermined level, and a switching element that is turned on by the output of the level detection means, and when the switching element is in the on state, power is supplied from the capacitor to the load. And a DC power supply device that supplies power to the load from the DC supply circuit when the switching element is in an off state.
【請求項4】 前記整流素子と直列に充電電流制御手段
を接続した「請求項3」に記載の直流電源装置。
4. The DC power supply device according to claim 3, wherein a charging current control means is connected in series with the rectifying element.
JP20958594A 1994-09-02 1994-09-02 Dc power supply device Pending JPH0880049A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20958594A JPH0880049A (en) 1994-09-02 1994-09-02 Dc power supply device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20958594A JPH0880049A (en) 1994-09-02 1994-09-02 Dc power supply device

Publications (1)

Publication Number Publication Date
JPH0880049A true JPH0880049A (en) 1996-03-22

Family

ID=16575277

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20958594A Pending JPH0880049A (en) 1994-09-02 1994-09-02 Dc power supply device

Country Status (1)

Country Link
JP (1) JPH0880049A (en)

Similar Documents

Publication Publication Date Title
US7120036B2 (en) Switching-mode power supply having a synchronous rectifier
JPH09163736A (en) Dc-dc converter
JP3369134B2 (en) DC-DC converter
JP3871345B2 (en) Power circuit
JPH0880049A (en) Dc power supply device
JP3419134B2 (en) Self-excited converter
US6469567B1 (en) Power supply circuit and method
JP3000937B2 (en) Switching power supply
EP0824781B1 (en) Power-supply circuit
WO2002065225A2 (en) Switching power supply
KR930005928Y1 (en) Switching transistor base occurance circuit
JP4395880B2 (en) Synchronous rectifier circuit for switching power supply
JP3641351B2 (en) Ringing choke converter
JP4237283B2 (en) Switching power supply
JP2008253032A (en) Switching power supply
JPH09308231A (en) Switching power supply
JP2002281749A (en) Switching power supply device
JPH09182425A (en) Dc-dc converter
JPH06189545A (en) Switching power supply
JP3651637B2 (en) DC / DC converter device
KR0140018Y1 (en) Battery charging circuit
JPH01103156A (en) Switching power supply
JP3419343B2 (en) DC-DC converter
JP2532203Y2 (en) Switching power supply
JPH0816264A (en) Dc power supply device