JPH0879316A - Optical input interruption detection circuit - Google Patents

Abstract

PURPOSE: To prevent effect of a fault onto circuits arranged at a post-stage by detecting optical input interruption of a coded optical signal early. CONSTITUTION: An optical signal 11 subjected to CMI coding is converted into an electric signal by a light receiving element 12 and amplified equivalently by an equivalent amplifier circuit 13. Then the signal is identified and recovered by an identification recovery circuit 15 in a timing of a clock extracted by a clock extraction circuit 14. A recovered electric CMI signal 16 is compared with a reference clock pulse 42 by an optical input interruption detection circuit 41 before being converted into an NRZ signal 19 by a decoding circuit 18. Through the comparison, it is detected that the electric CMI signal is unchanged for a prescribed time and when the signal is unchanged for a prescribed time, it is discriminated that optical input interruption is caused when the signal is unchanged for a prescribed time to provide an output of an alarm 43. Since the change in the electric CMI signal is directly monitored, the optical input interruption is detected early.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical input disconnection detection circuit for detecting an optical input disconnection, and more particularly to an optical input disconnection detection circuit for detecting an optical input disconnection using encoded received data. .

[0002]

2. Description of the Related Art In optical communication using a digital transmission system,
Generally, the transmitting side converts data into an optical signal together with a clock signal for synchronization and transmits the optical signal. In this case, the receiving side extracts the clock signal based on the received signal and reproduces the transmitted data in synchronization with the clock signal.

As described above, since the clock signal is used for reproducing data, it is necessary to stably extract it.
Therefore, in order to easily extract the clock signal for synchronization on the receiver side, encoding processing is performed before and after data transmission. That is, the data transmission side performs an encoding process for processing data so that different codes are included at regular intervals, and the receiver side extracts a clock signal from the encoded signal. As a result, even if the information of the same code is originally continuous, the receiver can extract the clock signal for synchronization and ensure normal communication.

From the viewpoint of ensuring normal communication,
It is important to restore communication early when a failure occurs. Above all, when a failure of the optical input occurs, all signal processing devices downstream from the point where the failure occurs will be inoperable, so the occurrence of the failure will be immediately detected and the line switched early. It is necessary to perform the restoration process of. Therefore, each light receiving unit is provided with a light input break detection circuit that detects breaks in the light input.

The optical input break detection circuit normally detects the break of the optical input by monitoring the amplitude of the clock signal extracted by the optical receiver. However, if the gain of the amplification performed before the extraction of the clock signal is large, the amplitude of the clock signal may not decrease even if the optical input is interrupted. In such a case, the disconnection of the optical input cannot be detected. Therefore, it is proposed in Japanese Patent Laid-Open No. 3-40538 to detect the disconnection of the optical input from the data signal itself regardless of the extracted clock signal.

FIG. 9 shows a configuration of an optical receiving circuit having an optical input break detecting circuit described in this publication. The optical signal 11 transmitted through the transmission line is the light receiving element 1
It is designed to be input to 2. Equivalent amplification circuit 13
Amplifies the detection output of the light receiving element 12 to a level suitable for the subsequent processing. The output of the equivalent amplification circuit 13 is input to the clock extraction circuit 14 and the identification reproduction circuit 15. The clock extraction circuit 14 extracts the transmission path clock from the output signal of the equivalent amplification circuit 13. The identification reproduction circuit 15 identifies and reproduces a pulse from the output signal of the equivalent amplification circuit 13 according to the output clock of the clock extraction circuit 14. The discrimination circuit 15 outputs a data signal 16 and a clock signal 17. These signals are input to the decoding circuit 18. The decoding circuit 18 is adapted to convert the encoded data signal 18 into an NRZ (Non Return to Zero) signal 19 which can be easily processed by various circuits in a subsequent circuit.

The detection of the disconnection of the optical signal is detected by the identification and reproduction circuit 15
The data signal 16 output from Data signal 16
Is also input to the average voltage calculation circuit 31 that calculates the average voltage of the data signal. The calculation result 32 of the average voltage calculation circuit 31 is input to the comparator 33. The comparator 33 compares the calculation result 32 with a predetermined reference potential 34 and outputs a comparison result 35. When the calculation result 32 is smaller than the reference voltage, a signal indicating an alarm is output as if the optical input is interrupted.

In such an optical receiving circuit, the light receiving element 12
The digital optical signal 11 input to is converted into an electric signal. The equivalent amplifier circuit 13 equivalently amplifies this electric signal to obtain a digital signal corresponding to the digital optical signal 11. The digital signal output from the equivalent amplification circuit 13 is input to the clock extraction circuit 14 and the transmission path clock signal is extracted. The identification / reproduction circuit 15 identifies the digital signal in synchronization with the transmission path clock signal. That is, the level of the signal level is discriminated to identify the pulse, and the reproduced data signal 16 is output. As a result, a reproduced signal with an improved signal-to-noise ratio can be obtained.

The identification-reproduced data signal 16 is input to the average potential calculation circuit 31. Average potential calculation circuit 3
In 1, the output level of the reproduction data signal is integrated by the integrator for a predetermined time, and the time-averaged output level is calculated. The comparator 33 compares the calculation result with the reference potential 34. If the average potential 32 is less than the reference potential 34, the comparator 33 outputs a signal representing an alarm signal.

[0010]

In the proposed optical input disconnection detection circuit, the average potential of the data signal output from the identification reproduction circuit is calculated and compared with the reference potential. It is judged that the optical signal input has been cut off. Therefore, there is a problem that processing time for calculating the average potential is required, followability at the time of occurrence of signal interruption is poor, and detection takes time.

Further, when the transmitted signal has a low mark rate or the mark rate fluctuates, it is difficult to set the reference voltage and it is easy to erroneously determine that the optical signal is interrupted.

Therefore, an object of the present invention is to encode a binary data signal composed of "0" and "1" so that "0" or "1" does not continue for a predetermined number or more and transmit an optical signal. In this case, it is an object of the present invention to provide an optical input break detection circuit that can speed up the detection of a break in the optical input signal.

[0013]

According to a first aspect of the present invention, (a) a binary data signal consisting of "0" and "1" is not consecutive "0" or "1" for a certain number or more. An opto-electric conversion means for converting an optical signal encoded and transmitted as described above into an electric signal; and (b) a reproducing means for reproducing an encoded data signal from the electric signal converted by the opto-electric conversion means, C) Reference clock pulse output means for outputting a reference clock pulse of a predetermined constant period,
(D) Data encoded while the reference clock pulse output from the reference clock pulse output means and the encoded data signal reproduced by the reproducing means are input and a predetermined number of reference clock pulses are input. Signal "1"
A first data signal detecting means for detecting the presence / absence of the input of a signal representing the sign of, and (e) a reference clock pulse output from the reference clock pulse output means and an encoded data signal reproduced by the reproducing means. Second data signal detecting means for detecting the presence or absence of the input of a signal representing the code of "0" of the encoded data signal while a predetermined number of reference clock pulses are input. The optical input break detection circuit is provided with at least one of the first and second data signal detection means and an optical input break detection means for detecting a break in the optical input when a corresponding data signal is not detected.

That is, according to the first aspect of the present invention, whether or not a signal representing each code of the coded data signal is input until a predetermined number of reference clock pulses are input. A data signal detecting means for detecting is provided. As a result, since the change in the data signal is directly monitored, it is possible to detect the interruption of the optical input immediately after a certain period of time, regardless of the level of the signal level at the moment of the interruption of the optical input.

According to the second aspect of the invention, (a) a binary data signal consisting of "0" and "1" is encoded and transmitted so that "0" or "1" does not continue for a fixed number or more. Photoelectric conversion means for converting the optical signal thus converted into an electric signal,
(B) reproducing means for reproducing an encoded data signal from the electric signal converted by the photoelectric conversion means, and (c)
Change point pulse output means for detecting a change point of rising or falling of the encoded data signal and outputting a pulse, and (d) reference clock pulse output means for outputting a reference clock pulse of a predetermined constant period. When,
(E) Whether or not the change point pulse is input while the reference clock pulse output from the reference clock pulse output means and the pulse output from the change point pulse output means are input and a predetermined number of reference clock pulses are input And a light input break detection circuit for detecting a break in the light input when the change point is not detected by the change point pulse detection means. .

That is, according to the second aspect of the invention, a change point such as a rising edge or a falling edge of the encoded data signal is detected. It is monitored whether or not this change point is detected until a predetermined number of reference clock pulses are input. Therefore, the interruption of the optical input can be detected immediately after the elapse of a certain time regardless of the level of the signal level at the moment of the interruption of the optical input.

According to the third aspect of the invention, (a) a binary data signal composed of "0" and "1" is encoded and transmitted so that "0" or "1" does not continue for a predetermined number or more. Photoelectric conversion means for converting the received optical signal into an electric signal, and (b) reproduction means for reproducing an encoded data signal from the electric signal converted by the photoelectric conversion means,
(C) Reference clock pulse output means for outputting a reference clock pulse having a predetermined constant period, (d) counting means for counting each time the reference clock pulse is output from the reference clock output means, and (e) counting. Initialization means for initializing the count value of the means at the rising time or the falling time of the encoded data signal reproduced by the reproducing means; and (f) the change point of the value counted by the counting means and the code data signal. Comparing means for comparing with a predetermined value larger than the number of reference clock pulses that can be counted during, and (g) the comparing means makes the count value of the counting means larger than the predetermined value. The light input break detection circuit is provided with a light input break detection means for detecting a break in the light input.

That is, according to the third aspect of the invention, the counting means counts the reference clock pulses. The count value is initialized every time the data signal rises or falls. The count value is monitored to detect when it becomes larger than a predetermined value, and the optical signal input disconnection signal is output. Therefore, since the abnormal output of the data signal is directly monitored, the interruption of the optical input can be immediately detected.

According to the invention described in claim 4, (a) a binary data signal consisting of "0" and "1" is encoded and transmitted so that "0" or "1" does not continue for a predetermined number or more. An opto-electric conversion means for converting the received optical signal into an electric signal, and (b) a reproduction circuit for reproducing an encoded data signal from the electric signal converted by the opto-electric conversion means,
(C) A reference clock pulse output circuit that outputs a reference clock pulse of a predetermined constant cycle, (d) a counter that subtracts the count value each time the reference clock pulse is output from the reference clock output means, and (e. ) A predetermined value that is greater than the number of reference clock pulses that can count the count value of the counter during the change point of the code data signal at the rising time or the falling time of the code data signal reproduced by the reproducing means. The optical input interruption detecting circuit is provided with an initialization means for initializing the optical input interruption, and (f) an optical input interruption detecting means for detecting an interruption of the optical input when the count value of the counter becomes "0".

That is, according to the invention of claim 4, the counter subtracts the count value each time the reference clock pulse arrives. Each time the data signal rises or falls, the count value is initialized to a predetermined value.
When the count value becomes "0", the optical signal input disconnection signal is output. Therefore, since the abnormal output of the data signal is directly monitored, the detection of the optical input disconnection is accelerated.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to embodiments.

FIG. 1 shows an optical receiving circuit including an optical input disconnection detecting circuit according to an embodiment of the present invention. Figure 9
The same components as those of the above are denoted by the same reference numerals, and the description thereof will be appropriately omitted. The input optical signal 11 is a CMI-coded digital optical signal. Here, the CMI code is a sequence of alternating "11" and "00" when the information is "1" and "10" when the information is "0".
The optical signal 11 passes through the equivalent amplification circuit 13 and the identification and reproduction circuit 1
5 and is reproduced as an electric CMI signal 16.
An optical input break detection circuit 41 for detecting a break in the optical input receives the electric CMI signal 16 before being decoded, and the other input terminal receives the reference clock signal 42. Is entered. The reference clock signal 42 has a specific cycle. This is adjusted and input from a post-stage circuit (not shown). The optical input break detection circuit 41 outputs a signal 43 that becomes high level or low level. When the disconnection of optical input is detected,
This signal 43 becomes high level.

FIG. 2 specifically shows a main part of the light input break detection circuit of this embodiment. Light input break detection circuit 4
1 includes first to third flip-flop circuits 51 to 53 and fourth to sixth flip-flop circuits 54 to 56. The electric CMI signal 16 output from the identification reproduction circuit 15 of FIG. 1 is the first to third flip-flop circuits 5
Input is made to the reset terminals 1 to 53.
The polarity of the electric CMI signal 16 is inverted by the inverter 57 and input to the reset terminals of the fourth to sixth flip-flop circuits 54 to 56. The reference clock signal 42 is the first to sixth flip-flop circuits 51.
To 56 clock terminals. First
A signal 58 that is at a logical high level is input to the data terminals of the fourth flip-flop circuits 51 and 54. The output terminals of the third and sixth flip-flop circuits 53 and 56, which respectively form the final stage, are 2-input OR circuits 5.
9 are connected to corresponding input terminals. Therefore,
When one of these output terminals goes high, signal 4
3 becomes high level and is transferred to the circuit arranged in the subsequent stage.

First, the operation when a normal electric CMI signal is input to the optical input break detection circuit having such a configuration will be described.

FIG. 3 shows a waveform input to the optical input break detection circuit when the electrical CMI signal is normally identified and reproduced. The waveform of the CMI-coded signal for the data string to be transmitted in FIG. 6A is as shown in FIG. The electric CMI signal 16 having such a waveform
(B) in the figure shows the first to third flip-flop circuits 51.
It is input to the reset terminal of ~ 53. The fourth to sixth flip-flop circuits 54 to 56 have electric C with inverted polarities.
The MI signal 16 is input. First to third flip-flop circuits 51 to which the electric CMI signal 16 is directly input
In ~ 53, while the electric CMI signal 16 is at the high level, the potentials on the output terminal side are reset.
The period twice as long as the repetition period of the reference clock signal 42 (c in the same figure) is set to be longer than the maximum time during which the same level state of the CMI signal can continue. Therefore, when the reference clock pulse arrives twice, a high-level signal passes through the first and second flip-flop circuits 51 and 52 and the potential between the second and third flip-flop circuits becomes high level. Even if it becomes, the high level signal of the electric CMI signal is always input before the arrival of the next reference clock pulse, so that it is reset. Therefore, the high level signal is not output from the output terminal of the third flip-flop circuit 53.

The same holds true in the fourth to sixth flip-flop circuits in which the polarity of the electric CMI signal 16 is inverted and input. Therefore, the OR circuit 5
The output signal of 9 never goes high.

Next, the operation when the light input is cut off will be described.

FIG. 4 shows an example of a waveform input to the optical input disconnection detection circuit when the optical input is disconnected. If the optical input is cut off at time T ₁₁ , the electrical CMI
The signal 16 does not change as shown in FIG. At time T ₁₂ , the high-level potential 58 input to the input terminal of the first flip-flop circuit 51 is output from the output terminal. Thereafter, each time the reference clock signal rises at times T ₁₃ and T ₁₄ , this high-level potential is transferred to the flip-flop circuits 52 and 53 in the subsequent stage, and the output of the third flip-flop circuit 53 becomes high level. . On the other hand, in the fourth to sixth flip-flop circuits, since the polarity of the electric CMI signal is inverted, after the time T ₁₂ , all the flip-flop circuits are reset, and the sixth flip-flop circuit 56 The output remains low. In the OR circuit 59, since the output signal from the third flip-flop circuit becomes high level, the OR circuit 59
The output signal of also becomes a high level and becomes an alarm signal indicating an input disconnection.

FIG. 5 shows a waveform input to the optical input disconnection detection circuit when the electrical CMI signal is disconnected at the high level when the optical input is disconnected. When the electrical CMI signal 16 at time T ₂₁ will remain interruption of the high level, the first to third will work flip-flop circuit hereinafter always reset at 51 to 53, despite the signal interruption, the third flip-flop The output terminal of the circuit 53 does not output a high level signal indicating signal disconnection. On the other hand, the fourth to sixth flip-flop circuits 5 to which a signal obtained by inverting the polarity of the electric CMI signal is input.
Contrary to the case of FIG. 4, in 4 to 56, there is no reset and the output signal of the sixth flip-flop circuit 56 becomes high level. This high-level signal is transferred as the alarm signal 43 via the OR circuit 59.

As described above, in this embodiment, since the change in the amplitude of the electric CMI signal is directly monitored, it is possible to detect the interruption of the optical input regardless of the polarity of the interruption of the signal.

Second embodiment

FIG. 6 shows the configuration of a light input break detection circuit according to another embodiment of the present invention. Instead of the fourth to sixth flip-flop circuits shown in FIG.
And the eighth flip-flop circuits 61 and 62 are prepared. These are connected in cascade. The electric CMI signal 16 is input to the input terminal of the seventh flip-flop circuit 61. A clock 63 having a cycle shorter than one half of the minimum pulse width of the electric CMI signal is input to the clock terminals of the seventh and eighth flip-flop circuits. This clock 63 is also supplied from the subsequent stage circuit in the same manner as the reference clock 42. The output of the seventh flip-flop circuit 61 and the inverted output of the eighth flip-flop circuit 62 are input to the AND circuit 64. AND circuit 6
The output signal 65 of No. 4 is input to the first to third flip-flop circuits 51 to 53.

FIG. 7 shows a signal waveform input to the optical input break detection circuit having such a configuration. Electric CMI signal 16 input to seventh flip-flop circuit 61
(A in the figure) is guided to the output side by the pulse signal 63 having a short cycle. This signal becomes the 8th signal by the arrival of the next pulse.
The polarity is inverted and output from the inverting output terminal of the flip-flop circuit 62. This inverted output signal 66 is the second
The signal input to the flip-flop circuit 62 is delayed by a period corresponding to the short period pulse. for that reason,
A pulse signal 65 corresponding to the rising time of the electric CMI signal 16 is output from the AND circuit 64 to which both are input. Therefore, even if the electrical CMI signal is disconnected in the high level state at time T ₃₁ , the signal disconnection can be detected by only the first to third three flip-flop circuits 51 to 53 as in the previous embodiment. .

Third embodiment

FIG. 8 shows the configuration of an optical input break detection circuit according to the third embodiment of the present invention. This optical input break detection circuit includes a counter 71 that counts reference clock pulses. The electric CMI signal 16 is input to the counter 71 as a load signal,
At the time of rising of the electrical CMI signal 16, "0" is loaded as an initial value. Counter 71
Output 72 is input to the comparison circuit 73. The comparison circuit 73 outputs a high level signal, that is, an input disconnection alarm when the count value 72 of the counter 71 becomes larger than the reference value 74. Here, the reference value 74
Is set to “2” in advance.

The operation of the light input break detection circuit having such a configuration will be described with reference to FIGS. 3 and 4. When the electric CMI signal 16 arrives normally as shown in FIG. 3, the counter 71 is constantly initialized and the count value is "0" or "1". On the other hand, when the signal disconnection occurs at time T ₁₁ shown in FIG. 4, the counter is not reset after time T ₁₅ . Therefore, the count value 72 of the counter becomes “3” at time T ₁₄ . Since the reference value 74 is set in advance "2", the output of the comparator circuit 73 at time T ₁₄ becomes a high level signal, is transmitted as an alarm indicating the interruption of the optical input.

In the above description, the count value of the counter is added every time the reference clock pulse arrives.
When the counter is initialized, its count value may be subtracted by loading it with a value larger than the value capable of originally counting the reference clock pulse, for example, "2". As a result, if the signal output when the count value becomes “0” and the counting operation is stopped is used as the alarm information, it is not necessary to separately provide a comparison circuit.

In the first to third embodiments described above, the CMI-coded signal is handled as the signal input to the optical input break detection circuit, but the present invention is not limited to this, and the continuation of the same code is suppressed. It is also applicable to the case of using another transmission line code.

[0039]

As described above, according to the optical input disconnection detection circuit of the present invention, the optical input disconnection alarm is output immediately after a lapse of a predetermined time after the input disconnection of the optical signal occurs. In addition, the time from the interruption of the optical input to the output of the alarm can be shortened as compared with the conventional case, and by suppressing the transfer of the unnecessary signal to the circuit in the subsequent stage, it is possible to prevent the spread of the failure.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing in principle the configuration of an optical receiving circuit including an optical input break detection circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram specifically showing a configuration of a light input break detection circuit of the present embodiment.

FIG. 3 is a timing chart showing a signal waveform input to the optical input break detection circuit in a normal state of the electrical CMI signal in the present embodiment.

FIG. 4 is a timing chart showing an example of a signal waveform input to the optical input disconnection detection circuit when the electrical CMI signal is disconnected in the present embodiment.

FIG. 5 is a timing chart showing another example of the signal waveform input to the optical input disconnection detection circuit when the electrical CMI signal is disconnected in the present embodiment.

FIG. 6 is a circuit diagram specifically showing a configuration of a light input break detection circuit of a second embodiment.

FIG. 7 is a timing chart showing an example of a signal waveform input to the optical input disconnection detection circuit when the electrical CMI signal is disconnected in the second embodiment.

FIG. 8 is a circuit diagram specifically showing a configuration of a light input break detection circuit of a third embodiment.

FIG. 9 is a circuit diagram showing a configuration of a conventional light input break detection circuit.

[Explanation of symbols]

 16 Electric CMI signal 41 Phase comparison circuit 42 Reference clock pulse 43 Optical input disconnection alarm 51-56, 61, 62 Flip-flop circuit 71 Counter 73 Comparison circuit

Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location H04B 10/14 10/04 10/06

Claims (4)

[Claims] 1. A binary data signal consisting of "0" and "1" is coded so that "0" or "1" does not continue for a certain number or more, and the transmitted optical signal is converted into an electrical signal. Optical-electrical converting means, reproducing means for reproducing an encoded data signal from the electric signal converted by the optical-electrical converting means, and reference clock pulse output means for outputting a reference clock pulse having a predetermined constant period. The reference clock pulse output from the reference clock pulse output means and the encoded data signal reproduced by the reproducing means are input and encoded while a predetermined number of reference clock pulses are input. First detecting the presence / absence of input of a signal representing the code of "1" of a data signal
Data signal detecting means, while inputting the reference clock pulse output from the reference clock pulse output means and the encoded data signal reproduced by the reproducing means, a predetermined number of reference clock pulses are input. For detecting the presence / absence of input of a signal representing the code of "0" of the data signal encoded in the second
Data signal detecting means and optical input disconnection detecting means for detecting disconnection of the optical input when a corresponding data signal is not detected in at least one of the first and second data signal detecting means. An optical input disconnection detection circuit characterized by: 2. A binary data signal consisting of "0" and "1" is encoded so that "0" or "1" does not continue for a fixed number or more, and an optical signal transmitted is converted into an electrical signal. Optical-electrical converting means, reproducing means for reproducing an encoded data signal from the electric signal converted by the optical-electrical converting means, and a rising or falling change point of the encoded data signal is detected. Point pulse output means for outputting a pulse, a reference clock pulse output means for outputting a reference clock pulse having a predetermined constant period, a reference clock pulse output from the reference clock pulse output means, and the change point pulse A change point pattern for detecting the presence or absence of change point pulse input while inputting a pulse output from the output means and inputting a predetermined number of reference clock pulses. And scan detection means, the light input break detection circuit, characterized by comprising a light input break detecting means for detecting an interruption of the optical input when changing point by the change point pulse detection means is not detected. 3. An optical signal transmitted by encoding a binary data signal consisting of "0" and "1" so that "0" or "1" does not continue for a certain number or more and transmitted. Photoelectric conversion means for converting, reproducing means for reproducing an encoded data signal from the electric signal converted by the photoelectric conversion means, and reference clock pulse output for outputting a reference clock pulse of a predetermined constant period Means, counting means for counting each time a reference clock pulse is output from the reference clock output means, and a rising time point or a falling edge of the encoded data signal reproduced by the reproducing means. Initializing means for initializing at a time point, and a reference clock capable of counting between the value counted by the counting means and the change point of the code data signal Comparing means for comparing with a predetermined value larger than the number of louses, and an optical input for detecting disconnection of the optical input when the count value of the counting means becomes larger than the predetermined value by the comparing means. An optical input disconnection detection circuit comprising disconnection detection means. 4. An optical signal transmitted by encoding a binary data signal composed of "0" and "1" so that "0" or "1" does not continue for a certain number or more and transmitted as an electric signal. An opto-electric conversion means for converting, a reproducing circuit for reproducing an encoded data signal from the electric signal converted by the opto-electric converting means, and a reference clock pulse output for outputting a reference clock pulse of a predetermined constant cycle. A circuit, a counter for subtracting the count value every time the reference clock pulse is output from the reference clock output means, and a count value of the counter at the rising time or the falling time of the code data signal reproduced by the reproducing means. Initialized to a predetermined value that is greater than the number of reference clock pulses that can be counted during the change point of the code data signal. That the initialization means, the light input break detection circuit, characterized by comprising a light input break detecting means for detecting an interruption of the optical input when the count value of the counter becomes "0".