JPH087681Y2 - Microwave semiconductor package - Google Patents
Microwave semiconductor packageInfo
- Publication number
- JPH087681Y2 JPH087681Y2 JP1989139455U JP13945589U JPH087681Y2 JP H087681 Y2 JPH087681 Y2 JP H087681Y2 JP 1989139455 U JP1989139455 U JP 1989139455U JP 13945589 U JP13945589 U JP 13945589U JP H087681 Y2 JPH087681 Y2 JP H087681Y2
- Authority
- JP
- Japan
- Prior art keywords
- dielectric
- wall portion
- semiconductor package
- transmission line
- microwave
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Description
【考案の詳細な説明】 「産業上の利用分野」 本考案はマイクロ波半導体パツケージの電気的整合を
とるための手段を施すことにより伝送信号の反射障害を
防止することを目的としている。DETAILED DESCRIPTION OF THE INVENTION "Industrial Application Field" The present invention aims to prevent reflection disturbance of a transmission signal by providing means for electrically matching the microwave semiconductor package.
「従来の技術」 従来の超高周波パツケージは、誘電体基板上にメタラ
イズ導電体層に固定した入、出力ピンを介して信号伝送
路を形成し、誘電体による環状壁部を上記基板上に載置
固定するとともに、壁部内に半導体チツプを固定し、誘
電体上蓋を覆せて封止容器を構成している。[Prior Art] A conventional ultra-high frequency package forms a signal transmission path via input / output pins fixed to a metallized conductor layer on a dielectric substrate, and mounts an annular wall portion made of a dielectric on the substrate. The semiconductor chip is fixed in the wall portion while being placed and fixed, and the dielectric upper lid is covered to form a sealed container.
電気信号は入力ピンからメタライズ導電体層に伝わ
り、誘電体壁部をくぐり半導体チツプを経てメタライズ
導体層、出力ピンへと伝送される。The electric signal is transmitted from the input pin to the metallized conductor layer, passes through the dielectric wall portion, and is transmitted to the metallized conductor layer and the output pin through the semiconductor chip.
そこで信号伝送路の壁部に進入する部分において、こ
の誘電体による伝送路の周囲の実効誘電率εｗが不連続
に増加し、伝送路の特性インピーダンスZ0との関係式 （∵Ｚはεｗ＝１のときの特性インピーダンス）が成立
し、Z0が第６図のように不連続特性を呈することにな
る。Therefore, the effective permittivity εw around the transmission line due to this dielectric increases discontinuously in the portion that enters the wall of the signal transmission line, and the relational expression with the characteristic impedance Z 0 of the transmission line (∵Z is the characteristic impedance when εw = 1) holds, and Z 0 exhibits the discontinuous characteristic as shown in FIG.
かような特性インピーダンスの不連続性が信号の通過
に伴なつて反射を起し、特に超高周波帯での障害をもた
らす。Such a discontinuity in the characteristic impedance causes reflection as the signal passes, and causes a disturbance particularly in the super high frequency band.
「考案が解決しようとする問題点」 しかるに従来公知のマイクロ波パツケージに見られる
特性インピーダンスの不連続に基因する伝送信号の反射
障害を防遏する電気的整合手段を備える構成を提供する
ものである。"Problem to be solved by the invention" However, it is an object of the present invention to provide a structure provided with an electrical matching means for preventing the reflection disturbance of the transmission signal due to the discontinuity of the characteristic impedance found in the conventionally known microwave packages. .
「問題点を解決するための手段」 よつて本考案は電気的整合をとるために、第５図に示
すように伝送路の特性インピーダンスを連続的か細分化
した段階状に変化させる手段として封止容器即ち環状壁
部の誘電率ε１に対して、該壁部から遠ざかるに従つ
て、漸次誘電率を低減させることを着想した。[Means for Solving Problems] Therefore, in order to achieve electrical matching, the present invention is a means for changing the characteristic impedance of a transmission line in a continuous or subdivided stepwise manner as shown in FIG. With respect to the dielectric constant ε 1 of the stop container, that is, the annular wall portion, it was conceived to gradually reduce the dielectric constant as the distance from the wall portion increases.
以下に図面により本考案の具体的実施例について説明
する。Specific embodiments of the present invention will be described below with reference to the drawings.
「実施例」 第１図は第１の実施例の外観斜視図、第２図乃至第４
図は夫夫異なる実施例の要部外観斜視図である。[Embodiment] FIG. 1 is an external perspective view of the first embodiment, and FIGS.
The drawing is a perspective view of the external appearance of the essential parts of different embodiments.
１は表面にメタライズパターンにより形成した入、出
力伝送路導電体51,52を備える誘電体基板、20は誘電率
ε１を有する環状壁部、21,22は夫夫誘電率ε２，ε３
を有する誘電体ブロツク、61,62が夫夫入、出力リード
ピン、誘電体基板、壁部誘電体ブロツク、板体の誘電率
は各各ε０＜ε３＜ε２＜ε１の関係を有している。Reference numeral 1 is a dielectric substrate having input and output transmission line conductors 51 and 52 formed by a metallized pattern on the surface, 20 is an annular wall portion having a dielectric constant ε 1 , and 21 and 22 are dielectric constants ε 2 and ε 3.
The dielectric blocks 61, 62 each have an output lead pin, a dielectric substrate, a wall dielectric block, and a plate body having a dielectric constant of ε 0 <ε 3 <ε 2 <ε 1. are doing.
第１図は環状壁部の側面に伝送路導電体上において密
着する誘電率が漸次小さい誘電体ブロツク複数を配設し
た例、第２図は壁部の一面に四角錐上の誘電率ε２のブ
ロツクを設けた例、第３図は壁部の一面に密着した三角
柱状ブロツクの例、第４図は壁面の一面に密着する楔状
ブロツクの例、を夫夫表わしている。Examples of dielectric constant is disposed progressively smaller dielectric block plurality Figure 1 is in close contact on the transmission line conductor on the side surface of the annular wall portion, the dielectric constant of the quadrangular pyramid on one side of the second figure wall epsilon 2 FIG. 3 shows an example of a block having a triangular prism shape in close contact with one surface of a wall portion, and FIG. 4 shows an example of a wedge block in close contact with one surface of a wall surface.
なお、第１図の実施例では、壁部の誘電率に対し連接
される誘電体ブロツクのそれとは誘電率自体の値を異に
しているのに対し、第２図乃至第４図の実施例は壁部の
誘電率と同じく、信号伝送路に対する垂直方向の断面積
が、壁部の一面より遠退くにつれて減少させて実効誘電
率を変える例である。In the embodiment shown in FIG. 1, the value of the dielectric constant itself is different from that of the dielectric block connected to the dielectric constant of the wall portion, whereas the embodiment shown in FIGS. Is an example of changing the effective dielectric constant by decreasing the cross-sectional area in the direction perpendicular to the signal transmission path as the wall recedes from the one surface, as well as the dielectric constant of the wall.
上記壁部に連接する壁部の誘電率よりも小さいブロツ
クの形状は、直方体であろうが、角錐体であろうが、連
接の都度誘電率が低減するように配設されており、この
ように構成されたパツケージに信号伝送したときは、低
誘電率層の数に比例して特性インピーダンスZ0の変化は
緩やかとなり、結局電気的整合が第５図に示す通り、連
続的に限りなく近づいて良好な結果を得ることができ
た。The shape of the block, which is smaller than the permittivity of the wall portion connected to the wall portion, is a rectangular parallelepiped or a pyramid, and is arranged so that the permittivity is reduced each time it is connected. When a signal is transmitted to the package configured as described above, the characteristic impedance Z 0 changes gradually in proportion to the number of low dielectric constant layers, and eventually the electrical matching approaches continuously and infinitely as shown in FIG. And good results were obtained.
従つて信号伝送路上に介在する特性インピーダンス
は、基板、壁部、伝送路導体、或は閉止蓋へと経由する
電気的信号の通過によつても極端に変化せず、反射波を
惹起することがない。Therefore, the characteristic impedance present on the signal transmission line does not change extremely even when an electric signal passes through the substrate, wall, transmission line conductor, or closing lid, and causes a reflected wave. There is no.
「効果」 かくして本考案のマイクロ波半導体パツケージによれ
ば、環状壁部の一面に密着して、漸次誘電率が低減する
ブロツクを配設する構成であるため、基本的に特性イン
ピーダンスの不整合を緩和でき、インピーダンスの格差
に基づく反射を有効に防止するに貢献するものである。[Effect] Thus, according to the microwave semiconductor package of the present invention, since the block having the gradually decreasing dielectric constant is arranged in close contact with one surface of the annular wall portion, the characteristic impedance mismatch is basically caused. It can be mitigated and contributes to effective prevention of reflection due to the difference in impedance.
第１図乃至第４図は本考案マイクロ波半導体パツケージ
の構成及び要部構成の異なる実施例の外観斜視図、第５
図は本考案パツケージの特性インピーダンスと壁部の一
面からの距離ｄとの関係を表わすグラフ、第６図は従来
のパツケージに対する特性インピーダンスのグラフであ
る。 １…誘電体基板、20…環状壁部、21,22…誘電体ブロツ
ク、51,52…入、出力伝送路導電体、61,62…入、出力リ
ードピン、ε０，ε１，ε２，ε３…誘電率。1 to 4 are perspective views showing the appearance of an embodiment of the microwave semiconductor package according to the present invention having a different structure and main structure, and FIG.
FIG. 6 is a graph showing the relationship between the characteristic impedance of the package of the present invention and the distance d from one surface of the wall portion, and FIG. 6 is a graph of the characteristic impedance of the conventional package. 1 ... Dielectric substrate, 20 ... Annular wall part, 21, 22 ... Dielectric block, 51, 52 ... Input, output transmission line conductor, 61, 62 ... Input, output lead pin, ε 0 , ε 1 , ε 2 , ε 3 ... Dielectric constant.
Claims (1)
状壁部を固定して半導体素子を封入する容器を構成し、
上記容器の壁部外方にリードピンを固定し信号伝送路と
なるメタライズパターンを入出力導体として備えるマイ
クロ波半導体パッケージにおいて、上記信号入力または
出力伝送路上であって、且つ上記壁部の少くとも一部外
周に密着し、上記信号伝送路上で少なくとも上記壁部の
一面より遠退くにつれて上記誘電体基板に垂直な断面積
が小さくなることによって実効誘電率が漸減される誘電
体ブロックを配設してなることを特徴とするマイクロ波
半導体パッケージ。1. A container for enclosing a semiconductor element by fixing a dielectric substrate and an annular wall portion made of a dielectric on the upper surface of the dielectric substrate,
A microwave semiconductor package having a metallized pattern serving as a signal transmission line fixed to the outside of a wall portion of the container as an input / output conductor, wherein the microwave is on the signal input or output transmission line and at least one of the wall portions. A dielectric block is provided which is in close contact with the outer periphery of the portion and whose effective dielectric constant is gradually reduced by reducing the cross-sectional area perpendicular to the dielectric substrate as it recedes from at least one surface of the wall portion on the signal transmission path. A microwave semiconductor package characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989139455U JPH087681Y2 (en) | 1989-11-30 | 1989-11-30 | Microwave semiconductor package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989139455U JPH087681Y2 (en) | 1989-11-30 | 1989-11-30 | Microwave semiconductor package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0377505U JPH0377505U (en) | 1991-08-05 |
| JPH087681Y2 true JPH087681Y2 (en) | 1996-03-04 |
Family
ID=31686499
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989139455U Expired - Lifetime JPH087681Y2 (en) | 1989-11-30 | 1989-11-30 | Microwave semiconductor package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH087681Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6956445B2 (en) * | 2003-02-19 | 2005-10-18 | Electro-Tec Corp. | Broadband high-frequency slip ring system |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3077506U (en) * | 2000-11-07 | 2001-05-25 | 東鋼業株式会社 | spanner |
-
1989
- 1989-11-30 JP JP1989139455U patent/JPH087681Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0377505U (en) | 1991-08-05 |
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