JPH0869875A - Cooking appliance - Google Patents

Abstract

PURPOSE: To prevent erroneous control by detecting abnormality before parallel conversion when abnormality by disturbance such as a noise is caused. CONSTITUTION: Since a microcomputer 101 again transfers a serial control signal to an SR102 when a transfer check bit string transmitted to the shift register SR102 and a reply check bit train from the SR102 do not coincide with each other, even if the content of control data of the serial control signal is disturbed by disturbance such as a noise, since the SR102 transmits the serial control signal until it checks that a normal serial control signal is received, the SR102 can receive the normal serial control signal. Since the control signal is composed of a serial control data train on which parallel conversion is performed by the SR102 and a transfer check data string not less than a single bit to check the transfer result, whether or not the transfer result of the serial control signal is normal can be detected by monitoring the transfer check data string. In this way, a malfunction of the SR can be prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cooker, and more particularly to a cooker equipped with a microcomputer for connecting various control parts to a shift register and controlling them with a serial control signal.

[0002]

2. Description of the Related Art Conventionally, for example, a microwave oven for cooking by high frequency heating is provided with a magnetron, a heater, a turntable drive motor, a fan motor, an interior lamp, etc. as various control parts for cooking. Various control parts are ON-OFF controlled by a control signal from a microcomputer by using switching means such as an electromagnetic relay, a semiconductor relay, or a triac. By the way, in recent years, as the multifunction of microwave ovens has advanced, the number of output terminals of microcomputers has increased,
Shift registers have come to be used for expanding output terminals. For example, from one output terminal of a microcomputer, a control signal consisting of, for example, an 8-bit string is converted into a serial control signal and transmitted to a shift register, and the shift register converts this serial control signal into parallel and outputs it to each relay. Turns ON 8 relays
-OFF control is performed to control 8 types of control components.

However, when the serial control signal is given from the microcomputer to the shift register, the control data content in the serial control signal may be disturbed by disturbance such as noise. The control signal lines include a serial control data line for transferring control output data, a clock line for controlling transfer timing, and a strobe line for instructing parallel conversion output, but the one most sensitive to disturbance is the clock. This is because the control data is output in an excessively shifted state if noise is added to the clock line. That is, during transfer of the serial control signal from the microcomputer to the shift register, the control data contents output from the shift register are excessively shifted due to the influence of noise, etc., and each relay malfunctions, for example, stopping the magnetron. The problem occurs that the magnetron operates despite the command.

As a conventional example for improving this problem, a microcomputer stores the control signal data before transferring the serial control signal to the shift register, and after the shift register performs parallel conversion output by the strobe signal, the serial control is further performed. The signal is sent back to the microcomputer, the control signal data stored in advance is compared with the returned control signal data, and if they do not match, the shift register output is prohibited. Has been proposed (Japanese Patent Laid-Open No. 3-1482).
Issue, see).

[0005]

However, in the cooking device disclosed in Japanese Patent Laid-Open No. 3-1482, the microcomputer outputs the shift register when the contents of the transmitted control signal data and the returned control signal data do not match. Since it is configured to prohibit, there is a slight time lag (delay) before prohibition, and a short pulse signal is generated during this time. Further, in the literature, it is described that this time lag has no practical problem because the machine cycle of the microcomputer is extremely short. However, in recent years, semiconductor relays such as electromagnetic relays that do not have the risk of welding of contacts have been described. Is used, and it may operate with a short trigger signal (pulse signal). When these semiconductor relays are used, even an instantaneous pulse signal may operate, which is not desirable.

The present invention has been made in consideration of the above circumstances, and in a cooker equipped with a microcomputer that connects various control parts to a shift register and controls them with a serial control signal, the microcomputer serially shifts to the shift register. Even if an abnormality such as noise occurs during transfer of the control signal, it is detected before the shift register performs parallel conversion to prevent erroneous control data from being output from the shift register. The cooker which can be done is provided.

[0007]

FIG. 1 is a block diagram showing the basic configuration of the present invention. In FIG. 1, the present invention relates to a control circuit 103 including various control components for cooking,
A microcomputer 101 having an input / output terminal for outputting a serial control signal for individually controlling the various control components, and a serial control signal output from the input / output terminal of the microcomputer 101 are received and converted into parallel signals. In the cooker provided with the shift register 102 that outputs the serial control signal to the control circuit 103 and returns the serial control signal to the input / output terminal of the microcomputer 101, the microcomputer 101 outputs the serial control signal to the shift register 102. Control data storage circuit 1 for storing serial control data bit string
01a, a transfer check data storage circuit 101b for storing a transfer check data bit string for checking the transfer result of this serial control data bit string, and a transfer check data bit string added at the beginning of the serial control data bit string for transmission. A serial data transmission circuit 101c, a reply check data storage circuit 101d that receives and stores the transfer check data bit string returned from the shift register 102 as a reply check data bit string, and this transfer check data storage circuit 101d.
A comparison circuit 101e for comparing the contents of the transfer check data bit string stored in b with the contents of the reply check data bit string stored in the reply check data storage circuit 101d is further provided, and each comparison result by this is checked. The cooker is characterized by prohibiting parallel conversion of the shift register when the contents of the data bit string do not match.

When the transfer check data bit string transmitted to the shift register 102 and the reply check data bit string returned from the shift register 102 do not match, the microcomputer 101 transfers the serial control signal to the shift register 102 again. It is preferable that it is configured as follows.

The serial control signal is preferably composed of a serial control data string to be parallel-converted by the shift register 102 and a transfer check data string of 1 bit or more for checking the transfer result of the serial control data. .

In the present invention, the microcomputer 101 is basically provided with a control data storage circuit 101a, a transfer check data storage circuit 101b, a serial data transmission circuit 101c, a reply check data storage circuit 101d and a comparison circuit 101e. It includes a CPU, a ROM, a RAM, an I / O port, a register, a logic gate, and the like (not shown). A register is used as the serial data transmission circuit 101c, and the control data storage circuit 101a and the transfer check data storage circuit 10 are used.
1b, as the reply check data storage circuit 101d,
The RAM in this is used. A register, an AND gate, and an XOR gate can be used as the comparison circuit. Further, this ROM processes a shift register control program of the present invention, a transfer check data generation program, a transfer check data comparison program, a heating control program for controlling an object to be heated to a set heating temperature, and a temperature detection signal. A signal processing program and the like are stored.

The microcomputer 101 is connected to the shift register 102 via a control signal line. Further, the shift register 102 is connected to the control circuit 103 and converts the serial control data for individually controlling various control components for cooking into parallel output. As the control signal output from the microcomputer 101, a serial control signal including a serial control data string and a transfer check data string, a clock signal for controlling the transfer timing of the serial control signal, and a serial control data string of the shift register 102 It consists of a strobe signal for instructing parallel conversion. Shift register 10
The control signal output from 2 is composed of a reply check data bit string to be returned to the microcomputer 101, and is transferred between the microcomputer 101 and the input / output terminal of the shift register.

[0012]

According to the structure of the present invention, in FIG. 1, a control circuit 103 having various control components for cooking and a serial input / output for outputting a serial control signal for individually controlling the various control components. A microcomputer 101 having a terminal and a serial control signal output from a serial input / output terminal of the microcomputer 101 are received, converted into parallel and output to a control circuit 103, and the serial control signal is output from the microcomputer 1
Shift register 1 that returns to the 01 serial input / output terminal
In the cooking device provided with 02, the microcomputer 101 checks the control data storage circuit 101a for storing the serial control data bit string of the serial control signal transmitted to the shift register 102, and the transfer result of this serial control data bit string. From the shift register 102, a transfer check data storage circuit 101b for storing a transfer check data bit string for storing the transfer check data bit string, a serial data transmission circuit 101c for adding the transfer check data bit string to the head of the serial control data bit string and transmitting the data. Reply check data storage circuit 101d that receives and stores the transfer check data bit string as a return check data bit string, and the contents of the transfer check data bit string stored in this transfer check data storage circuit 101b. Reply check data storage circuit 101
When the microcomputer 101 transmits the serial control signal to the shift resist 102, the serial control signal is transmitted when the microcomputer 101 transmits the serial control signal. Even if the control data content of is disturbed by disturbance such as noise, the correctness of the control data content is checked before the parallel conversion output instruction by comparing the contents of the check data bit strings. This prevents the 102 from outputting an erroneous control signal, and improves the reliability of the serial control signal.

When the transfer check bit string sent to the shift register 102 and the reply check bit string returned from the shift register 102 do not match, the microcomputer 101 again transfers the serial control signal to the shift register 102. Therefore, even if the control data content of the serial control signal is disturbed by a disturbance such as noise, the shift register 10
Since the serial control signal is transmitted until it checks that 2 has received the normal serial control signal, the normal serial control signal can be received by the shift register 102.

Since the serial control signal is composed of a serial control data string to be parallel-converted by the shift register 102 and a transfer check data string of 1 bit or more for checking the transfer result of the serial control data, Whether or not the transfer result of the serial control signal is normal can be detected by monitoring the transfer check data string.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below based on the embodiments shown in the drawings. The present invention is not limited to this. INDUSTRIAL APPLICABILITY The present invention is mainly suitable for use in a cooker in which various control parts are controlled by a shift register using a microcomputer. In addition to achieving the "shift register control function for preventing erroneous operation," it can be applied to all electric appliances that are controlled by using a microcomputer and a shift register.

FIG. 2 is a block diagram showing the configuration of the control circuit of the cooker according to the present invention. Further, FIG. 2 shows a configuration of a control circuit in which the cooking device of the present invention is applied to a microwave oven with an oven function. The control circuit 20 drives the magnetron MG for irradiating microwaves and the magnetron MG. High frequency transmission transformer TS, high voltage capacitor C1
C2, an upper heater H1 for heating an oven, a heater H2 for hot air, a fan motor FM1 for hot air, a fan motor FM2 for cooling, a turntable motor TM, an internal lamp CL, and other control parts, and a high-voltage condenser capacity switching Relay RL1, magnetron MG driving relay RL2, upper heater H1 driving relay RL3, hot air heater H2
Drive relay RL4, hot air fan motor FM1 drive relay RL5, cooling fan motor FM2 drive relay RL6, turntable motor TM drive relay RL7, interior light LP drive relay RL8 (semiconductor relay ) And other relays.

The control unit 10 is a microcomputer 1.
And a shift register 2 for parallel-converting and outputting serial control data transmitted from the microcomputer 1, and a relay drive circuit 3 for driving each relay by the control data output from the shift register 2. The relay drive circuit 3 turns on each relay RL1 to RL8.
N-OFF control is performed to control various control components (see FIG. 3). Switches SW1 to SW3 are included in the control circuit.
Is further provided to switch between supply and interruption of AC power.

FIG. 3 is a block diagram showing the circuit configuration of the control unit shown in FIG. In FIG. 3, the control unit 10 includes a CPU and an R
It is composed of a microcomputer 1 including an OM, a RAM and an I / O port, a shift register 2 and a relay drive circuit 3. In addition, as shown in FIG.
The output terminals Q0 to Q7 are connected to the relays RL1 to RL8 via the relay drive circuit 3, respectively. In addition, the relay drive circuit 3 is a transistor TR
1 to TR8 and resistors R1 to R16.

FIG. 4 is a block diagram showing the functional arrangement of the microcomputer and shift register of the present invention. FIG.
At 8, the microcomputer 1 temporarily stores the control data (D0, D2 to D7) of the serial control signal 8
Bit control data memory 1a and transfer check data (D8, D9 to D1) before being transferred to the shift register 2.
5) is temporarily stored in the transfer check data memory 1b, and control data is added after the transfer check data to the shift register 2 and the serial control signals (D0, D1) are added.
To D15) for transmitting serial data transmission register 1c
And an 8-bit reply check data memory 1d for temporarily storing the transfer check data (D8 to D15) returned from the shift register 2 as reply check data, and a function of a comparison register 1e for comparing the transfer check data and the reply check data. And each of the functional units has
Basically, it is composed of a CPU, a ROM, a RAM, and an I / O port (not shown). Further, this ROM processes a shift register control program of the present invention, a transfer check data generation program, a transfer check data comparison program, a heating control program for controlling an object to be heated to a set heating temperature, and a temperature detection signal. A signal processing program and the like are stored.

The shift register 2 includes an 8-bit shift register 2a, an 8-bit latch register 2b for latching control data, and the latched control data D0.
8-D output registers 2c for outputting .about.D7 from output terminals Q0-Q7, respectively. Here, parallel conversion of the serial control signal means parallel conversion when the control data transferred to the shift register 2a is latched in the latch register 2b.

The microcomputer 1 serially outputs, for example, a 16-bit control signal from its serial signal output terminal SO1 and transfers it to the data signal input terminal DT of the shift register 2, of which 8 bits are check data. As a result, the serial signal output terminal SO2 of the shift register 2 is sent back to the serial input terminal SI of the microcomputer 1 for checking, and the control data output from the output terminals Q0 to Q7 of the shift register 2 are controlled. This is a check data bit string for transfer check (in order to detect whether or not the serial control signal input to the shift register 2 has a disturbance due to noise etc. before the shift register 2 outputs the serial control data by parallel conversion. After the data (1 or 0) of the control data D7 is inverted as 8 bits and expanded into 8-bit D8 to D15 and transferred, the original control data bit string (8 bits) is transferred subsequently. .

At this time, the strobe signal is output from the strobe signal output terminal ST1 of the microcomputer 1 to the strobe signal input terminal ST2 of the shift register 2, and
Clock signal output terminal CLK of the microcomputer 1
The clock signal from 1 is applied to the clock signal input terminal CLK2 of the shift register 2, respectively. When the control signal is applied to the data signal input terminal DT of the shift register 2, the shift register 2 receives, for example, D as a check data bit.
When 8 bits of the inverted data D15 to D8 of 7 are returned from the serial signal output terminal SO2 to the serial signal input terminal SI of the microcomputer 1, the control data D0 to
D7 is ready to be latched in the latch register 2b.

FIG. 5 is an explanatory diagram showing the truth value of the operation of the shift register. As shown in FIG. 5, the shift register 2
Operates at the rising edge of the clock signal CLK, and the control data D is the shift register 2 when the strobe signal is "H".
It is latched by the internal latch register 2b. Further, the shift register has, for example, a permission signal OE for instructing the output register 2c to permit data output, but in the present embodiment, it is assumed that the permission signal OE is always set to the permission state.

Further referring to FIG. 4, the microcomputer 1 transfers a serial control signal having a number of bits larger than the number of control data bits (8 bits) converted in parallel by the shift register 2, for example, 16 bits. Here, the latter 8 bits of 16 bits are the relay RL1.
~ Control data bit string controlled by RL8 (D0 to D7)
The first 8 bits are a check data bit string (D8 to D15) for transfer check. Then, the microcomputer 1 sends a 16-bit serial control signal to D1.
5, D14, ..., D2, D1 are transferred in this order, the transfer check data bit string from the shift register SO2 to the microcomputer 1 is D15 ,.
8 bits will be input in this order.

Therefore, the comparison register 1e compares the returned check data bit string with the returned check data bit string to determine whether or not a disturbance has occurred in the serial control signal. . For example, the control data of D7 is first transferred to the shift register, and since the control data of D7 corresponds to the data of the interior light 9, the transfer check data bit string is set to the data obtained by inverting the interior light signal. To do. That is, if the internal light signal is "1", the transfer check data bit string (D8
~ D15) is "00000000", and if the internal light signal is "0", the transfer check data bit string is "111".
11111 ".

In this way, the transfer check data bit string is determined, and "D0, D1, ...
..., D6, D7, 0, 0, 0, 0, 0, 0, 0, 0 "or" D0, D1, ..., D6, D7, 1, 1, 1,
When a 16-bit serial control signal of 1, 1, 1, 1, 1 ″ is shifted, for example, if noise is added to the clock signal and the shift register 2 erroneously shifts by an extra bit, that is, Microcomputer 1
The transfer check data bit string received by
Bits inverted such as "01" or "11111110" are included, whereby the microcomputer 2 can determine that the signal transferred to the shift register 2 has an abnormality due to noise or the like.

Therefore, the microcomputer 1 can determine whether or not there is a disturbance in the transfer check data bit string, and after determining that there is no disturbance and normal, the serial control signal (control data) is parallel-converted by the strobe signal. To do. On the other hand, if it is determined that there is a disturbance, it is possible to prevent erroneous control data from being output to the output terminals Q0 to Q7 of the shift register by not outputting the strobe signal. In that case. The microcomputer 1 can also be configured to transfer the control signal to the shift register 2 again.

FIG. 6 is a flow chart showing the serial control signal processing of the microcomputer according to the present invention.
With reference to FIG. 6, a flow of a control program of the shift register built in the microcomputer 1 will be described. Step S01: CPU of this microcomputer 1
Control data (D0
~ D7 bit). Step S02: The control data (D0 to D7 bits) of the serial control signal to be output is stored in the internal control data memory 1
Temporarily store in a. Step S03: Then, the contents of the data D7 corresponding to the output terminal Q7 of the shift register 2 are checked, and as a result, the transfer check data bit strings D8 to D15 are all set to “0” or all “1” and set in the shift register 2. It is temporarily stored in the transfer check data memory 1b before transfer.

Step S04: Next, following the transfer check data bit strings D15 to D8, the control data D7 to D0 stored in step S02 are set in the serial data transmission register 1c as 16-bit serial control data and output. Step S05: Next, CP of the microcomputer 1
U checks whether all the serial control data set in the serial data transmission register 1c have been transferred. Step S06: When all the serial control data have been transferred, it is returned and the transfer check data bit string is temporarily stored in the reply check data memory 1d as reply check data, and at the same time, the check data bit string temporarily stored in the transfer check data memory 1b. The contents are compared by the comparison register 1e.

Step S07: If they are the same, the microcomputer 1 inputs the strobe signal from the output terminal ST1 to the input terminal ST2 of the shift register 2. Step S08: The shift register 2 parallel-converts the control data D0 to D7 transferred to the shift register 2a into the latch register 2b and latches them, and outputs the output register 2c.
The control data D0 to D7 are output from the output terminals Q0 to Q7. If it is determined that they are not the same in step S06, it is determined that the disturbance is in the serial control signal, the output of the strobe signal is prohibited, and the step S06 is performed again.
It returns to 04 and is repeated so that a normal serial control signal may be output.

Accordingly, when the microcomputer 1 gives a serial control signal to the shift register 2, even if the data content of the serial control signal is disturbed by noise, the latch register 2 in the shift register 2
Since the detection can be performed before the parallel conversion and output to b, the erroneous control signals are not output from the output terminals Q0 to Q7 of the shift register 2 even for a moment.

[0032]

According to the present invention, in a cooker provided with a microcomputer for connecting various control parts to a shift register and controlling them with a serial control signal, while the serial control signal is being transferred from the microcomputer to the shift register, Even if an abnormality due to a disturbance such as noise occurs, it is detected before the shift register outputs it in parallel conversion, so that the malfunction of the shift register is prevented. Therefore,
Even if an abnormal serial control signal is generated, it is detected before each relay malfunctions, so parallel conversion output is not instructed to the abnormal serial control signal, the serial control signal is transferred again, and the shift register performs normal serial control. When it receives a signal, it instructs parallel conversion output. Therefore,
It is possible to properly control each relay without outputting erroneous control data from the shift register for a moment.

[Brief description of drawings]

FIG. 1 is a block diagram showing a basic configuration of the present invention.

FIG. 2 is a block diagram showing a configuration of a control circuit of the cooking device according to the present invention.

3 is a block diagram showing a circuit configuration of a control unit in FIG.

FIG. 4 is a block diagram showing a functional configuration of a microcomputer and a shift register of the present invention.

FIG. 5 is an explanatory diagram showing a truth value of an operation of a shift register.

FIG. 6 is a flowchart showing serial control signal processing of the microcomputer according to the present invention.

[Explanation of symbols]

 1 Microcomputer 1a Control data memory 1b Transfer check data memory 1c Serial data transmission register 1d Reply check data memory 1e Comparison register 2 Shift register 2a Shift register 2b Latch register 2c Output register 3 Relay drive circuit RL1 to RL8 Relay 10 Control unit 20 Control circuit

Claims (3)

[Claims] 1. A microcomputer having a control circuit for controlling various control parts for cooking, an input / output terminal for outputting a serial control signal for individually controlling the various control parts, and a microcomputer for the microcomputer. A cooker equipped with a shift register that receives a serial control signal output from an input / output terminal, converts the serial control signal into a parallel signal, outputs the serial control signal to the control circuit, and returns the serial control signal to the input / output terminal of the microcomputer. Is a control data storage circuit for storing a serial control data bit string of a serial control signal transmitted to the shift register, and a transfer check data storage for storing a transfer check data bit string for checking a transfer result of the serial control data bit string. Circuit and the serial control A serial data transmission circuit that adds a transfer check data bit string to the beginning of the data bit string for transmission; a reply check data storage circuit that receives and stores the transfer check data bit string returned from the shift register as a reply check data bit string; The transfer check data storage circuit further includes a comparison circuit for comparing the contents of the transfer check data bit string stored in the transfer check data storage circuit with the contents of the reply check data bit string stored in the return check data storage circuit, and the result of the comparison A cooker characterized by prohibiting parallel conversion of a shift register when the contents of respective check data bit strings do not match. 2. The microcomputer transfers the serial control signal to the shift register again when the transfer check data bit string transmitted to the shift register and the reply check data bit string returned from the shift register do not match. The cooking device according to claim 1, wherein the cooking device is a cooking device. 3. The serial control signal is composed of a serial control data string that is parallel-converted by the shift register and a transfer check data string of 1 bit or more for checking the transfer result of the serial control data. The cooking device according to claim 1, wherein the cooking device is a cooking device.