JPH0868843A - Pulse receiver - Google Patents

Abstract

PURPOSE: To realize a stabilized gain control by generating a pulse signal corresponding to the number of output pulses from a pulse decoder and adding a decoded pulse envelope signal to the number of pulse signal thereby releasing the blocking phenomenon quickly. CONSTITUTION: In order to control the gain such that the number of output pulses from a receiver does not exceed a predetermined value, the number of output pulse signals 22 from a pulse decoder 8 is counted by means of decoder counter 18. An output signal 23 from the counter 18 IS fed to an adder 19 along with a pulse envelope signal 15 from the pulse decoder 8. An output signal 24 from the adder 19 is fed to a circuit 9 for producing a gain control signal 16. The gain control signal 16 is used for controlling the gains of a high frequency amplifier circuit 2 and an intermediate frequency amplifier circuit 5 to restrict the number of received pulse signals 14 within a predetermined value.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pulse receiving apparatus for receiving an encoded pulse signal, more specifically a DME.
The present invention relates to an airborne pulse receiving device in a distance measurement system or a Takan navigation system.

[0002]

2. Description of the Related Art FIG. 2 is a block circuit diagram showing a conventional pulse receiving apparatus of this kind.

This pulse receiving device, as shown in FIG.
It comprises an antenna 1, a high frequency amplifier circuit 2, a mixer 3, a local frequency oscillator 4, an intermediate frequency amplifier 5, a detector 6, a pulse amplifier 7, an encoding pulse decoder 8, a gain control circuit 9, and a second detector 10. Is done. The pulse receiving apparatus shown in FIG. 2 has a pulse interval of 12 μS, a pulse width of 3.
5 μS and pulse number 700-2700PULSESP
AIR PER SECOND (for DME distance measurement system) or 20-3600PULSESPAI
A pulse amplitude modulation signal composed of coded pulses of R PER SECOND (in the case of the Takan navigation system) is received, and the received coded pulse signal is composited (decoded) by a coded pulse coder 8 to obtain the coded pulse. Form the envelope signal 15 of.

The composite pulse envelope signal 15 is supplied to the gain control circuit 9 and integrated by the gain control circuit 9 to form a gain control signal 16 corresponding to the signal strength of the input reception signal. Then, the gains of the high frequency amplifier circuit 2 and the intermediate frequency amplifier circuit 5 are controlled by the gain control signal 16.

As a pulse receiving apparatus, for example, Japanese Patent Application Laid-Open
No. 154884 and Japanese Utility Model Laid-Open No. 57-182183.

[0006]

This pulse receiving apparatus is used when the distance between the receiving point and the transmitting station is short, when the power is turned on or when the channel is switched, or when the operation is switched to the air-to-air mode operation of the Takan navigation system. Or a strong level signal is often suddenly received due to the influence of the attitude of the airframe, obstacles, or the like. In this way, when a signal with a strong level is suddenly received, the gain control of the signal amplification system by the gain control system is not exerted, the signal waveform of the output of the receiving device is saturated, and an obstacle that prevents the encoded pulse from being detected, that is, blocking The phenomenon occurs and continues.

This phenomenon is caused by the fact that a high-level signal applied from the antenna 1 in FIG. 2 is applied to the intermediate frequency amplifier 5 by the action of the high frequency amplifier circuit 2, the mixer 3, and the local frequency oscillator 4, and the intermediate frequency amplifier output 11 Saturates, the detector output 12 also saturates, and the coded received pulse cannot be decoded by the coded pulse decoder 8, and the gain control circuit 9
Occurs to control the gains of the high frequency amplifier circuit 2 and the intermediate wave amplifier 5 in the maximum direction.

In order to eliminate this obstacle, a non-saturated intermediate frequency signal is extracted from an intermediate stage of an intermediate frequency amplifier 5 in which intermediate frequency amplifier circuits are conventionally cascaded in multiple stages, and the unsaturated intermediate frequency signal is converted into a second signal. Detection is performed by the detector 10, the detection signal output from the second detector 10 is combined with the output of the detector 6,
The coded pulse combiner 8 decodes the coded pulse signal from this composite signal, and the coded pulse signal is added to the input of the gain control circuit 9 so that the gain control operation can be recovered. However, according to this means, when the linearity of the intermediate frequency amplifier 5 or the like is not sufficient, that is, when the signal amplification circuit or the detection circuit is easily saturated, the output of the detector 6 and the output of the second detector 10 are combined. Since the signal is saturated, the coded pulse combiner 8 cannot decode the coded pulse. Further, in the intermediate stage of the intermediate frequency amplifier 5, the intermediate frequency amplifier 5 is prevented from being saturated even at a strong input signal level.
There is also a problem that a skilled person is required to adjust the temperature, and the adjustment takes time.

In the conventional pulse receiver for onboard aircraft of the DME and Takan navigation systems, azimuth measurement or distance measurement, or both of them are measured from the decoded pulse signal due to the persistent blocking phenomenon, and the result is measured. If the signal cannot be obtained, a means for canceling the blocking phenomenon by repeating an operation of initializing the gain control signal at predetermined time intervals and sweeping the gain of the receiver from the minimum state until a normal signal can be received is employed. I was

However, even if this means is used, in the air-to-air mode of the Takan navigation system, in addition to the encoded pulse signal corresponding to the inquiry signal from the other aircraft, the response signal to the inquiry signal of the own aircraft is a single pulse signal. The distance is measured from this single pulse signal, and the distance measurement is performed from the monopulse signal that is saturated with respect to the interrogation signal of the own device even when the blocking phenomenon of the receiver occurs and continues. As a result, a negative value is measured with respect to a true distance value, and there is a problem that a distance error becomes large.

It is an object of the present invention to eliminate the blocking phenomenon quickly even when a strong level signal is suddenly applied and the linearity of a receiver output circuit and a circuit below a detector cannot be sufficiently obtained, thereby achieving a stable gain. An object of the present invention is to provide a pulse receiving device in which control is performed.

[0012]

In order to solve the above problems, the present invention provides the following means.

A high frequency signal amplitude-modulated by the coded pulse is amplified by a high frequency amplifier circuit, and the output of the high frequency amplifier circuit is mixed with the local oscillation signal of the output of the local oscillator by a mixer to generate an intermediate frequency signal, The intermediate frequency signal is amplified by an intermediate frequency amplifier, the intermediate frequency signal of the output of the intermediate frequency amplifier is detected by a wave detector, the output of the wave detector is received by a coded pulse decoder, and the coded pulse is decoded. A decoded pulse and a decoded pulse envelope signal in which peaks of the decoded pulse are consecutively generated, and the decoded pulse and the decoded pulse are output from the first and second output terminals of the coded pulse decoder. Each of the envelope signals is output, the signal output from the second output terminal of the coded pulse decoder is guided to an input terminal of a gain control circuit, and the gain control circuit causes the first signal of the coded pulse decoder to be output. A gain control signal based on the signal output from the output terminal of the high frequency amplifier circuit or the intermediate frequency amplifier is controlled by the gain control signal, and the gain of the encoded pulse amplitude modulation high frequency signal is controlled. In a pulse receiving apparatus capable of obtaining the decoded pulse envelope signal even if the level fluctuates in a wide range, a signal corresponding to the number of pulses in the output signal of the coded pulse decoder is generated as a pulse number signal. And a decoder for adding the decoded pulse envelope signal and the pulse number signal, and the output signal of the adder is input to the gain control circuit. Pulse receiving circuit.

The decoding pulse counter generates a decoding pulse count limit detection signal when the number of pulses of the output signal of the first output terminal exceeds a predetermined value, and outputs the decoding pulse count limit detection signal. The pulse receiving circuit according to claim 1, further comprising a gain control initializing circuit that initializes the gain control circuit when receiving the signal, and sweeps the gain from a minimum value.

An operation / control unit for controlling the gain control initialization circuit at the time of power-on, at the time of frequency switching, or at least one of mode switching, and initializing the gain control circuit is provided. The pulse receiving circuit according to the above.

[0016]

The present invention utilizes the fact that when a blocking phenomenon occurs, the number of decoding pulses output from the coding pulse decoder is extremely increased due to noise. The number of decoding pulses is counted by a decoding pulse counter, and when the counted value exceeds a predetermined value, the gain control circuit is initialized and the blocking phenomenon is quickly canceled by sweeping from the minimum gain.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in more detail below with reference to the drawings.

FIG. 1 is a block circuit diagram showing an embodiment of a pulse receiving apparatus according to the present invention. This pulse receiving device includes an antenna 1, a high frequency amplifier circuit 2, a mixer 3, a local frequency oscillator 4, an intermediate frequency amplifier 5, a wave detector 6, and a pulse amplifier 7 as in the device of FIG. , A coded pulse decoder 8 and a gain control circuit 9 are normally provided from the transmitting station with a pulse interval of 12 μS, a pulse width of 3.5 μS and a pulse number of 700 to 2700 PULSES PAIR PER SECOND (in the case of a DME distance measuring system) or 20-3600 PUL
A pulse amplitude modulation signal composed of coded pulses of SES PAIR PER SECOND (in the case of the Takan navigation system) is received, the received coded pulse signal is decoded by the coded pulse encoder 8, and the decoding is performed. Form the envelope signal 15 of the pulse. This decoding pulse is a single pulse obtained by decoding the pulse pair which is the output of the pulse amplifier 7, and is output as the decoding pulse signal 22 from the coding pulse decoder 8. Envelope signal 15
Is a signal in which the peak values of the composite pulse signal 22 are connected.

When the decoded pulse envelope signal 15 is supplied to the gain control circuit 9 via the adder 19, it is integrated by the gain control circuit 9 to form a gain control signal 16 corresponding to the signal strength of the input received signal. I do. The high frequency amplifier circuit 2 and the intermediate frequency amplifier circuit 5 are controlled by the gain control signal 16.
To control the gain.

In this embodiment, in addition to the gain control corresponding to the signal strength of the input received signal, the gain control is performed so that the number of received pulses output from the receiver does not exceed a predetermined value. Formed by a decoding counter 18 which counts the decoded pulse signal 22 output from the encoded pulse decoder 8, and a decoded pulse count signal 23 output from the decoded pulse counter 18 and the encoded pulse decoder 8. And the adder 19 for adding the decoded pulse envelope signal 15 for adding the output signal 24 to the gain control circuit 9 to form the gain control signal 16. Then, this gain control signal 1
6 operates to automatically control the gains of the high frequency amplification circuit 2 and the intermediate frequency amplification circuit 5 so that the received pulse signal 14 does not exceed a predetermined pulse number (here, set to 4000 to 5000 PPS).

The circuit operation when the input signal is rapidly received from the antenna 1 at a strong level will be described.

When the input signal is rapidly received from the antenna 1 at a strong level, a pulse signal is applied to the high frequency amplifier circuit 2, the mixer 3, and the intermediate frequency amplifier circuit 5, and the response is faster than the response of the gain control circuit 9 to the intermediate level. The frequency amplification output 11 is saturated, and the amplitude detector output 12 is also saturated. The saturated pulse is supplied to the pulse amplifier 7, amplified, and then applied to the encoded pulse decoder 8. However, since the encoded pulse output from the pulse amplifier 7 is saturated, the encoded pulse decoder 8 Cannot detect a pulse pair with a predetermined pulse interval,
The decoded pulse signal 22 is not output, and the decoded pulse envelope signal 15 is not obtained.

In this case, the gain control signal 16 output from the gain control circuit 9 changes according to the response speed of the gain control circuit 9, and the gain control signal 16 causes the high frequency amplification circuit 2 and the intermediate frequency amplification circuit 5 to operate. The gain is controlled in the maximum direction. Then, finally, the gain control state is set when there is no received signal, and receiver noise appears in the received pulse signal 14 which is the output of the pulse amplifier 7 in addition to the saturated code pulse.

When this noise signal is supplied to the coded pulse decoder 8, the coded pulse decoder 8 decodes the receiver noise signal, and the noise decoded pulse signal is coded pulse counter 18 Enter and count. The decoding counter output signal 23 operates so as to reduce the gain of the receiving device so that the received pulse signal 14 does not exceed a predetermined pulse number, and the pulse number of the noise decoding pulse signal is a predetermined maximum pulse number. (Here, 5000PP
Set to S, about 100 in air-to-air mode of Takan system
(Set to 0PPS), the decoded pulse counter 18 outputs the decoded pulse count limit detection signal 25, activates the gain control initialization circuit 21, and outputs the initialization signal from the gain control initialization circuit 21. By outputting 17 and initializing the gain control circuit 9, the gain of the receiver is swept from the minimum state so that the receiver blocking phenomenon is quickly released.

When the power is turned on, when the channel, ie, the frequency is switched, or when the mode is switched, when the operation is started by the respective command signals supplied from the operation / terminating section 20, the gain control initialization circuit is provided in the same manner as described above. 2
1 is an initialization signal 1 for initializing the gain control circuit 9
7 is formed and output, and the gain control signal 16 is initialized so that the blocking phenomenon of the receiver does not occur.

[0026]

As described above in detail with reference to the embodiments, in the present invention, when a strong level signal is suddenly applied, an amplifier circuit from a high frequency amplifier circuit to an intermediate frequency amplifier and a detector below. Even when the linearity of the circuit is not sufficient (when the dynamic range is small), there is an effect that the blocking phenomenon can be quickly canceled and stable gain control can be performed.

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing an embodiment of a pulse receiving device according to the present invention.

FIG. 2 is a block circuit diagram showing a conventional pulse receiving device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Antenna 2 High frequency amplifier circuit 3 Mixer 4 Local frequency oscillator 5 Intermediate frequency amplifier 6 Detector 7 Pulse amplifier 8 Encoding pulse decoder 9 Gain control circuit 10 Second detector 11 Intermediate frequency amplification output 12 Detector output 13 Second Detector input 14 Received pulse signal 15 Decoded pulse envelope signal 16 Gain control signal 17 Gain control circuit initialization signal 18 Decoded pulse counter (integrator) 19 Adder 20 Operation / control unit 21 Gain control initialization circuit 22 Decoding Pulse signal 23 decoded pulse counter signal 24 adder output signal 25 decoded pulse count limit detection signal

Claims (3)

[Claims] 1. A high frequency signal amplitude-modulated by a coded pulse is amplified by a high frequency amplification circuit, and the output of the high frequency amplification circuit is mixed with a local oscillation signal of the output of a local oscillator by a mixer to generate an intermediate frequency signal. Then, the intermediate frequency signal is amplified by the intermediate frequency amplifier, the intermediate frequency signal of the output of the intermediate frequency amplifier is detected by the wave detector, the output of the wave detector is received by the encoding pulse decoder, and the encoded pulse is received. A decoded decoded pulse and a decoded pulse envelope signal in which peaks of the decoded pulse are connected are generated, and the decoded pulse and the decoded pulse are output from the first and second output terminals of the coded pulse decoder. Each of the encoded pulse decoders, outputs a signal output from the second output terminal of the encoded pulse decoder to an input terminal of a gain control circuit, and the gain control circuit outputs the encoded pulse decoder signal of the encoded pulse decoder. The above A gain control signal based on the signal output from the output terminal of the high frequency amplifier circuit or the intermediate frequency amplifier is controlled by the gain control signal, and the gain of the encoded pulse amplitude modulation high frequency signal is controlled. In a pulse receiving device capable of obtaining the decoded pulse envelope signal even when the level fluctuates in a wide range, a signal corresponding to the number of pulses in the output signal of the coded pulse decoder is generated as a pulse number signal. A decoded pulse counter, and an adder for adding the decoded pulse envelope signal and the pulse number signal, wherein the output signal of the adder is input to the gain control circuit. Pulse receiving circuit. 2. The decoding pulse counter according to claim 1, wherein the decoding pulse counter generates a decoding pulse count limit detection signal when the number of pulses of the output signal from the first output terminal exceeds a predetermined value. When receiving a signal,
The pulse receiving circuit according to claim 1, further comprising a gain control initialization circuit that initializes the gain control circuit and sweeps the gain from a minimum value. 3. An operation / control unit which controls the gain control initialization circuit at the time of power-on, at least frequency switching, or mode switching, and initializes the gain control circuit. The pulse receiving circuit according to claim 2, wherein: