JPH0863398A - Input/output cache - Google Patents

Abstract

PURPOSE: To provide the input/output cache with a block replacement algorithm suitable for the input/output cache. CONSTITUTION: A cache tag array 207 holds an LBU flag performing the access of read or write to the byte of the last one of a block and an NDA flag showing the block to be used by the device other than a disk for each block. A circuit 203 deciding the presence or absence of the LBU block and a circuit 205 deciding the presence or absence of the NDA block decide the presence or absence of the LBU flag and the NDA flag. By the use of the result, a block decision circuit 206 decides the replacement block.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an input / output cache in an input / output processing device located between a central processing unit and an input / output device.

[0002]

2. Description of the Related Art An input / output cache is a small-capacity, high-speed memory provided as a storage hierarchy level between a main storage device and an input / output device. Provides fast access to output devices. In the conventional cache memory, as a method of selecting the block data to be replaced when a cache miss occurs, for example, a random method or an LRU (Least Restore) method is selected.
cently Used) method. The random method is a method of randomly determining which block is to be replaced next by using a random number literally. According to this random method, the hardware for replacement control can be realized with a simple configuration. In addition, the LRU method is used to prevent a block storing high-necessity data among valid data blocks from being flushed to main memory.
Records the access status to each block in the cache,
This is a method of replacing the data of the block that has not been accessed for the longest time. According to this LRU method, since frequently used blocks remain in the cache, efficient data transfer can be performed.

Regarding these conventional block replacement methods, for example, "Nagashima, Horikoshi: Cache Memory, Information Processing, Vol.21, No.4, pp.332-340 (April 1980)".
Can be referred to.

[0004]

However, in the conventional random method, even if the data block is highly necessary,
There was a risk that it would be replaced without being considered and would be swept out to the main memory.

Even if the LRU method is used, since the operation of frequently rewriting data at the same address is rare in the input / output cache, a difference in the frequency of use between blocks is hard to be obtained. There was a problem that improvement could not be expected so much.

That is, in the data transfer of the input / output device, a large amount of data is often accessed at consecutive addresses. Rather than immediately accessing the data that has been accessed once, the data is transferred from the beginning to the end of the block once. Once accessed, the block is often unnecessary. Also, among input / output devices, there are relatively high-speed devices such as disk devices, and low-speed devices such as line systems. Therefore, in determining the replacement target block in the input / output cache, it is necessary to consider the circumstances peculiar to these input / output devices.

An object of the present invention is to solve the above-mentioned problem and to provide an input / output cache having a block replacement algorithm suitable for the input / output cache.

Another object of the present invention is to determine a block that has accessed up to the last byte in a block or a block having data from a device other than a disk device,
An object of the present invention is to determine a replacement target block utilizing a characteristic of an input / output device at the time of a cache miss.

Still another object of the present invention is to improve the data transfer performance between the main storage device and the input / output device.

[0010]

In order to solve the above problems, the input / output cache of the present invention is an input / output cache managed on a block-by-block basis, and the last byte in the block is accessed. And a final byte flag holding means for holding a final byte access flag indicating each block, and a new block in the input / output cache when a new block is secured in the input / output cache. A replacement target block determination unit that determines which of the blocks should be the replacement target block is included.

Further, another input / output cache according to the present invention includes:
Non-disk device access flag holding means for holding, for each block, a non-disk device access flag indicating an I / O cache managed for each block and indicating a block related to access by an I / O device other than the disk device When allocating a new block in the I / O cache, it is determined which block from the blocks in the I / O cache is to be replaced according to the content of the non-disk device access flag holding unit. Replacement target block determination means is included.

Another I / O cache of the present invention is
An I / O cache managed for each block, a final byte flag holding means for holding a final byte access flag for each block indicating that the byte at the final position in the block has been accessed, and a device other than the disk device. A non-disk device access flag holding unit that holds a non-disk device access flag indicating a block related to access by an I / O device for each block, and a final block when a new block is secured in the I / O cache And a replacement target block determining unit that determines which of the blocks of the input / output cache should be the replacement target block according to the contents of the byte flag holding unit and the non-disk device access flag holding unit.

Another input / output cache of the present invention is
In the replacement target block determining unit, an unused block presence / absence determining unit that determines whether or not there is a free block in the I / O cache, and a last byte in the I / O cache according to the contents of the last byte flag holding unit. Final byte used block presence / absence determining unit for determining whether or not there is a block in which a flag is set, a block status determining unit for determining the status of each block of the input / output cache, and a block for determining a replacement block And a search position holding unit that holds a search start position, the unused block presence / absence determining unit searches each block from the position held by the search position holding unit, and if there is an unused block, replaces the block And the final byte use block presence / absence determining unit determines Searches the blocks from the position held in the position holding section determines as the target block replaces the block if the last byte used block.

Further, another input / output cache according to the present invention includes:
In the replacement target block determination means, an unused block presence / absence determination portion that determines whether or not there is a free block in the input / output cache, and the input / output cache in accordance with the contents of the non-disk device access flag holding means When determining a replacement block, a non-disk device access block presence / absence determination unit that determines whether there is a block related to access by a non-disk device, a block status determination unit that determines the status of each block of the I / O cache And a search position holding unit that holds the block search start position, and the unused block presence / absence determination unit searches each block from the position held by the search position holding unit and replaces the block if there is an unused block. It is determined as the target block, and the non-disk device access block Click determining unit by exploring each block from the position held by the search position holding portion is non-disk device access block is determined as the target block replaces the block, if any.

Further, another input / output cache according to the present invention includes:
In the replacement target block determining unit, an unused block presence / absence determining unit that determines whether or not there is a free block in the I / O cache, and a last byte in the I / O cache according to the contents of the last byte flag holding unit. A final byte used block presence / absence determining unit that determines whether there is a block in which a flag is set, and a block related to access by the non-disk device in the I / O cache according to the content of the non-disk device access flag holding unit. A non-disk device access block presence / absence determining unit for determining whether or not there is a block status determining unit for determining the status of each block of the input / output cache, and a block search start position for determining a replacement block are held. Including the search position holding unit, the unused block presence / absence judgment Unit searches each block from the position held by the search position holding unit, and if there is an unused block, the block is determined as a replacement target block, and the last byte used block presence / absence determination unit holds the search position holding unit. Each block is searched from the position to be searched, and if there is a last byte used block, the block is determined as a replacement target block, and the non-disk device access block presence / absence determination unit searches each block from the position held by the search position holding unit. If there is a non-disk device access block, the block is determined as a replacement target block.

Further, another input / output cache according to the present invention includes:
It has a data array for storing data and a tag array for storing addresses and control information corresponding to the data array, and the control information includes the final byte flag holding means and the non-disk device access flag holding means. .

Further, another input / output cache according to the present invention includes:
When a block of the cache is accessed with a certain number of bytes or more, the non-disk device access flag corresponding to the accessed block is set.

Further, another input / output cache according to the present invention includes:
When the cache device is not accompanied by the disk device identification signal at the time of cache access, the non-disk device access flag corresponding to the accessed block is set.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the input / output cache of the present invention will be described in detail with reference to the drawings.

Referring to FIG. 1, an input / output cache 100 according to an embodiment of the present invention includes a system bus 103 to which a central processing unit 101 and a main storage device 102 are connected, and input / output device groups 106-1 to 106-n. In the input / output processing unit 104 located between the input / output bus 105 and the input / output bus 105.

When the CPU 101 issues a transfer command from the main storage device 102 to the I / O device 106, the I / O device 106
I / O cache 1 via 11 and selector 112
Access 00. If the desired data exists in the I / O cache 100, the data is transferred to the destination I / O device 106 via the selector 114 and the I / O bus output buffer 110. If the desired data does not exist in the input / output cache 100, the request is notified to the main storage device 102 via the selector 113 and the system bus output buffer 108. The block including the requested data is read from the main storage device 102 and then stored in the input / output cache 100 via the system bus input buffer 107 and the selector 112. The requested data is sent to the destination input / output device 106 via the selector 114 and the input / output bus output buffer 110.
Also transferred to. By storing the block in the input / output cache, it becomes unnecessary to access the main storage device 102 for the data in the block thereafter.

FIG. 1 shows only a part of the input / output processing device 104 related to the input / output cache.

Referring to FIG. 2, the input / output cache 100 according to the embodiment of the present invention includes a data array 208 for storing data and a tag array 207 for storing addresses and control information corresponding to the data array 208. Contains. The input / output cache 100 is provided with a data buffer 2 for holding commands, addresses and data.
01, an unused block presence / absence determination circuit 202 for determining the presence / absence of an unused block, an LBU block presence / absence determination circuit 203 for determining the presence / absence of an LBU (Last Byte Used) block, and a block for determining the status of each block A status determination circuit 204 and an NDA block presence / absence determination circuit 20 for determining the presence / absence of an NDA (access by a device other than a disk, abbreviation for Non Disk Access)
5, a replacement block determination circuit 206 that determines a block to be replaced and issues an instruction to that effect, and a replacement pointer 209 that indicates a starting point for searching for a replacement target.
And a comparator 210 for detecting whether the block to be replaced matches the block indicated by the replacement pointer 209, and a cache control circuit 211 for controlling the cache tag array 207 and the cache data array 208. I have.

An input / output cache according to an embodiment of the present invention includes:
In the cache tag array 207, "invalid (hereinafter referred to as I)", "shared (hereinafter referred to as S)", "match /
It is assumed that the status has one of the statuses “exclusive (hereinafter, referred to as CE)” and “mismatch / exclusive (hereinafter, referred to as DE)”. If the status is "I", it indicates that no valid data is stored in that block. If "S", the block is the central processing unit 101.
It is shown that it is shared by the cache and the input / output cache 100. "CE" indicates that the block is exclusively used by the input / output cache 100 and its content matches that of the storage device. In addition, if it is “DE”, it indicates that the block is exclusively used by the input / output cache 100 and that its contents do not match those of the storage device. These statuses are due to existing technology, for example:
"Amano et al .: Parallel processing mechanism, Maruzen, pp.186-190 (198
Aug. '09) ".

The input / output cache of one embodiment of the present invention is
The cache tag array 207 further holds an LBU flag and an NDA flag for each block.

The LBU flag indicates that the last byte in the block has been accessed for reading or writing. I / O device data transfer
Often, a large amount of data is accessed at a continuous address, and rather than accessing the data once accessed again, once the block is accessed from the beginning to the end, the block may become unnecessary. Many. Therefore, this LBU flag is provided, and the block that has accessed the last byte is to be replaced.

The NDA flag indicates that the block is used by a device other than the disk device. 16-byte transfer is the mainstream for high-speed transferable disk access, and 2 bytes is the mainstream for low-speed transfer access via the line system, etc. Ejecting data from a different device allows the I / O cache to be used more efficiently. In order to set the NDA flag, for example, a method of setting the NDA flag of the block which is the access target when the input / output cache is accessed by the transfer of less than 16 bytes can be considered. Further, when the disk device is accessed, an identification signal is sent to the input / output processing device 104. If this signal is not present, it is regarded as an access by a device other than the disk device, and the block that is the access target. You may make it set the NDA flag of.

The cache control circuit 211 changes the status of the cache tag corresponding to each block according to the command and address held in the data buffer 201 and the contents of the cache tag array 207, and also changes the LBU flag and the NDA flag. Is set. Further, the cache control circuit 211 performs a process of replacing the cache tag array 207 and the cache data array 208 at the time of a cache miss in accordance with the replacement block and the replacement instruction from the replacement block determination circuit 206.

The block status determination circuit 204 refers to the data of the cache tag array 207 to determine whether the status of each block is "S" or "CE".
It is determined whether it is “DE” and the result is determined by the LBU block presence / absence determination circuit 203 and the NDA block presence / absence determination circuit 2
Send to 05.

The unused block presence / absence determination circuit 202 refers to the content corresponding to each block of the cache tag array 207 and the replacement pointer 209, and if there is a block whose status is "I", that fact and the number of the block To the replacement block determination circuit 206.

The LBU block presence / absence determination circuit 203 is provided for the LB corresponding to each block of the cache tag array 207.
By referring to the U flag, the value of the replacement pointer 209, and the status information of each block from the block status determination circuit 204, if there is a block in which the LBU flag is set, that fact is replaced by the block number and status. This is sent to the block determination circuit 206.

The NDA block presence / absence determination circuit 205 determines the ND corresponding to each block of the cache tag array 207.
By referring to the A flag, the value of the replace pointer 209, and the status information of each block from the block status determination circuit 204, if there is a block in which the NDA flag is set, that effect is replaced with the block number and status. It is sent to the block decision circuit 206. If there is no block in which the NDA flag is set, to that effect, the block number and status are
It is sent to the replacement block determination circuit 206.

The replacement block determination circuit 206 performs replacement based on the replacement pointer 209 and each determination result of the cache block by the unused block presence determination circuit 202, the LBU block presence determination circuit 203, and the NDA block presence determination circuit 205. Determine the block,
The block number and the replacement instruction are output.

When the replacement instruction is output from the replacement block determination circuit 206, the comparator 210 compares the number of the replacement block output from the replacement block determination circuit 206 with the value of the replacement pointer, and the two values match. In this case, the value of the replacement pointer 209 is increased by one.

Next, the operation of one embodiment of the input / output cache of the present invention will be described in detail with reference to the drawings.

Referring to FIG. 3 and FIG. 2, the initial state of the replacement pointer 209 is 0, indicating the head block of the cache (S301). When a cache block needs to be replaced due to a cache miss (S302), first, the replacement pointer 209 is replaced.
It is checked whether the status of the block indicated by “I” is “I” (S
303), if "I", the current replace pointer 2
The block indicated by 09 is determined as the replacement target (S
304).

If the status of the block indicated by the current replacement pointer 209 is not "I", the other blocks are searched for "I" in order from the block closest to the replacement pointer (S305). If there is a block "", the block is set as a replacement target (S306).

If there is no block of "I" in the above processing, there is no free block in the cache, and therefore the replacement target is searched from among the blocks in use. Therefore, it is determined whether there is a block that has been used up to the last byte.

The LBU flag is set, and a block with a status of "S" or "CE" is searched for in order from the block closest to the replace pointer (S30).
7) If present, the block is replaced (S3)
08). If there is no corresponding block, the status is "D.
In the block of “E”, the LBU flag is set, and the block closest to the replacement pointer is searched in order (S309). If there is a block, the block is set as a replacement target (S310). Where "S" and "CE"
The block was replaced first because, in these statuses, the same data exists in main memory,
At the time of replacement, there is no need to write back the data of the block to the main memory, so the replacement process can be performed immediately.
In the case of the block "E", since it does not match the data in the main memory, it is necessary to write back the data in the block to the main memory at the time of replacement, and the writing of this block data to the main memory must be completed. This is because the data cannot be replaced in that block.

In the above process, if there is no block using the last byte, it is determined whether or not the NDA flag is set.

The NDA flag is set, and
A search is made for a block whose status is "S" or "CE" in the order of proximity to the replacement pointer 209 (S31).
1) If there is, the block is to be replaced (S3)
12). If there is no corresponding block, the status is "D.
If there is a block of which the NDA flag is set in the block of "E", the blocks closer to the replace pointer are searched in order (S313), and if there is, the block is to be replaced (S314). Here, the status is "DE"
Is replaced, the data of the block is written to the main memory and the replacement process is performed in the same manner as the process when the LBU flag is set (S310).

In the above process, if there is no block in which the NDA flag is set, it is known that all the blocks in the cache are related to the disk. Therefore, the block whose status is "S" or "CE" is first. Is searched in order from the block closer to the replace pointer 209 (S315), and if there is, the block is determined as a replacement target (S316). If there is no corresponding block, only the block whose status is "DE" is set, and at that time, the block indicated by the replacement pointer 209 is set as a replacement target (S317).

By the above processing, the block to be replaced is determined, and the status of the block is "S".
Alternatively, if it is "CE", the replacement process is executed without writing back the data held in the block to the main memory, and if the status is "DE", the data held in the block is first written to the main memory. After that, the replacement process is executed (S318). Then, the number of the replaced block is compared with the value of the replace pointer (S
319), if different, the value of the replace pointer 109 is the same value, and if they match, the value of the replace pointer 209 is incremented by 1 (S320) to prepare for the next cache access (S302).

As described above, according to the input / output cache according to one embodiment of the present invention, the last byte in the block is accessed by providing the LBU flag and the NDA flag in each block of the cache tag array 207. A block having data by a device other than the block and the disk device is transferred to the LBU block presence / absence determination circuit 203 or ND.
It can be easily determined by the A block presence / absence determination circuit 205,
Blocks to be replaced can be determined from the viewpoint of performance emphasis.

[0045]

As is apparent from the above description, according to the present invention, the provision of the LBU flag and the NDA flag as the state of the cache memory allows the block other than the block or disk device which has accessed the last byte in the block. Blocks having data by the device can be easily identified,
Since the block to be replaced can be determined by utilizing the characteristics of the input / output device at the time of a cache miss, the data transfer performance between the main storage device and the input / output device can be improved.

[Brief description of drawings]

FIG. 1 is a diagram showing an example of an external connection of an input / output cache of the present invention.

FIG. 2 is a diagram illustrating a configuration of an embodiment of an input / output cache according to the present invention.

FIG. 3 is a diagram illustrating an operation of an input / output cache according to an embodiment of the present invention.

[Explanation of symbols]

 100 I / O cache 101 Central processing unit 102 Main storage device 103 System bus 104 I / O processing device 105 I / O bus 106 I / O device 107 System bus input buffer 108 System bus output buffer 110 I / O bus output buffer 111 I / O bus input buffer 112 to 114 selector 201 data buffer 202 unused block presence / absence determination circuit 203 LBU block presence / absence determination circuit 204 block status determination circuit 205 NDA block presence / absence determination circuit 206 replacement block determination circuit 207 cache tag array 208 cache data array 209 replace pointer 210 comparator 211 cache control circuit

Claims (6)

[Claims] 1. A final byte flag holding unit for holding a final byte access flag for each block, which indicates that the byte at the final position in the block has been accessed, in an input / output cache managed for each block, and When allocating a new block in the write-out output cache, it is determined which block is to be the replacement target block from the blocks of the input / output cache according to the content of the last byte flag holding means. And an input / output cache comprising means. 2. A non-disk device access flag that holds, for each block, a non-disk device access flag that indicates a block related to access by an I / O device other than a disk device in an I / O cache managed for each block. When a block is newly secured in the holding unit and the I / O cache, which block among the blocks of the I / O cache should be the replacement target block according to the content of the non-disk device access flag holding unit An input / output cache including replacement target block determining means for determining. 3. An I / O cache managed on a block-by-block basis, and a final byte flag holding means for holding a final byte access flag for each block indicating that the byte at the final position in the block has been accessed, and a disk. A non-disk device access flag holding unit that holds a non-disk device access flag indicating each block for access by an I / O device other than the device, and a new block in the I / O cache A replacement target block determining means for determining which block among the blocks of the input / output cache should be the replacement target block according to the contents of the final byte flag holding means and the non-disk device access flag holding means. Input / output cache characterized by including. 4. The replacement target block determination means is an unused block presence / absence determination portion that determines whether or not there is a free block in the input / output cache, and the input block is determined according to the contents of the last byte flag holding means. A final byte used block presence / absence determination unit that determines whether or not there is a block in which the final byte flag is set in the output cache, a block status determination unit that determines the status of each block of the input / output cache, and a replacement block Including a search position holding unit for holding the block search start position when determining, the unused block presence determination unit searches each block from the position held by the search position holding unit and if there is an unused block, The block is determined as the block to be replaced, and the final byte use block presence / absence determining unit is determined. Ri O cache according to claim 1, wherein the determining as the search if the position held by the position holding section last byte used block by searching each block replaces the block target block. 5. The replacement target block determining means determines whether or not there is a free block in the input / output cache, and an unused block presence / absence determining portion, and the non-disk device access flag holding means according to the contents of the non-disk device access flag holding means. A non-disk device access block presence / absence determining unit that determines whether or not there is a block related to access by a non-disk device in the I / O cache; a block status determining unit that determines the status of each block of the I / O cache; And a search position holding unit that holds a block search start position when determining a block, and the unused block presence / absence determination unit searches each block from the position held by the search position holding unit to find an unused block. For example, the block is determined as a replacement target block, and the non-disk device 3. The access block presence / absence determining unit searches each block from the position held by the search position holding unit, and if there is a non-disk device access block, determines the block as a replacement target block. I / O cache. 6. The replacement target block determination means is an unused block presence / absence determination portion that determines whether or not there is a free block in the input / output cache, and the input block is determined according to the contents of the last byte flag holding means. A final byte used block presence / absence determining unit that determines whether or not there is a block in which the last byte flag is set in the output cache, and a non-disk device in the I / O cache according to the content of the non-disk device access flag holding unit. Non-disk device access block presence / absence determining unit that determines whether or not there is a block related to access, a block status determining unit that determines the status of each block of the I / O cache, and a block search when determining a replacement block A search position holding unit for holding a start position, The block presence / absence determining unit searches each block from the position held by the search position holding unit, and if there is an unused block, determines the block as a replacement target block, and the final byte used block presence / absence determining unit determines the search position. Each block is searched from the position held by the holding unit, and if there is a last byte used block, the block is determined as a replacement target block, and the non-disk device access block presence / absence determination unit determines the position held by the search position holding unit. 4. The input / output cache according to claim 3, wherein each block is searched and if there is a non-disk device access block, the block is determined as a replacement target block.