JPH0854859A - Liquid crystal driving device - Google Patents

Abstract

PURPOSE:To provide a liquid crystal driving device properly display driving white balance of a color liquid crystal. CONSTITUTION:Pixels SR, SG, SB in a non-display area of a liquid crystal display panel are driven while changing a pulse width by a pulse width modulation circuit 35, and the transmissivities of the pixels SR, SG, SB are detected by a transmissivity detection part 40 to be stored in memories 31R, 31G, 31B together with the effective voltage pulse widths phiV of the pixels SR, SG, SB at the time. A comparison decision circuit 37 comparison calculates the optimum pulse widths by which the transmissivities of respective pixels SR, SG, SB of R, G, B in the specified transmissivity become equal based on these transmissivity detection voltages VR, VG, VB and the effective voltage pulse width phiV related to R, G, B respectively to output them to a signal side drive circuit 20 as pulse width signals phiR, phiG, phiB through a decoder 38. The signal side drive circuit 20 outputs a display drive signal to signal lines SR1, SG1, SB1 at the timing of the pulse width signals phiR, phiG, phiB.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal driving device,
More specifically, the present invention relates to a liquid crystal driving device that appropriately drives and drives the white balance of color liquid crystals.

[0002]

2. Description of the Related Art In general, a liquid crystal display device that performs multiplex driving has a liquid crystal display panel in which a plurality of signal lines and a plurality of scanning lines are formed in a matrix, and a liquid crystal is formed at an intersection of each signal line and a scanning line. Pixels are formed.

Then, a scanning drive signal is sequentially supplied from the scanning side drive circuit to each scanning line, and a display drive signal corresponding to display data is supplied from the signal side drive circuit to each signal line, and scanning is performed at that time. The liquid crystal at the intersection of the scan line and the signal line is applied with an effective voltage between the scan drive signal supplied to the scan line and the display drive signal supplied to the signal line to drive the display of the liquid crystal. .

The above-mentioned driving method is the same whether it is a black-and-white liquid crystal driving device or a color liquid crystal driving device. However, in the color liquid crystal driving device, its signal line is R, G, or B. And supplies a display drive signal to each of the R, G, and B signal lines based on the R, G, and B display data.

However, when the liquid crystal displays in color, for example, in the case of a TN or STN type color liquid crystal, as shown in FIG. 5, the effective voltage Vrms applied to the liquid crystal and the transmittance T are R, G, and When the effective voltage Vrms is larger than a certain value, the transmittance T of R, G, and B differs.

That is, in FIG. 5, the same effective voltage Vrms is applied to the R VT curve shown by the alternate long and short dash line, the G VT curve shown by the broken line, and the B VT curve shown by the solid line. However, the transmittance T is higher in the order of B, G, and R.

That is, V in the color liquid crystal display device
The −T characteristic has a characteristic (γ characteristic) that the light transmittance is different when a specific effective voltage is applied to each of the R, G, and B pixels.

As a result, in the color liquid crystal display device,
When the same effective voltage Vrms is applied to R, G and B, R,
The γ characteristic is different in each of the G and B wavelength ranges, and the result is that the chromaticity coordinates of white when the liquid crystal is fully turned on / off (particularly on side) are deviated from proper positions.

Further, the γ characteristic is greatly affected by the types and characteristics of liquid crystal and color filters, and by the temperature. Therefore, for example, in a conventional liquid crystal drive device that drives a TFT type liquid crystal display panel in an analog manner, the value of analog display data of R, G, B is adjusted for each R, G, B, and The chromaticity coordinate of white is set at an appropriate position, and no adjustment is performed in the time-division drive type liquid crystal drive device.

[0010]

However, in such a conventional liquid crystal driving device, in the analog driving type color liquid crystal driving device, in order to adjust the chromaticity coordinate of white to an appropriate position, the display is The data value was adjusted for each of R, G, and B, but no adjustment was made in the time-division drive type liquid crystal drive device.

As a result, the chromaticity coordinate of white is still displaced from the proper position, and when all is on (white lighting), white is bluish or reddish, and proper color display cannot be performed. was there.

Therefore, the present invention has been made in view of the above circumstances, and adjusts the effective voltage for each of R, G, and B with a simple circuit configuration so that the chromaticity coordinate of white is set to an appropriate position. It is an object of the present invention to provide a liquid crystal driving device that can be adjusted and can perform an appropriate color display at low cost.

[0013]

According to another aspect of the present invention, there is provided a liquid crystal driving device, wherein liquid crystal is sealed between a pair of transparent glass substrates, and R, G and B are provided on one side of the pair of transparent glass substrates.
Color filters are provided, and a plurality of R, G and B are formed by scanning lines and signal lines that are formed in a state of facing each other at positions corresponding to R, G, and B of the color filters.
A liquid crystal display panel in which G and B pixels are formed and a display drive signal having a predetermined pulse width based on display data are supplied to the signal lines of the R, G, and B pixels of the liquid crystal display panel. , R, G, and B, and a predetermined scan drive signal is supplied to the scan line to apply a predetermined effective voltage based on the display drive signal and the scan drive signal for each of R, G, and B. , G, and B drive circuits for driving the display, and the display drive signal for generating the effective voltage that makes the R, G, and B pixels at the predetermined transmissivities equal to each other. The above object is achieved by including pulse width setting means for outputting the pulse width signal generated for each of the R, G, and B signal lines to the drive circuit.

According to another aspect of the present invention, there is provided a liquid crystal driving device in which liquid crystal is sealed between a pair of transparent glass substrates, and R, G and B color filters are disposed on one side of the pair of transparent glass substrates. , A plurality of R, G, B pixels are formed by the scanning line and the signal line which are formed in a state of facing each other at the positions corresponding to R, G, B of this color filter. A liquid crystal display panel divided into a display area in which each pixel of B is driven to be displayed by display data and a transmittance detection area driven by a predetermined effective voltage; and the display area of the liquid crystal display panel. R,
A display drive signal having a predetermined pulse width is supplied to the signal lines of each of the G and B pixels based on display data, and a predetermined scan drive signal is supplied to the scan line so that R,
A drive circuit that applies a predetermined effective voltage based on the display drive signal for each of G and B and the scan drive signal to drive the respective pixels of R, G, and B to display, and a transmittance detection region of the liquid crystal display panel. Detecting means for detecting the light transmittance of each of the R, G, B pixels, and the effective voltage applied to each of the R, G, B pixels of the transmittance detected by the detecting means and the transmittance detecting area. On the basis of the above, the display drive signal for generating the effective voltage that makes the transmittances at the predetermined transmittances of the R, G, and B pixels of the display area equal to each other is set to the R, G, and B The above object is achieved by including pulse width setting means for outputting a pulse width signal generated for each signal line to the drive circuit.

In each of the above cases, for example, as described in claim 3, the pulse width setting means sets the effective voltage applied to each of the R, G, and B pixels of the transmittance detection region at a predetermined cycle. An effective voltage adjusting means for changing the width of a predetermined voltage value, and a memory for storing the effective voltage value changed by the effective voltage adjusting means and the transmittance detected by the detecting means at each of the changing effective voltages. The pulse width signal may be generated based on each effective voltage value stored in the memory and the transmittance at that time.

Further, for example, as described in claim 4, the pulse width setting means is a γ of the liquid crystal display panel.
By reducing the pulse width of the display drive signal supplied to the signal lines of the pixels of the other two colors with reference to the pulse width of the display drive signal for the pixel of the color having the lowest transmittance within the predetermined range of characteristics. , The R, G and B pixels have the same effective voltage,
It may be generated.

[0017]

According to the liquid crystal driving device of the first aspect of the present invention,
The drive circuit supplies a display drive signal having a predetermined pulse width for each R, G, B to the signal line of each pixel of R, G, B of the liquid crystal display panel for each R, G, B, and a predetermined for the scanning line. Of the R, G, and B display drive signals and a predetermined effective voltage based on the scan drive signal are applied to drive the R, G, and B pixels for display, and pulse width setting means. Is a pulse width signal that generates a display drive signal for each R, G, B signal line that generates an effective voltage that makes the R, G, B pixels at a predetermined transmittance equal to each other. Is output to the drive circuit.

Therefore, by controlling the pulse width, the transmittances of the R, G, and B pixels become the same,
The effective voltage of each pixel of R, G, B can be adjusted,
It can be adjusted so that the chromaticity coordinate of white is at the proper position. As a result, it is possible to prevent the white color from becoming bluish or reddish at the time of all-on (white lighting), and it is possible to perform an appropriate color display.

According to another aspect of the liquid crystal drive device of the present invention, the liquid crystal display panel is driven by a display area in which each pixel of R, G, B is driven to be driven by display data and a predetermined effective voltage. The liquid crystal display panel is divided into an area for detecting a transmittance and a signal line for each pixel of R, G, and B in the display area of the liquid crystal display panel, and a display circuit having a predetermined pulse width based on display data from a drive circuit. Supply the signal,
By supplying a predetermined scan drive signal to the scan line, R, G,
A predetermined effective voltage based on the display drive signal for each B and the scan drive signal is applied to drive each R, G, B pixel for display.

Then, the light transmissivity of each of the R, G, and B pixels in the transmissivity detection area of the liquid crystal display panel is detected by the detecting means, and the transmissivity and the light transmittance detecting area detected by the detecting means are detected. On the basis of the effective voltage applied to each of the R, G, and B pixels, the transmittance at a predetermined transmittance of each of the R, G, and B pixels of the display area is determined by the pulse width setting means.
A pulse width signal for generating a display drive signal for generating an effective voltage having the same value for each of the R, G, and B signal lines is output to the drive circuit.

Therefore, the R, G, and
The transmittance of B is detected by the detecting means, and the effective voltage supplied to each R, G, B of the display area is determined by the detection result.
The pulse width can be controlled more appropriately and automatically so that the respective R, G, and B have the same transmittance.

As a result, the chromaticity coordinate of white can be automatically adjusted to a more appropriate position, and all on (white lighting).
At times, it is possible to prevent white from being bluish or reddish, and it is possible to automatically perform a more appropriate color display.

In each of the above cases, for example, as described in claim 3, the pulse width setting means applies the effective voltage to each pixel of R, G, and B in the transmittance detection region at a predetermined cycle. An effective voltage adjusting means for changing the width of a predetermined voltage value, and a memory for storing the effective voltage value changed by the effective voltage adjusting means and the transmittance detected by the detecting means at each of the changing effective voltages. If the pulse width signal is generated based on the respective effective voltage values stored in the memory and the transmittance at that time, for all effective voltages when displaying the liquid crystal display panel in all gradations, With a simple circuit configuration, adjustment can be easily performed, and more appropriate color display can be performed at low cost.

Further, for example, as described in claim 4, the pulse width setting means is set to γ of the liquid crystal display panel.
By reducing the pulse width of the display drive signal supplied to the signal lines of the pixels of the other two colors with reference to the pulse width of the display drive signal for the pixel of the color having the lowest transmittance within the predetermined range of characteristics. , The R, G and B pixels have the same effective voltage,
If it is generated, the chromaticity coordinates of white when R, G, and B are all on can be adjusted to a more appropriate one in consideration of the γ characteristic of the liquid crystal and the transmittance when on. More appropriate color display can be performed.

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below with reference to the drawings. 1 to 6 are views showing an embodiment of the liquid crystal drive device of the present invention. First, the configuration of this embodiment will be described. FIG. 1 is a top view of a liquid crystal front panel 1 to which the liquid crystal drive device of this embodiment is applied, and FIG. 2 is a side view of the liquid crystal display panel 1.

In FIGS. 1 and 2, the liquid crystal display panel 1
Is a pair of transparent glass substrates 2 and 3, and polarizing plates 4 and 5 disposed outside the pair of transparent glass substrates 2 and 3, respectively.
And a display area 1A that is driven for display based on display data, and a non-display area 1B that is driven by a predetermined drive voltage. This liquid crystal display panel 1
Although not shown, the lower polarizing plate 5 serves as a backlight.
Has a white light source below, and the white light is emitted from the white light source to the display area 1A.

The outer surface of the polarizing plate 5 above the non-display area 1B,
That is, as shown in FIG. 1, on the display surface side of the liquid crystal display panel 1, at least three light receiving elements 7a, 7b, 7c are provided.
Are arranged, and the light receiving elements 7a, 7b, 7c are
It is arranged corresponding to each pixel position of R, G, and B formed in the non-display area 1B.

On the outer surface of the polarizing plate 4 below the non-display area 1B, that is, on the back surface side of the liquid crystal display panel 1, white light sources 6a, 7b are provided at positions facing the light receiving elements 7a, 7b, 7c, respectively. 6b and 6c are provided, and the white light sources 6a, 6b and 6c are covered to prevent the white light from the white light source as the backlight from irradiating the non-display portion 1B and the light receiving element 7a. , 7b, 7c
A white light source 6a, 6b, 6 is formed by using a shielding plate having a hole for transmitting white light from the white light source at a position facing the white light source.
c, or it is covered with a shielding plate so that the white light from the white light source is not irradiated to the non-display portion 1B, and the white light source is provided from the white light source at a position facing the light receiving elements 7a, 7b, 7c. By guiding the white light of
The white light sources 6a, 6b, 6c may be used.

The light receiving elements 7a, 7b and 7c are, for example, phototransistors, and a constant DC voltage is applied to their collectors. Therefore, the light receiving elements 7a, 7b, 7c using phototransistors are
White light sources 6a, 6b, 6 that have passed through the R, G, B pixels
When the light from c is incident, a voltage corresponding to the amount of received light is generated in the emitter.

The liquid crystal display panel 1 is shown in detail in FIG.
It is configured as shown in. That is, in the liquid crystal display panel 1, a liquid crystal 9 is sealed between the transparent glass substrates 2 and 3 in a state of being sealed with a sealant 8. The liquid crystal 9 is, for example, an STN type color liquid crystal. Normally black ones are used.

On the inner surface of the upper transparent glass substrate 3, IT
The scanning line 10 is formed of O, and the alignment layer 11 is formed on the scanning line 10. R, G, B color filters 12R, 12G, 12G are formed on the inner surface of the lower transparent glass substrate 2, and a signal line 13 is formed of ITO on the color filters 12R, 12G, 12B. ing.

The lower transparent glass substrate 2, the color filters 12R, 12G, 12B and the signal line 13 are also provided.
An alignment layer 14 is formed so as to cover the. In the liquid crystal display panel 1, the alignment angle of the liquid crystal 9 changes according to the magnitude of the effective voltage applied between the scanning line 10 and the signal line 13 according to the display data. The white light from the backlight that has passed through the polarizing plate 4 is polarized according to the orientation angle of the liquid crystal 9 and is incident on the upper polarizing plate 5. The amount of light passing through the polarizing plate 5 is determined by the polarization angle of the light and the polarization direction of the polarizing plate 5 at this time.

As described above, the liquid crystal display panel 1 is integrally formed with the display area 1A which is driven for display based on the display data and the non-display area 1B which is driven by a predetermined drive voltage. Has been done.

The liquid crystal display panel 1 includes a liquid crystal driving device formed on a transparent glass substrate 2, specifically, a scanning side driving circuit (not shown) and a signal side driving circuit 20 shown in FIG.
The display side is driven by, and the scanning side drive circuit outputs the sequential scanning drive signal to the scanning line 10,
The scan lines 10 are sequentially scanned and driven.

The signal side drive circuit 20 includes a voltage setting circuit 3
From 0, as will be described later, pulse width signals φR and φG selected so that the R, G, and B pixels have the same transmittance.
, ΦB are supplied, and the signal side drive circuit 20 generates a display drive signal whose pulse width is controlled on the basis of the pulse width signals φR, φG, φB and display data, and supplies the display drive signal to the signal line. The R, G, and B pixels at the intersections of the scan line and the signal line are display-driven in accordance with the effective voltage generated between the scan drive signal and the scan drive signal.

The voltage setting circuit 30 includes a memory section 31, a pulse width setting section 32, a pulse width selection switch section 33, etc., and has an effective voltage such that the R, G, and B pixels have the same transmittance. A pulse width signal φR, a pulse width signal φG and a pulse width signal φB for selecting a display drive signal are generated and output to the signal side drive circuit 20.

As will be described later, the voltage setting circuit 30 receives the transmittance detection voltages VR, VG, VB of R, G, B respectively from the transmittance detector 40, and the transmittance detector 4
0 is a white light source unit 6 including the white light sources 6a, 6b, and 6c for R, G, and B, and a pixel including pixels R, SG, and SB for R, G, and B for detecting the transmittance of the non-display area 1B. Part 41
And a light receiving portion 7 including the above-described R, G, and B light receiving elements 7a, 7b, and 7c.

In any of the above configurations, the white light sources 6a, 6b and 6c apply the same amount of white light as the display area 1A to the R, G and B pixels SR, SG and SB of the non-display area 1B. The light that has been emitted and has passed through the pixels SR, SG, and SB is emitted to the light receiving elements 7a, 7b, and 7c, respectively.

As described above, each of the light receiving elements 7a, 7b, 7c is a phototransistor, and the constant DC voltage V1 is applied to its collector. Each light receiving element 7a, 7
b and 7c, when light transmitted through the pixels SR, SG and SB is incident, a voltage corresponding to the amount of light received by the emitter, that is, a voltage corresponding to the transmittance of each pixel SR, SG and SB,
To generate the transmittance detection voltages VR, VG, and VB, respectively.
Is output to the memory unit 31 of the voltage setting circuit 30.

The memory section 31 is provided with three memories 31R, 31G and 31B for R, G and B, respectively.
1R, 31G and 31B are the corresponding light receiving elements 7a,
Transmittance detection voltages VR, VG input from 7b, 7c
It has a detection voltage storage area for storing VB and an effective voltage storage area for storing an effective voltage value for driving each pixel SR, SG, SB of the pixel unit 41 of the non-display area 1B.

Transmittance detection voltages VR, VG, VB are respectively inputted from the light receiving elements 7a, 7b, 7c to the memories 31R, 31G, 31B, and a pulse width modulation circuit of a pulse width setting section 32 described later. The effective voltage pulse width φV that determines the effective voltage value for driving each pixel SR, SG, SB of the pixel portion 41 of the non-display area 1B is input from 35, and each of the memories 31R, 31G, 31B has the light receiving element 7a. , 7b, 7c input transmittance detection voltage V
R, VG, and VB are stored in the detection voltage storage area, and the effective voltage pulse width φV input from the pulse width modulation circuit 35 is stored in the effective voltage storage area.

Each of the memories 31R, 31G and 31B outputs the stored transmittance detection voltages VR, VG and VB and the effective voltage pulse width φV to the comparison / determination circuit 37 of the pulse width setting unit 32 which will be described later.

That is, the voltage-transmittance characteristic (V-
As described above, the T characteristic) is different depending on the liquid crystal, the color filter, the temperature, and the like. Therefore, the memory unit 31 includes pixels SR, SG, and SB for the pixels SR, SG, and SB in the non-display area 1B.
The VT characteristic of SB is stored as the transmittance detection voltages VR, VG, VB of the light receiving elements 7a, 7b, 7c, and the effective voltage value driving the pixels SR, SG, SB at that time is an effective voltage pulse. It is stored as the width φV.

The pulse width setting section 32 includes a clock generation circuit 34, a pulse width modulation circuit 35, and a pixel drive selection circuit 3.
6, comparison / determination circuit 37, decoder 38, and counter 39
And so on.

The clock generation circuit 34 is provided with an oscillation circuit, a frequency divider circuit, etc., and generates the clock signal φ which is the most basic in generating various display drive signals necessary for driving the liquid crystal display panel 1. , Counter 39 and pulse width modulation circuit 35.

The pulse width modulation circuit 35, based on the clock signal φ input from the clock generation circuit 34, causes the pixels SR, SG and SB of the non-display area 1B to have a specific gradation from "0" gradation, for example, The pulse width required to generate an effective voltage up to all gradations is periodically changed and output as an effective voltage pulse width φV to the pixel drive selection circuit 36 and each memory 31R, 31G, 31B of the memory section 31.

In the pixel drive selection circuit 36, a display drive signal is generated by the effective voltage pulse width φV supplied from the pulse width modulation circuit 35, and each pixel SR, S in the non-display area 1B is generated.
Output to the signal line corresponding to G and SB. Each of the non-display areas 1B is generated by an effective voltage generated between the display drive signal supplied from the pixel drive selection circuit 36 to the signal line and the scan drive signal supplied from the scan side drive circuit (not shown) to the scan line. The pixels SR, SG, SB are display-driven, and the white light projected from the white light sources 6a, 6b, 6c is display-driven by the effective voltage of each pixel S.
Light receiving elements 7a, 7b, 7c are transmitted through R, SG, SB.
Each memory 31R of the memory unit 31 detected by
The transmittance detection voltages VR, VG, VB are stored in 31G, 31B.

The counter 39 has the clock generation circuit 3 described above.
The clock signal φ input from 4 is divided to generate a signal having a predetermined cycle and output to the decoder 38. The comparison / determination circuit 37 includes a memory for storing data of an optimum pulse width that makes R, G, and B equal to each other at a specific transmittance with respect to the pulse width for driving the display of the pixel, and the comparison. As described above, the determination circuit 37 receives the transmittance detection voltages VR, VG, VB input from the memories 31R, 31G, 31B of the memory unit 31 and the effective voltage pulse width φV at that time.

The comparison / judgment circuit 37 includes the memories 31.
Transmittance detection voltage V input from R, 31G, and 31B
Based on R, VG, VB and the effective voltage pulse width φV, the transmittance in each pixel SR, SG, SB of R, G, B at a specific transmittance is optimized by taking the data in the memory into consideration. Pulse widths are compared and calculated for each of R, G, and B, and output to the decoder 38.

In this case, the comparison / determination circuit 37 is, for example,
The pulse widths of the display drive signals for the pixels of the other two colors are calculated with reference to the pulse width of the display drive signal for the pixel of the color having the lowest transmittance.

For example, generally, as shown in FIGS. 5A to 5C, since the transmittance of the R pixel is the lowest, the comparison / determination circuit 37 uses the pulse width signal φR of the R pixel as a reference. The pulse width signals φG and φB of the other G and B pixels are determined and output to the latch circuits LR, LG and LB.

The decoder 38 is a circuit for generating and selecting the pulse width of the display drive signal, and has the R, G, and B pulse width signals input from the comparison / determination circuit 37 and the predetermined period input from the counter 39. Depending on the signal, R, G,
The pulse width signals φR, φG of the respective display drive signals of B,
φ B is generated and output to the signal side drive circuit 20.

The decoder 38 receives the pulse width selection signal from the pulse width selection switch unit 33, and the decoder 38 receives the pulse width selection signal from the pulse width selection switch unit 33 when comparing and judging. Circuit 3
Pulse width selection switch section 3 rather than the pulse width signal from 7
The pulse width selection signals from 3 are given priority to generate the pulse width signals φR, φG, and φB of the display drive signal, and the pulse width signals φR, φG, and φB are output to the signal side drive circuit 20.

The pulse width selection switch unit 33 is for artificially adjusting the color tone balance according to the γ characteristics of R, G and B, and the pulse width selection switches 33R and 33R for R, G and B are provided. It is equipped with 33G and 33B.

Each pulse width selection switch 33R, 33G,
The pulse width of 33B is set by a switch operation, and when an on / off switch (not shown) is turned on, the pulse width signal corresponding to the set pulse width is output to the decoder 38.

As described above, when the pulse width signal is input from the pulse width selection switch section 33, the decoder 38
Gives priority to the pulse width signals from the pulse width selection switches 33R, 33G and 33B to generate the pulse width signals φR, φG and φB of the display drive signal and output them to the signal side drive circuit 20.

The signal side drive circuit 20 has latch circuits LR, LG, LB, sampling circuits SR, SG, SB, level conversion circuits LSR, LSG, for R, G, B respectively.
The multiplexers MPS, MPG, MPB, etc. are provided with signal lines SR1, SG connected to the pixels SR, SG, SB of the non-display area 1B of the liquid crystal display panel 1, respectively.
1, SB1 (indicated as a signal line 13 in FIG. 3).

To the latch circuits LR, LG, LB, the pulse width signals φR, φG, φB are input from the decoder 38 of the pulse width setting unit 32, respectively, and the latch signal L is input to the latch circuits LR, LG. , LB latch the pulse width signals φR, φG, φB in synchronization with the latch signal L and output them to the sampling circuits SR, SG, SB.

The sampling circuits SR, SG and SB include
Pulse width signals φR from the latch circuits LR, LG, LB,
In addition to .phi.G and .phi.B, display data D and scan inversion signal M are input, and sampling clocks ST1, ST2, ST3 for R, G, B are also input.

Of these, the sampling circuit SR samples the display data D in synchronization with the sampling clock ST1, and when either the sampled display data D or the scan inversion signal M is "1", the operation signal of "1". Is output to the level conversion circuit LSR at the timing determined by the pulse width signal φR (see FIG. 6).

The sampling circuit SG samples the display data D in synchronization with the sampling clock ST2, and when either the sampled display data D or the scan inversion signal M is "1", the operation signal of "1". Is output to the level conversion circuit LSG at the timing determined by the pulse width signal φ G (see FIG. 6).

Similarly, the sampling circuit SB samples the display data D in synchronization with the sampling clock ST3, and when either of the sampled display data D and the scan inversion signal M input at that time is "1",
The operation signal of "1" is output to the level conversion circuit LSB at the timing determined by the pulse width signal φB (see FIG. 6).

Level conversion circuits LSR, LSG, LSB
Increase the level of the operation signal input from each of the sampling circuits SR, SG, SB to increase the multiplexer MP.
Output to S, MPG and MPB.

The multiplexers MPS, MPG, MPB are supplied with drive voltages V1, V2 from a power supply circuit (not shown), and the multiplexers MPS, MPG, MPB are supplied.
Are corresponding level conversion circuits LSR, LSG,
The drive voltage V is set according to the value of the operation signal input from the LSB.
1, V2 (V1> V2) are selected and output to the corresponding signal lines SR1, SG1 and SB1 as display drive signals.

That is, each multiplexer MPS, MP
G and MPB are level conversion circuits LSR, LSG, and LSB.
When the operation signal input from is “1”, for example,
The drive voltage V1 is selected and output as the display drive signal to the signal lines SR1, SG1 and SB1, and the operation signal is "0".
In the case of, the drive voltage V2 is selected and output as the display drive signal to the signal lines SR1, SG1 and SB1.

The pulse width setting section 32 has a timing when the level value of this operation signal is "1" or "0".
Are controlled as the timing of the pulse width signals φR, φG, and φB, and the output timing of the drive voltages V1 and V2 of the display drive signal is controlled by this operation signal.

Therefore, the voltage value between the scanning drive signal supplied to the scanning line and the display drive signal supplied to the signal line whose pulse width is controlled, that is, the effective voltage value is R, G, B transmittance. Are controlled appropriately so that

Next, the operation of this embodiment will be described. As described above, the liquid crystal has different γ characteristics of R, G, and B, and the relationship between the effective voltage Vrms and the transmittance T in each wavelength region of R, G, and B is as shown in FIG. However, it will be different. The γ characteristic is shown in FIGS. 5A to 5C by the VT characteristic curves of the liquid crystal A, the liquid crystal B and the liquid crystal C which are different from each other.
As shown in FIG. 5, the gamma characteristics differ due to the different liquid crystals, and the VT characteristic curves also differ. Further, even if the same liquid crystal has the same γ characteristic, the VT characteristic curve changes due to the influence of the color filter and the temperature, the color filter being different, and the temperature being changed. In FIGS. 5A to 5C, a solid line indicates a pixel of B (Blue), and an alternate long and short dash line indicates G (Gre).
en) pixel and the broken line indicate the VT characteristic curve of the R (Red) pixel.

In particular, when normally black is used as the liquid crystal 9 as in the liquid crystal display panel 1 of the present embodiment, as described above, the transmittance T at the time of turning on is as shown in FIG. It can be seen that R, G, and B are different.

As described above, when the transmissivity T when turned on is different, each of the R, G, and B signal lines SR of the liquid crystal display panel 1 is
When a display drive signal having the same voltage value is applied to 1, SG1 and SB1, when the scan drive signal is constant, the effective voltage Vrms having the same value is applied to all the signal lines SR1, SG1 and SB1 of R, G and B, for example, The effective voltage VB1 of FIG. 5A is applied, and as can be seen from FIG. 5A, the transmittance T is different in the order of the sizes of B, G, and R (B>G> R).

As a result, when the liquid crystal display panel 1 is turned on, the transmittances T are different for R, G, and B, and bluish or reddish when all white, resulting in an unnatural white display.

Therefore, in the present embodiment, the liquid crystal display panel 1
As shown in FIG. 5, the VT characteristic curve of the liquid crystal 9 of
When the magnitudes of G and R are different in the order of magnitude (B>G> R), the effective voltage V due to the R display drive signal SR having the lowest transmittance T
By setting the value of rms as a reference and reducing the value of the effective voltage due to the remaining B and G display drive signals in accordance with the difference with the transmittance T of R, all of R, G, and B at the time of ON are turned on. The transmittance T is adjusted to be the same.

Then, the adjustment of the effective voltage is performed by detecting the transmittances of the pixels SR, SG and SB of the R, G and B pixels of the non-display area 1B by the transmittance detecting section 40, and the memory section 31 of the non-display area 1B.
The effective voltage pulse width φV for driving the pixels SR, SG, SB of B is associated with the transmittance detection voltages VR, VG, VB, and the effective voltage pulse width φV and the transmittance detection voltages VR, VG,
Based on VB, the pulse width setting unit 32 sets the pulse width signals φR, φG, and φB so that the R, G, and B pixels of the display area 1A have the same transmittance, and the signal side drive circuit 20. Output to. The signal side drive circuit 20 controls the pulse width of the display drive signal supplied to each of the R, G and B signal lines SR1, SG1 and SB1 based on the pulse width signals φR, φG and φB.

That is, the transmittance detection section 40 is driven by the pulse width modulation circuit 35 of the pulse width setting section 32 and the pixel drive selection circuit 36 while changing the pulse width in a predetermined cycle to drive the pixel SR in the non-display area 1B. White light source 6 for SG and SB
White light is emitted from a, 6b, and 6c, and each pixel SR, S
The light transmitted through G and SB is received by the light receiving elements 7a, 7b and 7c and output to the memories 31R, 31G and 31B as the transmittance detection voltages VR, VG and VB.

The memories 31R, 31G and 31B store the transmittance detection voltages VR, VG and VB and the effective voltage pulse width φV at that time and output them to the comparison / determination circuit 37 of the pulse width setting section 32 in association with each other. To do.

The comparison / decision circuit 37 includes the memories 31R and 3R.
Transmittance detection voltages VR, V input from 1G, 31B
Based on G, VB and the effective voltage pulse width φV, the optimum pulse widths at which the transmittances of the pixels SR, SG, SB of R, G, B at a specific transmittance are equal are calculated for each of R, G, B. Output to the decoder 38, and the decoder 38 outputs the pulse width selection switches 33R, 33G, 33B.
Unless the pulse width selection signal is input from the R, G, and B pulse width signals input from the comparison / determination circuit 37 and the signal of the predetermined cycle input from the counter 39,
R, G, B latch circuits LR, L of the signal side drive circuit 20 are generated by generating pulse width signals φ R, φ G, φ B for determining the output timings of the R, G, B display drive signals.
Output to G and LB respectively.

In this case, the comparison / determination circuit 37, for example,
The pulse widths of the display drive signals for the pixels of the other two colors are calculated with reference to the pulse width of the display drive signal for the pixel of the color having the lowest transmittance. For example, generally, FIGS.
Since the R pixel has the lowest transmissivity, the comparison and determination circuit 37 determines the pulse width signals φG and φB of the other G and B pixels with reference to the pulse width signal φR of the R pixel. Then, the data is output to the latch circuits LR, LG, LB.

The latch circuits LR, LG, LB latch the pulse width signals φR, φG, φB in synchronization with the latch signal L and output them to the sampling circuits SR, SG, SB, and the sampling circuits SR, SG, SB. Is for sampling the display data D in synchronization with the sampling clocks ST1, ST2, ST3, and outputting an operation signal of "1" or "0" corresponding to the value of the sampled display data D and the scan inversion signal M as a pulse width signal. Output to multiplexers MPS, MPG, MPB via level conversion circuits LSR, LSG, LSB in synchronization with φR, φG, φB.

Multiplexers MPS, MPG, MPB
Selects one of the drive voltages V1 and V2 according to the value of the operation signal input from the sampling circuits SR, SG and SB via the level conversion circuits LSR, LSG and LSB to select the signal lines SR1 and SG1. , SB1 (in FIG. 3,
It is labeled signal line 13. ) As a display drive signal.

The pulse width (output timing) of the operation signal whose level values are "1" and "0" is set by the pulse width setting unit 32 to the pulse width signals φR, φG, φB.
Is controlled as the pulse width (output timing) of
Drive voltages V1 and V2 of the display drive signal are generated by this operation signal.
Pulse width is controlled.

Therefore, as shown in FIG. 6, the high / low timing of the scan drive signal supplied to the scan line 10 and the pulse width controlled, ie, output, supplied to the signal lines SR1, SG1 and SB1. The pulse width is appropriately controlled so that the voltage value between the timing-controlled display drive signal, that is, the effective voltage value has the same R, G, and B transmittance.

When the operator wants to adjust the effective voltage while watching the display state of the display area 1A of the liquid crystal display panel 1, he / she operates the pulse width selection switches 33R, 33G, 33B of the pulse width selection switch section 33. Thus, the color adjustment of the liquid crystal display panel 1 can be performed.

That is, the decoder 38 of the pulse width setting section 32 has the pulse width selection switches 33R, 33G and 33B.
When the pulse width selection signal is input from the pulse width selection signal from the comparison / determination circuit 37, the pulse width selection signal from the pulse width selection switches 33R, 33G, and 33B is given priority over the pulse width selection signal from the comparison / determination circuit 37. The pulse width signals .phi.R, .phi.G, .phi.B are generated from the signal from the counter 39 from the counter 39 in a predetermined cycle and output to the signal side drive circuit 20.

The signal side drive circuit 20 supplies the display drive signal whose pulse width is controlled based on the pulse width signals φR, φG and φB as described above to the signal lines SR1, SG1 and S.
Output to B1.

As described above, according to this embodiment, the signal side drive circuit 20 causes the display data D to be supplied to the signal lines SR1, SG1 and SB1 of the R, G and B pixels of the liquid crystal display panel 1.
Based on the display drive signal of a predetermined pulse width, R, G, B
The scanning side drive circuit supplies a predetermined scan drive signal to the scan line 10 and applies a predetermined effective voltage based on the display drive signal and the scan drive signal for each of R, G and B. Each pixel of R, G, B is driven to be displayed, and the pulse width setting unit (pulse width setting means) 32 makes the transmittances of the pixels of R, G, B at a predetermined transmittance equal to each other. The pulse width signals φR, φG, and φB for generating the display drive signal for generating the voltage for each of the R, G, and B signal lines SR1, SG1, and SB1 are output to the signal side drive circuit 20.

Therefore, the effective voltage of each pixel of R, G, B can be adjusted so that the transmittance of each pixel of R, G, B becomes the same, and the chromaticity coordinate of white is at a proper position. Can be adjusted to. As a result, it is possible to prevent the white color from becoming bluish or reddish at the time of all-on (white lighting), and it is possible to perform an appropriate color display.

Further, according to this embodiment, the liquid crystal display panel 1 is provided with a display area 1A in which each pixel of R, G, B is driven to be driven by the display data D, and a non-display in which it is driven by a predetermined effective voltage. The liquid crystal display panel 1 is divided into a region (transmittance detection region) 1B and signal lines SR1, SG1 and SB of respective pixels of R, G and B of the display region 1A of the liquid crystal display panel 1.
1, a display drive signal having a predetermined pulse width is supplied from the signal side drive circuit 20 based on the display data D, and
By supplying a predetermined scan driving signal to the scan line 10, R,
A predetermined effective voltage based on the display drive signal for each of G and B and the scan drive signal is applied to drive the display of each pixel of R, G, and B. Then, R of the non-display area 1B of the liquid crystal display panel 1,
The light transmissivity of each of the G and B pixels is detected by the detection unit (detection means) 40, and the transmissivity detected by the light transmissivity detection unit 40 and each of R, G, and B of the non-display area 1B. Based on the effective voltage applied to the pixel, the pulse width setting unit 32 generates an effective voltage in which the transmittances at the predetermined transmittances of the R, G, and B pixels of the display area 1A are equal to each other. The pulse width signals φR, φG, and φB for causing the signal side drive circuit 20 to generate a display drive signal for each of the R, G, and B signal lines are output to the signal side drive circuit 20.

Therefore, the R, G, and
The transmittance of B is detected by the transmittance detector 40, and the effective voltage supplied to each R, G, B of the display area 1A is determined by the transmittance detection unit 40, and the transmittance of each R, G, B pixel is It can be better adjusted automatically to be the same.

As a result, the chromaticity coordinate of white can be automatically adjusted to a more appropriate position, and all on (white lighting).
At times, it is possible to prevent white from being bluish or reddish, and it is possible to automatically perform a more appropriate color display.

Further, according to the present embodiment, the pulse width setting section 32 changes the effective voltage applied to each pixel of R, G and B of the non-display area 1B in a predetermined voltage value width in a predetermined cycle. A pulse width modulation circuit (effective voltage adjusting means) 35, a memory 31R for storing the effective voltage value changed by the pulse width modulation circuit 35 and the transmittance detected by the transmittance detector 40 at each of the changing effective voltages, A memory unit 31 including 31G and 31B, and the memories 31R and 31G,
Since the pulse width signals φR, φG, and φB are generated based on each effective voltage value stored in 31B and the transmissivity at that time, all effective values when the liquid crystal display panel 1 is displayed in all gradations The voltage can be easily adjusted with a simple circuit configuration, and more appropriate color display can be performed at low cost.

Further, according to the present embodiment, the pulse width setting section 32 sets the pulse width of the display drive signal for the pixel of the color having the lowest transmittance within the predetermined range of the γ characteristic of the liquid crystal of the liquid crystal display panel 1 as a reference. As a result, the pulse width of the display drive signal supplied to the signal lines of the other two color pixels is reduced,
Since the pulse width signals φR, φG, and φB are generated so that the effective voltages of the R, G, and B pixels are the same, R and G are taken into consideration in consideration of the γ characteristic of the liquid crystal and the transmittance at the time of ON. , B, the chromaticity coordinates of white when all are on can be adjusted to a more appropriate one, and a more appropriate color display can be performed.

Although the present invention has been specifically described based on the preferred embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. There is no end.

For example, in the above-described embodiment, the pixels SR, SG and SB in the non-display area 1B of the liquid crystal display panel 1 are driven based on the pulse width signal which changes in a predetermined cycle, and the pixels SR, SG and SB are driven. Display area 1 based on transmittance
The pulse width of the display drive signal supplied to the A signal lines SR1, SG1, and SB1 is controlled to control the R, G, and B liquid crystals 9.
By feed-forward controlling the effective voltage applied to R, G of the display area 1A of the liquid crystal display panel 1,
The control is performed so that the B pixels have the same transmittance, but the effective voltage control method is not limited to this.

For example, the decoder 3 of the pulse width setting section 32
The pulse width signals φR, φG, and φB determined in step 8 are input to the pixel drive circuit 36, and the pixel drive circuit 36 causes the non-display area 1B.
By controlling the pulse width of the display drive signal supplied to the signal lines of the pixels SR, SG, SB of
This pixel S is controlled by controlling the effective voltage applied to G and SB.
The pulse width signals .phi.R, .phi.G, .phi.B may be feedback-controlled in the same manner as above based on the transmittance of the light passing through R, SG, SB.

Further, in this embodiment, the liquid crystal 9 of the liquid crystal display panel 1 uses the normally black one, but the present invention is not limited to this, and the normally white one may be used. In this case, the effective voltage V shown in FIG.
Since the rms-transmittance T characteristic is reversed, this effective voltage V
The effective voltage Vrms considering the rms-transmittance T characteristic is applied to each of the R, G, and B signal lines.

Further, in the above embodiment, the effective voltage Vrms is not adjusted for the display drive signal applied when the signal line is not selected, but this is because the effective voltage Vrms-transmittance T curve when off is This is because, as shown in FIG. 5, R, G, and B match each other, and when using a liquid crystal in which the effective voltage Vrms-transmittance T curve at the time of OFF does not match R, G, and B, Even when off
The effective voltage Vrms of R, G, B may be adjusted.

In the above embodiment, the timing of the display drive signal is shifted to control the pulse width of the effective voltage formed between the display drive signal and the scan drive signal to adjust the voltage value of the effective voltage. However, the present invention is not limited to this, and the display drive signal itself may be pulse width controlled.

[0098]

According to the present invention, the drive circuit outputs a display drive signal having a predetermined pulse width to the signal lines of the R, G and B pixels of the liquid crystal display panel based on the display data.
A predetermined scan drive signal is supplied to each scan line and a predetermined effective voltage based on the display drive signal and scan drive signal for each R, G, and B is applied to supply R, G, and B. Each pixel is driven to be displayed, and the pulse width setting means sets R, G,
The display drive signal for generating an effective voltage for which the transmissivities at the predetermined transmissivities of the B pixels are equal to each other are R,
A pulse width signal generated for each of the G and B signal lines is
Output to drive circuit.

Therefore, by controlling the pulse width of the effective voltage of each R, G, B pixel, each R, G, B pixel is made to have the same transmittance. The effective voltage can be adjusted so that the chromaticity coordinate of white comes to an appropriate position. As a result, it is possible to prevent the white color from becoming bluish or reddish at the time of all-on (white lighting), and it is possible to perform an appropriate color display.

According to the liquid crystal drive device of the second aspect of the invention, the liquid crystal display panel is driven by a display area in which each pixel of R, G, B is display driven by display data, and by a predetermined effective voltage. The liquid crystal display panel is divided into an area for detecting a transmittance and a signal line for each pixel of R, G, and B in the display area of the liquid crystal display panel, and a display circuit having a predetermined pulse width based on display data from a drive circuit. Supply the signal,
By supplying a predetermined scan drive signal to the scan line, R, G,
A predetermined effective voltage based on the display drive signal for each B and the scan drive signal is applied to drive each R, G, B pixel for display.

Then, the light transmittance of each of the R, G, and B pixels of the light transmittance detecting area of the liquid crystal display panel is detected by the detecting means, and the light transmittance and the light transmittance detecting area detected by this detecting means. On the basis of the effective voltage applied to each of the R, G, and B pixels, the transmittance at a predetermined transmittance of each of the R, G, and B pixels of the display area is determined by the pulse width setting means.
A pulse width signal for generating a display drive signal for generating an effective voltage having the same value for each of the R, G, and B signal lines is output to the drive circuit.

Therefore, each R, G, and
The transmittance of B is detected by the detecting means, and the effective voltage supplied to each R, G, B of the display area is determined by the detection result.
The pulse width can be controlled more appropriately and automatically so that the respective R, G, and B have the same transmittance.

As a result, the chromaticity coordinate of white can be automatically adjusted to a more appropriate position, and all on (white lighting).
At times, it is possible to prevent white from being bluish or reddish, and it is possible to automatically perform a more appropriate color display.

In each of the above cases, for example, as described in claim 3, the pulse width setting means applies the effective voltage to each pixel of R, G and B in the transmittance detection region at a predetermined cycle. An effective voltage adjusting means for changing the width of a predetermined voltage value, and a memory for storing the effective voltage value changed by the effective voltage adjusting means and the transmittance detected by the detecting means at each of the changing effective voltages. If the pulse width signal is generated based on the respective effective voltage values stored in the memory and the transmittance at that time, for all effective voltages when displaying the liquid crystal display panel in all gradations, With a simple circuit configuration, adjustment can be easily performed, and more appropriate color display can be performed at low cost.

Further, for example, as described in claim 4, the pulse width setting means is set to γ of the liquid crystal display panel.
By reducing the pulse width of the display drive signal supplied to the signal lines of the pixels of the other two colors with reference to the pulse width of the display drive signal for the pixel of the color having the lowest transmittance within the predetermined range of characteristics. , The R, G and B pixels have the same effective voltage,
If it is generated, the chromaticity coordinates of white when R, G, and B are all on can be adjusted to a more appropriate one in consideration of the γ characteristic of the liquid crystal and the transmittance when on. More appropriate color display can be performed.

[Brief description of drawings]

FIG. 1 is a top view of a liquid crystal display panel to which a liquid crystal drive device of the present invention is applied.

FIG. 2 is a side view of a liquid crystal display panel to which the liquid crystal drive device of the present invention is applied.

FIG. 3 is a detailed side sectional view of a liquid crystal display panel to which the liquid crystal driving device of the present invention is applied.

FIG. 4 is a circuit diagram of an embodiment of a liquid crystal driving device of the present invention.

FIG. 5 is a diagram showing VT characteristic curves of different liquid crystals (a) to (c).

FIG. 6 shows signal lines SR1, SG1 and S for R, G and B respectively.
FIG. 6 is a timing chart of a display drive signal and a scan drive signal supplied to B1.

[Explanation of symbols]

 1 Liquid crystal display panel 1A Display area 1B Non-display area 2, 3 Transparent glass substrate 4, 5 Polarizing plates 6a, 6b, 6c White light source 7a, 7b, 7c Light receiving element 9 Liquid crystal 10 Scan line 12R, 12G, 12B Color filter 13 Signal Line 20 Signal side drive circuit 30 Voltage setting circuit 31 Memory section 31R, 31G, 31B Memory 32 Pulse width setting section 33 Pulse width selection switch section 34 Clock generation circuit 35 Pulse width modulation circuit 36 Pixel drive selection circuit 37 Comparison judgment circuit 38 Decoder 39 counter 40 transmittance detector SR, SG, SB pixel VR, VG, VB transmittance detection voltage φV effective voltage pulse width LR, LG, LB latch circuit SR, SG, SB sampling circuit LSR, LSG, LSB level conversion circuit MPS , MPG, MPB multiplexer φ R, φG, φB pulse width signal

Claims (4)

[Claims] 1. A liquid crystal is sealed between a pair of transparent glass substrates, and R, G, B color filters are disposed on one side of the pair of transparent glass substrates.
A plurality of R, G, and G are formed by a scanning line and a signal line which are formed in a state of facing each other at positions corresponding to G and B, respectively.
A liquid crystal display panel in which B pixels are formed, and a display drive signal having a predetermined pulse width based on display data is supplied to the signal lines of the R, G, and B pixels of the liquid crystal display panel. And a predetermined scan drive signal is supplied to the scan lines to supply R, G,
A drive circuit that applies a predetermined effective voltage based on the display drive signal for each B and the scan drive signal to drive each R, G, B pixel for display, and a predetermined drive circuit for each R, G, B pixel. A pulse width for outputting to the drive circuit a pulse width signal for generating the display drive signal for generating each of the R, G and B signal lines for generating the effective voltage having the same transmittance. A liquid crystal drive device comprising: setting means. 2. A liquid crystal is sealed between a pair of transparent glass substrates, and R, G, B color filters are disposed on one side of the pair of transparent glass substrates.
A plurality of R, G, and G are formed by a scanning line and a signal line which are formed in a state of facing each other at positions corresponding to G and B, respectively.
A liquid crystal display in which a B pixel is formed and is divided into a display region in which each of the R, G, and B pixels is display driven by display data, and a transmittance detection region driven by a predetermined effective voltage. A display driving signal having a predetermined pulse width is supplied to the panel and a signal line of each of the R, G, and B pixels of the display area of the liquid crystal display panel based on display data, and a predetermined scanning is performed on the scanning line. A drive circuit that supplies a drive signal and applies a predetermined effective voltage based on the display drive signal for each of R, G, and B and the scan drive signal to drive each of the R, G, and B pixels for display. Detecting means for detecting the light transmittance of each of the R, G, and B pixels of the transmittance detecting area of the liquid crystal display panel, and the transmittance detected by the detecting means and the R, G of the transmittance detecting area, Actual applied to each pixel of B Based on the voltage,
For each of the R, G, and B signal lines, the display drive signal that generates the effective voltage that makes the transmittances of the R, G, and B pixels of the display region at a predetermined transmittance equal to each other is obtained. A liquid crystal drive device comprising: a pulse width setting unit that outputs a pulse width signal to be generated to the drive circuit. 3. The pulse width setting means includes an effective voltage adjusting means for changing the effective voltage applied to each of the R, G, and B pixels of the transmittance detection region in a predetermined voltage value width in a predetermined cycle. A memory for storing the effective voltage value changed by the effective voltage adjusting means and the transmittance detected by the detecting means at each of the changing effective voltages, and each effective voltage value stored in the memory and its 3. The liquid crystal drive device according to claim 2, wherein the pulse width signal is generated based on the transmittance at that time. 4. The pulse width setting means uses the pulse width of the display drive signal for the pixel of the color having the lowest transmittance within the predetermined range of the γ characteristic of the liquid crystal display panel as a reference, and the pixels of other two colors. The pulse width signal of the display drive signal supplied to the signal line is generated to generate the pulse width signal having the same effective voltage in each of the R, G, and B pixels. The liquid crystal drive device according to any one of claims 1 to 3.