JPH0851543A - Coding device and method therefor - Google Patents

Abstract

PURPOSE:To obtain the coding device and method by which highly efficient compression is attained. CONSTITUTION:A comparator section 103 compares a noted picture element with a picture element of a just preceding order stored in a buffer A 102 and when they differ from each other, addresses (high-order, low-order) of a noted picture element stored in a buffer B 105 and a buffer C 106 is updated. When the address of the noted picture element is maximized, the address stored in the buffer B 105 and the buffer C 106 is given to a coding section 108 and coding data after the address are replaced with EOB (End Of Block).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a coding apparatus and method, and more particularly to a coding apparatus and method for coding multi-valued image data.

[0002]

2. Description of the Related Art In recent years, the quality of images created on a computer by DTP or the like has been remarkably improved, and colorization and multi-gradation have been advanced. The amount of information in this type of image is
For example, in the case of A4 size, 400 dpi, 256 gradations, and three-color, it is about 46 megabytes.

As a general compression method for color multi-valued images, ADCT (Adaptive Discrete Cosine Transform) proposed by JPEG (Joint Photographic Expert Group) is proposed.
There is a compression method according to the method, but since this is an additional decompression method that causes data loss in the sub-sampling unit and the quantizing unit, the decoded image is deteriorated to some extent.

Therefore, for example, a compression method has been proposed which is capable of performing complete decoding with the configuration shown in FIG.

In FIG. 12, reference numeral 1101 denotes a pixel data generating unit such as a host computer and an image reader,
24 bits (8 bits for each color) pixel data is generated for each pixel in the NTSC-RGB format.

1102 is a first flip-flop (hereinafter, referred to as
In the FF) section, the pixel data (2
4 bits) are held in synchronization with the falling edge of the pixel generation clock. 1103 is a second FF unit,
The output of the comparison unit 1105 is used as a write enable signal,
The pixel data output from the first FF unit 1102 is held in synchronization with the clock. 1104 is a third FF unit,
The pixel data output from the second FF unit 1103 is held in synchronization with the clock using the logical sum of the first comparison unit 1105 and the second comparison unit 1106 as a write enable signal.

A first comparing unit 1105 compares the pixel data from the pixel data generating unit 1101 with the pixel data held in the first FF unit 1102, and outputs "1" when they are equal and "1" when they are different. "0" is output. A second comparison unit 1106 compares the pixel data from the pixel data generation unit 1101 with the pixel data held in the second FF unit 1103, and outputs “1” when they are equal and “0” when they are different. Output. Reference numeral 1107 denotes a third comparison unit which includes the pixel data from the pixel data generation unit 1101 and the third FF unit 110.
The pixel data held in 2 is compared, and when both are equal, "1" is output, and when they are different, "0" is output.

Reference numeral 1109 is a control unit, and each comparison unit 110.
5 to 1107 comparison results and pixel data generation unit 1101
The image data from is input and the encoded data is output. Reference numeral 1110 is a communication interface, which transmits a coded data with a communication header attached.

With the configuration described above, when the pixel of interest has the same value as the color data of the immediately preceding pixel (c1; held in the first FF section 1102), a 1-bit code (for example, "0") is output. However, the color data (c2; second) of the first newly appearing pixel having a value different from the color data (c1).
When the pixel of interest has the same value, the 2-bit code (for example, "10") is output, and the color data (c1) and (c2) have the different values and the first new appearance appears. Data of the selected pixel (c3; third FF unit 110)
4) and the target pixel have the same value, a 3-bit code (for example, “110”) is output, and the target pixel is different from any of the color data (c1), (c2), and (c3). When it has a value, an unused 3-bit code (for example, “111”) and the color data of the pixel of interest are output.

By this reversible compression processing, it is possible to highly efficiently compress image data such as a DTP image having a small number of colors forming one block. For example, if one block has 8 × 8 pixels, the minimum generated code amount in one block is 64 bits, that is, the maximum compression rate is 1 /
24. This is the case where all 64 pixels forming a block have the same color.

[0011]

However, in the above-described conventional compression method, the compression rate is 1/24 at the maximum, and it is impossible to perform the compression processing with higher efficiency.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide an encoding apparatus and method capable of further highly efficient compression.

[0013]

In order to achieve the above-mentioned object, the present invention comprises the following constitutions.

That is, in a predetermined pixel block, a detecting means for detecting the first pixel of a pixel row having the same color up to the last pixel in the block, a first encoding means for encoding the pixel, and Second coding means for replacing the coded code string by the first coding means after the head pixel detected by the detection means with a predetermined code and ending the coding of the pixel block. It is characterized by having.

Also, a first coding means for coding the input image data after cutting it into a predetermined pixel block,
The data encoded by the first encoding means is detected by the detecting means for detecting the position of the leading data of the same data string which continues in the pixel block up to the last pixel in the block. It is characterized by including a second encoding means for replacing the data string after the head data with a predetermined code and ending the encoding of the pixel block.

For example, the first encoding means outputs a 1-bit code when the pixel of interest has the same value as the color data (C1) of the immediately preceding pixel, and outputs the 1-bit code as the color data (C1). Outputs a 2-bit code when the color data (C2) of the first newly appearing pixel having a different value and the target pixel have the same value, and also has a different value from the color data (C1) and (C2). The color data (C3
) And the target pixel have the same value, a 3-bit code is output, and when the target pixel has a value different from any of the color data (C1), (C2), and (C3), the unused 3
The feature is that the bit code and the color data of the pixel of interest are output.

For example, the detecting means detects the pixel rows of the same color by the 1-bit code by the first block encoding means.

Further, the detecting means is provided with an address detecting means for detecting an address of the pixel of interest when the pixel of interest and the end of the block are pixel columns of the same color.
The encoding means of (1) replaces the address after the address detected by the address detecting means with a predetermined code.

Further, the detecting means is provided with an address detecting means for detecting the address of the data of interest when the data of interest and the end of the block are the same data string, and the second encoding means is operated by the address detecting means. It is characterized in that the detected address and thereafter are replaced with a predetermined code.

For example, the address detecting means detects the address of the code data which is not "0" in order from the LSB.

For example, the second encoding means is characterized in that when a predetermined number or more of "0" s are consecutive, the consecutive "0s" are replaced with a predetermined code.

For example, the predetermined number is larger than the number of bits of the predetermined code.

For example, it is characterized by further comprising bit stuffing means for performing bit stuffing on the bit string when the same bit string as the predetermined code is detected in the pixel block.

Further, when the pixel block is YUV data, it has an inverting means for inverting the MSB of the UV data, and the first encoding means uses the MS by the inverting means.
It is characterized in that the B-inverted pixel block is encoded.

For example, the predetermined code is a code indicating a block end.

[0026]

With the above construction, the EOB is added to the area after the leading address of "0" which continues from the end of the encoded pixel block.
(End Of Block) can be replaced, and therefore, a unique effect that encoding can be performed with higher efficiency can be obtained.

[0027]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment according to the present invention will be described in detail below with reference to the drawings.

<First Embodiment> FIG. 1 shows the arrangement of an encoding apparatus according to this embodiment.

In FIG. 1, 101 is a prescan unit,
102, 105, 106 are buffers A, B, respectively.
C and 103 are comparison units, 104 is an address generation unit, and 107
Is a block buffer, 108 is an encoding unit, and 109 is a 6-terminal input AND circuit.

The image data input in this embodiment has 8 bits for each of RGB, that is, 24 bits per pixel, and this is encoded in block units with 8 × 8 pixels as one block.

In this embodiment, the image data input in synchronization with a clock signal (not shown) is used as the prescan section 10.
1 is input to the comparison unit 103 at the same time as the buffer A1.
It is temporarily stored in 02. Then, in the comparison unit 103, the value of the pixel of interest in the input image data and the buffer A
The value of the pixel immediately before the pixel of interest in the image data stored in 102 is compared.

The address generator 104 is composed of a 6-bit counter, and generates an in-block address (0 to 63) of the pixel of interest in synchronization with a clock signal (not shown). At this time, the upper 3 bits of the generated address are the addresses in the x direction, and the lower 3 bits are the addresses in the y direction. In this embodiment, since 8 × 8 pixels are one block, x,
When each address in the y direction is represented by (x, y), (0,
Addresses for 64 pixels from 0) to (7, 7) can be generated. Therefore, the processing directions of the pixels in the block in this embodiment are as shown in FIG. In FIG. 2, the horizontal direction is the x direction and the vertical direction is the y direction. Incidentally, a buffer B105 and a buffer C106 which will be described later.
Since the start addresses of the same data that are consecutive are stored in
The block head address is (0, 1).

The buffers B105 and C106 are initialized to (0,0) at the beginning of the block, and the comparison unit 10
In 3, it is determined that the value of the pixel of interest is different from the pixel value immediately before it, the buffer B105 and the buffer C1.
06 is updated to the values of the upper 3 bits and the lower 3 bits of the in-block address obtained by the address generator 107.

Therefore, the buffer B105 and the buffer C1
The address data stored in 06 is the start address of a pixel row having the same pixel value (same color) in the block.

The total 6-bit in-block address generated from the address generator 104 is input to the AND circuit 109, and the address is (7, 7), that is, the counter value forming the address generator 104 is "111111". ”
, The address indicates the final (64th) pixel position in the block, and the AND circuit 109 outputs “1”. The signal output from the AND circuit 109 becomes a read signal of the buffer B105 and the buffer C106, the head address stored in each is read, and the address data is input to the encoding unit 108.

As described above, by prescanning the image data in the prescan unit 101, in the image data of one block, pixels having the same pixel value in the block (pixels of the same color after the target pixel) ) The head address of the column is detected, and the address data is input to the encoding unit 108.

On the other hand, the image data is stored in the block buffer 10.
7 is also input and delayed by one block, and then the encoding unit 1
08 is input.

The detailed structure of the encoding unit 108 is shown below in FIG. In FIG. 3, the same components as those of FIG. 12 shown in the conventional example are denoted by the same reference numerals, and the description thereof will be omitted.

In FIG. 3, reference numeral 1201 denotes a counter, which counts the number of input pixels in synchronization with a clock signal and outputs the count to the comparing section 1202. The comparator 1202 includes a buffer B 105 and a buffer C of the prescan unit 201.
The 6-bit in-block address output from 106 is also input. When the output value of the counter 1201 becomes equal to the address value, “1” is output and input to the control unit 1203. That is, when the output of the comparison unit 1202 becomes “1”, the subsequent values of the block have the same pixel value, and thus the conventional encoding of the subsequent pixels in the block becomes unnecessary.

Therefore, in the encoding unit 108, the input R
The above-described conventional lossless compression processing is applied to GB data, but when a signal from the comparison unit 1202 is input to the control unit 1203 as “1”, a predetermined EOB (End Of Block) code is added. Then, the compression processing of the block is completed.

That is, the image data input to the encoding unit 108 is encoded up to the pixel position of the in-block address read from the buffer B105 and the buffer C106, and EOB is used as encoded data after the address. Thus, one block is encoded.

In this embodiment, since the coding is performed in block units, each counter value is cleared when the processing of one block is completed.

As described above, according to the present embodiment, when pixels having the same color after the target color continue in the block, EOB is added to complete the coding of the block, thereby further improving the coding. Efficient encoding is possible. For example, when one block has the same color, the compression rate is dramatically improved to N / 1536 (N is the number of EOB bits).

<Second Embodiment> A second embodiment of the present invention will be described below.

FIG. 4 shows the configuration of the encoding apparatus in the second embodiment. In FIG. 4, the same components as those in FIG. 1 of the first embodiment described above are designated by the same reference numerals, and the description thereof will be omitted.

In FIG. 4, reference numeral 204 denotes an address generator, which is composed of a 6-bit counter and generates an in-block address (0 to 63) of the pixel of interest in synchronization with a clock signal (not shown). At this time, the upper 3 bits of the generated address are the addresses in the y direction, and the lower 3 bits are the addresses in the x direction. Therefore, the processing directions of the pixels in the block in the second embodiment are as shown in FIG. In FIG. 5, the horizontal direction is the x direction and the vertical direction is the y direction.

Therefore, in the second embodiment, the processing direction of the pixels in the block can be made different from that in the first embodiment described above. For example, in an image in which the color of each pixel sequentially changes in the y direction. Can encode more efficiently.

<Third Embodiment> A third embodiment of the present invention will be described below with reference to FIG.

FIG. 6 is a block diagram showing the arrangement of an encoding apparatus according to the third embodiment. In FIG. 6, 301 is a coding unit, 302 is a 64-bit shift register, 303 is a priority encoder, and 304 is a packing unit.

In the third embodiment, one pixel of the input image data is represented by 8 bits of RGB and 24 bits in total.

In FIG. 6, first, the RGB image data is input to the encoding unit 301 and subjected to the above-described conventional compression processing. Here, the detailed configuration of the encoding unit 301 is shown in FIG. 7, the same configurations as the configurations shown in FIG. 12 described above are denoted by the same reference numerals, and description thereof will be omitted. In FIG. 7, the comparison result of the first comparison unit 1105 is output as an identification signal. That is, for the pixel having the same color as the immediately preceding pixel, the identification signal is output as "1".

Returning to FIG. 6, the identification signal output from the encoding unit 301 is input to the 64-bit shift register 302. In the third embodiment, since the processing is performed with 8 × 8 pixels as one block, the 64-bit shift register 30
The capacity of 2 is 64 bits.

6 from the 64-bit shift register 302
The 4-bit output is input to the priority encoder 303. The priority encoder 303 searches for a pixel position whose identification signal is "0". That is, the search is performed in order from the LSB in the block, and the address (6 bits) of the first encoded data having the identification signal of "0" is detected. Then, the detected address is stored in the packing unit 304.
Is input to The encoding unit 301 is included in the packing unit 304.
The encoded data is also input from the priority encoder 303 of the input encoded data.
The EOB code is set immediately after the address input from, and the encoding of one block is completed up to the EOB.

As described above, according to the third embodiment,
With a simple configuration without performing pre-scan of the entire block, a pixel row in which “0” continues after encoding (hereinafter,
Pixel positions other than "0 run" are L in the block.
High-efficiency encoding can be performed by retrieving from the SB and replacing the addresses after that with EOB.

<Fourth Embodiment> The fourth embodiment of the present invention will be described below.

FIG. 8 is a block diagram showing the arrangement of an encoding apparatus according to the fourth embodiment. In FIG. 8, 401 is an encoding unit, 402 is a bit stuffing unit, 403 is an 88-bit shift register, 404 is a priority encoder, and 405 is a packing unit.

In the fourth embodiment, one pixel of the input image data is represented by a total of 24 bits of 8 bits for each of RGB.

In FIG. 8, first, the RGB image data is input to the encoding unit 401, and the data encoded by the encoding unit 401 as in the conventional example is input to the bit stuffing unit 402. Bit stuffing section 402
Then, the same bit string as that of EOB is detected from the encoded data, and "0" is inserted into the bit string to distinguish the encoded data from EOB. Thus, when decoding the data encoded in the fourth embodiment, the "0" inserted by the bit stuffing unit 402 is removed and then the decoding is performed.

The encoded data output from the bit stuffing unit 402 is the 88-bit shift register 403.
Is input to

In the fourth example, the coded data is "0".
Perform EOB processing on the run. For example, when the head pixel of the block is different from the value of any buffer of the encoding unit 401, the header “111” and 24-bit pixel data (for example, “FF0000H”) are output as encoded data, and then the same pixel data is output. In the case where is continued up to the end of the block, 16 + 63 = 79 bits of “0” are continuous, but in the fourth embodiment, the 79 bits of “0” are replaced with EOB. Therefore, the maximum number of consecutive "0" s in one block is 24 + 64 = 88 bits, and the shift register 403 requires a maximum of 88 bits.

88 of the 88-bit shift register 403
The bit output is input to the priority encoder 404. In the priority encoder 404, “0” is N (N is EO) from the LSB in the block of encoded data.
In the case where the number of bits of B + 1) or more continues, the continuous encoded data other than "0" is detected, and the address (7 bits) is output to the packing unit 405. This is to prevent replacement that impairs coding efficiency, for example, when the number of consecutive "0" s is smaller than the number of EOB bits.

Coded data is also input from the 88-bit shift register 403 to the packing unit 405, and consecutive "0" s after the address input from the priority encoder 404 are replaced with one EOB code, and one block of one block is replaced. End encoding.

As described above, according to the fourth embodiment,
"0" in the encoded data is the number of EOB bits +
By replacing with EOB when one or more are consecutive, it is possible to encode consecutive "0" s only with EOB. Furthermore, since bit stuffing is performed, EOB
It is possible to perform highly efficient encoding with a simple configuration without erroneously detecting

<Fifth Embodiment> The fifth embodiment of the present invention will be described below.

FIG. 9 is a block diagram showing the structure of the coding apparatus in the fifth embodiment. The same structures as those in FIG. 8 in the above-mentioned fourth embodiment are designated by the same reference numerals and the description thereof will be omitted. .

In FIG. 9, 501 is an MSB inversion unit. In the fifth embodiment, consider the case where YUV image data is input. YUV data is MSB first
It is input to the inversion unit 501 and only the MSB of UV data is inverted.

Generally, UV data is "-128 to 12".
It is expressed in the 7 ”range. When "128" is added to express this in the range of "0 to 255", the UV data (color difference "0", that is, pixels having the same color) that was at "0" level before the addition is " 128 ", binary" 1 "
It becomes 0000000 ". In UV data, the probability of appearance of pixels at this level is the highest, so this is the MS
The B inversion unit 501 inverts the MSB to “00000000” to improve the appearance probability of a “0” run and enhance the coding efficiency.

The YUV image data in which the MSB of the UV data is inverted by the MSB inversion unit 501 as described above is input to the encoding unit 502, and thereafter, the same processing as in the fourth embodiment described above is performed. Encoding processing for one block is performed.

As described above, according to the fifth embodiment,
By inverting the MSB of UV data and performing encoding, the probability of occurrence of “0” runs is improved, especially for YUV image data, so that more efficient encoding can be performed.

<Sixth Embodiment> The sixth embodiment of the present invention will be described below.

FIG. 10 is a block diagram showing the arrangement of an encoding apparatus according to the sixth embodiment. In FIG. 10, 60
Reference numeral 1 is an encoding unit, 602 and 603 are 64-bit shift registers, 604 is an OR circuit, 605 is a priority encoder, and 606 is a packing unit.

In the sixth embodiment, one pixel of the input image data is represented by 8 bits of RGB and 24 bits in total.

In FIG. 10, first, RGB image data is input to the encoding unit 601, and the conventional compression processing described above is performed. Here, the detailed configuration of the encoding unit 601 is shown in FIG.
1 and the same configurations as those shown in FIG. 12 described above are denoted by the same reference numerals and the description thereof will be omitted. In FIG. 11, 1
Reference numeral 301 denotes a control unit, which is not a pixel that outputs RGB 24-bit data among the encoded pixel data, that is, a color that has not appeared immediately before, or a color that has appeared before that or a color that has appeared before that. For the pixel, the control signal is output as "1" and the other signals are output as "0". As for the pixel whose control signal is "1", it is prohibited to replace it with EOB in the encoded data as described later.

Returning to FIG. 10, the encoded data output from the encoding unit 601 is first input to the 64-bit shift register 602 by 64 bits from the end of the block.
The corresponding control signal is input to the 64-bit shift register 603. The encoded data of 64 bits or more from the end of the block is not replaced in the sixth embodiment, and is directly packed in the packing unit 606.

64-bit shift registers 602 and 60
The 64-bit output of 3 is input to the OR circuit 604, the logical sum thereof is taken, and output to the priority encoder 605. Then, the priority encoder 605 sequentially searches from the LSB in the block, and outputs the address of the pixel where the output of the OR circuit 604 is not “0”, that is,
The address (6 bits) of the pixel whose encoded data is “1” or whose control signal is “1” is output to the packing unit 606.

The coded data from the 64-bit shift register 602 is also input to the packing unit 606,
By replacing continuous "0" other than 24-bit color data in the encoded data with EOB, the encoding of one block is completed.

As described above, according to the sixth embodiment,
It is possible to perform more efficient encoding while completely maintaining the RGB 24-bit color data in the encoded data.

By using a signal indicating that the pixel is not equal to the immediately preceding pixel (inversion of the control signal in FIG. 7) instead of the control signal, the OR circuit 604 is deleted and the output of the shift register 603 is directly prioritized. Encoder 6
You may enter it in 05.

<Seventh Embodiment> The seventh embodiment of the present invention will be described below.

An image created by a computer such as DTP is characterized in that the number of colors used is small, and 256 colors are sufficient in most cases. Therefore, 256 colors (8
Bit) memory is prepared as a table and
8-bit table data (0 to 255) is output at the location where the bit color data was output. Then, when the table data indicates 255,
As in the conventional case, 24 bits are added as color data outside the range corresponding to the table and output.

By applying the above-described first to sixth embodiments to this structure, more efficient coding can be realized.

In each of the above-described embodiments, an example in which image data is encoded in block units of 8 × 8 pixels has been described, but the present invention is not limited to this and the encoding is performed. Blocking may be performed in any unit as long as the purpose of (1) can be achieved.

The EOB code added to the end of the block in each embodiment may be any bit string as long as it can be identified as EOB.

The present invention may be applied to a system including a plurality of devices or an apparatus including a single device. Further, it goes without saying that the present invention can be applied to the case where it is achieved by supplying a program to a system or an apparatus.

[0085]

As described above, according to the present invention, an image having a strong correlation such as an image created by DTP, a simple image such as text, that is, an image in which the same color continues until the end of a block is displayed. In this case, more efficient encoding can be realized.

[0086]

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an encoding device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a scanning direction of prescan in the present embodiment.

FIG. 3 is a diagram showing a detailed configuration of an encoding unit in the present embodiment.

FIG. 4 is a block diagram showing a configuration of an encoding device according to a second embodiment of the present invention.

FIG. 5 is a diagram showing a scanning direction of prescan in the second embodiment.

FIG. 6 is a block diagram showing the configuration of an encoding device according to a third embodiment of the present invention.

FIG. 7 is a diagram showing a detailed configuration of an encoding unit in the third embodiment.

FIG. 8 is a block diagram showing a configuration of an encoding device according to a fourth embodiment of the present invention.

FIG. 9 is a block diagram showing the configuration of an encoding device according to a fifth embodiment of the present invention.

FIG. 10 is a block diagram showing the configuration of an encoding device according to a sixth embodiment of the present invention.

FIG. 11 is a diagram showing a detailed configuration of an encoding unit in the sixth embodiment.

FIG. 12 is a diagram showing a configuration of a conventional encoding device.

[Explanation of symbols]

 101, 201 Pre-scan unit 104 Address generation unit 107 Block buffer 108, 301, 401, 601 Encoding unit 302, 602, 603 64-bit shift register 303, 404, 605 Priority encoder 304, 405, 606 Packing unit 403 88-bit shift register

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI Technical display location G06T 9/00 H03M 7/46 9382-5K H04N 11/04 Z 9185-5C

Claims (24)

[Claims] 1. A detection means for detecting a head pixel of a pixel row in a predetermined pixel block up to the last pixel in the block having the same color; a first coding means for coding the pixel; Second coding means for replacing the coded code string by the first coding means after the head pixel detected by the detection means with a predetermined code and ending the coding of the pixel block. An encoding device having. 2. A first encoding unit that encodes input image data after cutting it out into a predetermined pixel block, and the data encoded by the first encoding unit in the pixel block within the block. Of the pixel block of the pixel block, replacing the predetermined data with a detection means for detecting the position of the leading data of the same data string continuous to the last pixel of the pixel data, and a data string after the leading data detected by the detection means. And a second encoding means for ending the encoding. 3. The first encoding means outputs a 1-bit code when the pixel of interest has the same value as the color data (C1) of the pixel immediately before, and outputs the 1-bit code as the color data (C1). Outputs a 2-bit code when the color data (C2) of the first newly appearing pixel having a different value and the target pixel have the same value, and also has a different value from the color data (C1) and (C2). ,
When the color data (C3) of the first newly appearing pixel and the target pixel have the same value, a 3-bit code is output, and the target pixel outputs the color data (C1), (C2) and (C3).
3. An encoding apparatus according to claim 1 or 2, wherein an unused 3-bit code and the color data of the pixel of interest are output when they have different values. 4. The encoding device according to claim 1, wherein the detection means detects pixel rows having the same color by the 1-bit code obtained by the first block encoding means. 5. The detecting means further comprises an address detecting means for detecting an address of the pixel of interest when the pixel of interest and the end of the block are pixel rows of the same color, and the second encoding means includes the address. 2. The encoding device according to claim 1, wherein the address after the address detected by the detecting means is replaced with a predetermined code. 6. The detection means further comprises address detection means for detecting the address of the data of interest when the data of interest and the end of the block are the same data string, and the second encoding means is the address detection means. 3. The encoding device according to claim 2, wherein the addresses after the address detected by are replaced with a predetermined code. 7. The encoding apparatus according to claim 5, wherein the address detecting means detects the address of the code data which is not “0” in order from the LSB. 8. The encoding apparatus according to claim 7, wherein the second encoding means replaces consecutive "0" s with a predetermined code when a predetermined number or more of "0s" are consecutive. . 9. The encoding device according to claim 8, wherein the predetermined number is larger than the number of bits of the predetermined code. 10. The encoding apparatus according to claim 2, further comprising bit stuffing means for performing bit stuffing on the bit string when the same bit string as the predetermined code is detected in the pixel block. 11. When the pixel block is YUV data, the device further comprises inverting means for inverting the MSB of UV data, wherein the first encoding means performs MSB inversion on the pixel block by the inverting means. The encoding apparatus according to claim 2, wherein the encoding is performed by using the following method. 12. The encoding device according to claim 1, wherein the predetermined code is a code indicating a block end. 13. A detecting step of detecting a leading pixel of a pixel row in a predetermined pixel block up to the last pixel in the block having the same color, a first encoding step of encoding the pixel, A second coding step of replacing the coded code string in the first coding step after the first pixel detected in the detection step with a predetermined code and ending the coding of the pixel block. An encoding method having. 14. A first encoding step of encoding input image data after cutting it out into a predetermined pixel block, and the data encoded by the first encoding step within the pixel block within the block. The detection step of detecting the position of the leading data of the same data string that continues up to the last pixel of, and replacing the data row after the leading data detected by the detection step with a predetermined code, A second encoding step of terminating the encoding. 15. The first encoding step outputs a 1-bit code when the pixel of interest has the same value as the color data (C1) of the immediately preceding pixel, and outputs the 1-bit code as the color data (C1). Outputs a 2-bit code when the color data (C2) of the first newly appearing pixel having a different value and the target pixel have the same value, and also has a different value from the color data (C1) and (C2). ,
When the color data (C3) of the first newly appearing pixel and the target pixel have the same value, a 3-bit code is output, and the target pixel outputs the color data (C1), (C2) and (C3).
15. The encoding method according to claim 13 or 14, wherein an unused 3-bit code and the color data of the pixel of interest are output when they have different values. 16. The encoding method according to claim 13, wherein the detecting step detects pixel rows having the same color by the 1-bit code obtained in the first block encoding step. 17. The detecting step further comprises an address detecting step of detecting an address of the pixel of interest when the pixel of interest and the end of the block are pixel rows of the same color, and the second encoding step includes the address. 14. The encoding method according to claim 13, wherein the address after the address detected by the detecting step is replaced with a predetermined code. 18. The detecting step further comprises an address detecting step of detecting the address of the target data when the same data string extends from the target data to the end of the block, and the second encoding step comprises the address detecting step. 15. The encoding method according to claim 14, wherein the addresses after the address detected by are replaced with a predetermined code. 19. The encoding method according to claim 17, wherein the address detecting step detects the address of the code data which is not “0” in order from the LSB. 20. The encoding method according to claim 19, wherein in the second encoding step, when "0" s continue for a predetermined number or more, the consecutive "0s" are replaced with a predetermined code. . 21. The encoding method according to claim 20, wherein the predetermined number is larger than the number of bits of the predetermined code. 22. The encoding method according to claim 14, further comprising a bit stuffing step of performing bit stuffing on the bit string when the same bit string as the predetermined code is detected in the pixel block. 23. When the pixel block is YUV data, the method further comprises an inversion step of inverting the MSB of UV data, wherein the first encoding step is performed on the pixel block MSB inverted by the inversion step. 15. The encoding method according to claim 14, wherein the encoding is performed by using. 24. The encoding method according to claim 13, wherein the predetermined code is a code indicating a block end.