JPH08340000A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE: To facilitate repairing and provide a highly reliable connection by aligning an interconnection layer with a connecting means through a repairing function layer, temporarily connecting them by heating at the melting point temperature of the low melting point connecting metal or below and forming a reaction layer by the solid-phase diffusion of the interconnection layer and the connecting means. CONSTITUTION: A gold bump 212 is formed on a semiconductor element 211, and a low melting point connecting metal bump is formed on the gold bump 212. Molybdenum/aluminum interconnection 214 is formed on a glass board 213. In a first connecting process (temporary connection), the semiconductor element is heated to the temperature of the melting point of the low melting point connecting metal bump or below to allow press-contact, and all the pads are connected at one time. Then, in a second connecting process (major connection), the semiconductor element is heated to approximately 400 deg.C to allow press-contact and all the pads are connected at one time. A reaction layer is formed by solid-phase diffusion reaction on the interface between the gold bump and the aluminum pad, and electrical and mechanical connection is performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device mounted by face-down bonding via bumps. The present invention also relates to a method of manufacturing such a semiconductor device.

[0002]

2. Description of the Related Art In recent years, as a method of mounting a semiconductor device thinner and with higher density, so-called wire bonding mounting has been used in which a semiconductor element is fixedly mounted on a wiring board and an electrical connection is made by using a wire. Instead, a face-down mounting technique has been developed in which bumps are formed on a semiconductor element and directly connected to a substrate for mounting.

This face-down mounting is applied to flip-chip technology using solder bumps applied to supercomputers and COG (C) applied to liquid crystal displays and the like.
Various connection materials and mounting methods have been proposed depending on the application, such as hip on glass).

As one method of COG mounting, as shown in FIG.
A technique has also been proposed in which a solder bump 42 formed on a semiconductor element and having a low melting point and a low hardness is pressure-contacted to perform initial connection without using a connecting resin, but in this method, mechanical strength is low, Finally, resin sealing was performed to ensure reliability (Japanese Patent Laid-Open No. 3-108734). However, when the wiring on the substrate side is a metal such as aluminum that easily forms a strong oxide film, the wiring surface is covered with the oxide film at the time of connection,
There is a problem that the connection reliability is low because the oxide film cannot be sufficiently destroyed.

On the other hand, similar to flip-chip mounting, there is also a method of making a connection by melting a solder bump and alloying with a wiring on a substrate, but a metal such as aluminum which is hard to be wet by solder is used as the wiring. In some cases it was not possible to make a sufficient connection.

As a solution to the above problems, there is a semiconductor device disclosed in Japanese Patent Application No. 5-511119. As shown in FIG. 27, this semiconductor device has an insulating substrate 53 having a wiring pattern 54 on its surface, and a semiconductor element 5 mounted on the wiring pattern via bumps 52.
1 and the wiring pattern 54 and the bump 52 are joined by forming a reaction layer 55 by solid-phase diffusion, so that they are reliable even in the case of aluminum wiring having a strong oxide film. A highly reliable connection can be realized.

After the semiconductor element is mounted on the substrate, it may be removed from the substrate due to, for example, a defect in the semiconductor element itself, a mounting position shift, or a change in the logic of an electronic circuit, and may be replaced with a new semiconductor element and mounted again. This process is called repair. At this time, in the method using the solder bumps described above, it is possible to remove from the substrate by remelting, but in the connection method using the solid-phase diffusion, a part of the metal forming the wiring pattern and the metal forming the bumps are used. Since an intermetallic compound is formed by a solid-phase reaction with a part of the above, it cannot be repaired because it melts like a solder bump and cannot be attached or removed.

[0008]

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and a eutectic crystal, a solid solution, and an intermetallic compound are formed in a connecting portion between a wiring layer and a connecting means of a semiconductor element by solid phase diffusion. It is an object of the present invention to easily perform a repair work and obtain a highly reliable connection in a semiconductor device in which a reaction layer containing alloys such as the above is used alone or in combination.

[0009]

According to the present invention, firstly, a wiring layer containing aluminum formed on an insulating substrate, or a bump-shaped bump containing gold provided on a flip-chip type semiconductor element is provided. A step of forming a repair function layer containing a low melting point bonding metal on at least one of the connection means, a step of aligning the wiring layer and the connection means via the repair function layer, and then the wiring layer and the connection Heating means and a temperature below the melting point of the low melting point bonding metal,
Provided is a method for manufacturing a semiconductor device, which includes a step of performing temporary joining, and thereafter a step of solid-phase diffusing the wiring layer and the connecting means to form a reaction layer, and thereby performing main joining.

Second, the present invention aligns the aluminum-containing wiring layer formed on the insulating substrate with the gold-containing bump-like connecting means provided on the flip-chip type semiconductor element. Step, then partially solid-phase diffusion of the wiring layer and the connecting means by thermocompression bonding,
A step of forming a reaction layer and thereby performing temporary joining,
Further, there is provided a method of manufacturing a semiconductor device including a step of solid-phase diffusing the wiring layer and the connecting means by thermocompression bonding to form a reaction layer, and thereby performing main bonding.

Thirdly, the present invention provides an insulating substrate, a wiring layer containing aluminum formed on the insulating substrate, and a gold layer bonded to the wiring layer by forming a reaction layer by a solid phase diffusion reaction. A semiconductor device including a bump-shaped connecting means containing a semiconductor element, and a flip-chip type semiconductor element provided on the connecting means, which has a low melting point on at least one of the wiring layer and the connecting means. A repair functional layer including a bonding metal is provided, and the wiring layer and the connecting means are heated at a temperature equal to or lower than the melting point of the low melting point bonding metal through the repair functional layer to perform preliminary bonding, and then thermocompression bonding is performed. Then, the wiring layer and the connecting means are connected by forming a reaction layer by solid phase diffusion by flowing and / or diffusing the repair functional layer into the connecting means. Equipment Subjected to.

A fourth aspect of the present invention is an insulating substrate, a wiring layer formed on the insulating substrate, and bump-shaped connecting means joined to the wiring layer by forming an alloy by a solid phase diffusion reaction. A semiconductor device including a flip-chip type semiconductor element provided on the connecting means, wherein the wiring layer includes a first metal capable of solid-phase diffusing with the connecting means to form a reaction layer, Provided is a semiconductor device, which is substantially made of a metal alloy of a connection means and a second metal that does not form a reaction layer by solid phase diffusion.

[0013]

First, the principles of the first to third inventions will be described with reference to the drawings. 1 to 4 are conceptual diagrams in the joining process used in the present invention. First,
The first joining step (temporary connection) of the present invention will be described.
As shown in FIG. 1, a low melting point bonding metal bump 65 is formed on the surface of the gold bump 62 formed on the semiconductor element 61. Here, the gold bump may have a gold content of at least 95% by weight or more.

As shown in FIG. 2, the gold bumps 62,
The aluminum wiring 64 on the insulating substrate 63 is electrically and mechanically connected to the aluminum wiring 64 via the low melting point bonding metal bump 65 in a heating and pressure welding step at a melting point of the low melting point bonding metal or less. The aluminum wiring may have an aluminum content of 95% by weight or more. The mechanism of this connection is due to the Sb-O bond between the element antimony (Sb) having a strong oxygen affinity in the low melting point bonding metal and the oxygen (O) in the oxide film existing on the surface of the aluminum wiring. Alternatively, it is a connection between zinc and aluminum. This bonding strength is a mechanical strength of 1 to 2 kgf per chip, which is a strength that can withstand handling sufficiently. However, it is not a strong one such as a reaction layer formed by a solid-phase reaction and can be easily removed. Also, since the bonding is performed only on the extreme surface of the aluminum pad,
Even when mechanically peeled during repair, damage to the wiring pattern can be reduced as compared with the solid-phase reaction method. Further, since the gold bumps are hard in the solid-phase reaction method, highly accurate parallelism control is required so that the bumps are uniformly crushed in a collective connection such as a flip chip style. On the other hand, the low-melting-point joining metal used in the first and third aspects of the invention is soft and therefore plays the role of a cushioning material, and has the effect of being uniformly crushed without requiring strict parallelism control. An electrical test is performed on this connection.

If there is no problem in joining, the process proceeds to the second joining process (main connection), but if there is a problem, a repair process is performed. FIG. 3 is a conceptual diagram of the repair process. There are two methods for removing the semiconductor element 61: a method for mechanically removing the semiconductor element 61 using a jig and a method for removing the semiconductor element 61 by heating without applying a load to diffuse the low melting point bonding metal to the gold bump side. The part that is peeled off when the semiconductor element 61 is removed is a metal bump part for low melting point bonding, that is, a gold bump /
This is the aluminum wiring interface. If the low melting point bonding metal 45 remains on the surface of the aluminum wiring, it is washed and removed. Next, as shown in FIG. 4, another semiconductor element 161 is similarly connected to complete the repair.

5 and 6 show a second joining step (main connection) used in the first invention, and these figures also show
A conceptual diagram of a semiconductor device according to a third invention obtained as a result is shown. The gold bump 62 and the aluminum wiring 64 are electrically and mechanically connected by forming a reaction layer layer 66 by a solid-phase diffusion reaction by thermocompression bonding. At this time, the low melting point bonding metal bump 65 exhibits two kinds of behaviors. One is a case of moving to the side surface of the gold bump for pressure welding as shown in FIG. The other is a case of diffusion into the gold bumps by heating, as shown in FIG.
In this case, it is not necessary to apply a load to the gold bump and the wiring layer, and to press them together. When the low melting point alloy layer diffuses into the gold bumps, the low melting point bonding metal bumps cannot be seen from the outside, which is particularly suitable for fine pitch connection. Further, such a main connection is made by forming a single or a combination of eutectic, solid solution, and alloys such as intermetallic compounds, so that the connection is mechanically strong, has a low electrical resistance, and is reliable. A highly reliable connection can be obtained.

According to the second aspect of the invention, it is possible to perform repair using only the gold bumps without previously providing a repair function layer such as the above low melting point bonding metal bumps on the gold bumps. This method is solved by performing optimum conditions.
As for the method, first, in the first bonding step (temporary connection), gold-
A solid phase diffusion reaction between aluminum is performed at a repairable low temperature, a part of the gold-aluminum interface is bonded by a reaction layer by solid phase diffusion, and an electrical inspection is performed in a mechanically weak bonding state. Then, in the second bonding step (main connection), the solid phase diffusion reaction is performed at a high temperature at which repair is not possible, and the gold-aluminum interface is entirely bonded by the reaction layer by solid phase diffusion,
Electrical and mechanical connections are made.

According to the present invention, a semiconductor device and a method of manufacturing the same are realized which enable an electrical inspection in the first bonding step (temporary connection) and reduce damage to a wiring pattern when repair is required. 2 joining process (main connection)
In the two-step connection method in which electrical and mechanical connection is performed by solid-phase diffusion reaction, the semiconductor device can be easily repaired and highly reliable connection can be obtained.

The repair function layer has a low-melting-point solder alloy as its main component and electrical properties of the bonding surface as its sub-component.
It is preferable to include a metal that improves mechanical bondability. The low melting point solder alloy is made of at least one metal selected from the group consisting of lead, tin, cadmium, bismuth, and indium, and the metal for improving the electrical and mechanical bondability of the joint surface is antimony or It is preferably zinc.

As a low melting point solder alloy, Pb--Sn--In
Preferably, the antimony is provided from an antimony-containing alloy Zn-Sb. It is preferable that the repair function layer further contains, as a trace component thereof, oxygen selected from the group consisting of zinc, aluminum, titanium, silicon, chromium, beryllium, and a rare earth element, and an element having a strong affinity.

According to a fourth aspect of the present invention, the wiring is an alloy composed of a first metal forming a reaction layer and a second metal not forming a reaction layer by solid-phase diffusion reaction with the bump. By doing so, repair of the semiconductor device can be facilitated and highly reliable connection can be obtained.

For example, in the case of gold bumps and aluminum wiring, molybdenum, which is a metal material that does not form a reaction layer with gold but forms a reaction layer only with aluminum, is used as the second metal. By mixing molybdenum into the aluminum wiring, a wiring pattern formed of an aluminum-molybdenum alloy is formed, and a reaction layer is formed between the wiring pattern and the gold bump on the semiconductor element by a solid-phase diffusion reaction by thermocompression bonding. To connect electrically and mechanically. At this time, since molybdenum does not form a reaction layer with gold, it is better than when aluminum is connected to gold alone.
The mechanical connection strength is reduced. This makes it possible to easily repair the semiconductor device.

The first metal is preferably gold,
It is selected from the group consisting of copper, tin, lead, indium, and aluminum. Also, the second metal is preferably selected from the group consisting of molybdenum, tungsten, and tantalum. Further, the reaction layer here means a eutectic, a solid solution, and an intermetallic compound obtained by a solid phase diffusion reaction, alone or in combination.

[0024]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 7 is a sectional view showing a part of a first example of a semiconductor device according to the present invention. Gold bumps 12 were formed on the semiconductor element 211 by plating, and the bump size was 50 μm square, the bump pitch was 80 μm, and the bump height was 20 μm.

Next, a low melting point bonding metal bump 215 was formed on the gold bump 212 by vapor deposition. The low melting point bonding metal bump 215 contains Pb-Sn-In as a main component and Zn-
Sb is an alloy containing a minor additive and Ti as a minor additive. As the glass substrate 213, a wiring having a laminated structure of molybdenum / aluminum was used. The molybdenum / aluminum wiring 214 was formed on the substrate by a sputtering method, and 500 A of molybdenum was formed thereon and 5000 A of aluminum was formed thereon.

In the first bonding step (temporary connection), the semiconductor element side is heated to 120 ° C. and the glass substrate is heated to 80 ° C.
After heating to 0 ° C. and applying a load of 20 g per bump, pressure was applied for 1.5 seconds to connect all pads at once.
This connection is made at the low melting point metal bump / aluminum pad interface and is not collapsed to the extent that the gold bump reaches the aluminum pad interface. This bonding force has a mechanical strength of 1 to 2 kgf per chip, can withstand handling sufficiently, and has no defective connection due to electrical inspection. Here, assuming a semiconductor element failure, the semiconductor element was removed using a simple jig.

The part to be peeled off is the low melting point bonding metal / aluminum pad interface. Since the low melting point bonding metal remained on the surface of the aluminum pad, it was washed and removed.

Then, another semiconductor element was connected in the same manner. There was no poor connection due to electrical inspection. next,
In the second bonding step (main connection), the semiconductor element side is set to 400
Heating the glass substrate to 80 ° C. while heating to
While applying a load of 50 g per bump, pressure was applied for 1.5 seconds to connect all the pads at once. In this connection, a reaction layer is formed by a solid phase diffusion reaction at the gold bump / aluminum pad interface, and the connection is made electrically and mechanically. At this time, the low melting point bonding metal bump diffused inside the gold bump. There was no electrical failure due to this connection. Next, as a reliability test, a thermal shock test of 1000 cycles was carried out at -40 ° C and 120 ° C for 30 minutes each. As a result, an extremely stable electrical connection was obtained.

Next, the method for forming the low melting point bonding metal bump will be described in detail. 8 to 12 are explanatory views of the steps used for manufacturing the semiconductor device of the present invention. As shown in FIG. 8, the barrier metal layer 7 is formed on the semiconductor element 71.
2 is formed into a film by a sputtering method, and a resist 74 is formed thereon by photolithography. Gold bumps 73 are formed by electroplating, and a low melting point bonding metal layer 75 is formed on the entire surface by vapor deposition, as shown in FIG. Next, FIG.
As shown in 0, an etching resistant resist metal 76 is deposited. This material is similar to the barrier metal layer 72. Next, a lift-off process is performed as shown in FIG. 11, a barrier metal etching process is further performed as shown in FIG. 12, and the process is completed. Although the resist metal is used here, it is possible to form the anti-etching resist by spin coating, lift-off, barrier metal etching, and resist peeling.

The low melting point bonding metal layer 75 is made of Pb-Sn.
-In is a main component, Zn-Sb is an additive, and Ti is an alloy containing a small amount of additive. FIG. 13 is a sectional view showing a part of a second example of the semiconductor device according to the present invention. Gold bumps 222 are formed on the semiconductor element 221 by plating, the bump size is 30 μm square, the bump pitch is 40 μm,
The bump height was 20 μm. This gold bump was formed to have a drum shape.

Next, a low melting point bonding metal bump 225 was formed on the gold bump 222 by vapor deposition. The low melting point bonding metal bump is an alloy containing Pb-Zn-In as a main component, Zn-Sb as a secondary additive, and Si as a trace additive. As the ceramic substrate 223, a wiring having a laminated structure of molybdenum / aluminum was used. The molybdenum / aluminum wiring 224 was formed on the substrate by a sputtering method, and 500 A of molybdenum was formed on the substrate and 2000 A of aluminum was formed thereon.

In the first bonding step (temporary connection), the semiconductor element side is heated to 100 ° C., the ceramic substrate is heated to 80 ° C., and a load of 20 g is applied to each bump while pressure welding is performed for 5 seconds using ultrasonic waves. And then connected all the pads at once. This connection is made at the low melting point bonded metal bump / aluminum pad interface and is not collapsed to the extent that the gold bump reaches the aluminum pad interface. This joining force was mechanical strength sufficient to withstand handling, and there was no connection failure by electrical inspection. Here, assuming that the semiconductor element is defective, the semiconductor element was removed using a simple jig. The part to be peeled off is the low melting point bonding metal / aluminum pad interface. Since the low melting point bonding metal remained on the surface of the aluminum pad, it was washed and removed. Then, another semiconductor element was connected in the same manner.

The above repair process was carried out three times, but no connection failure was found by electrical inspection. Next, in the second bonding step (main connection), the semiconductor element side is heated to 300 ° C., the ceramic substrate is heated to 80 ° C., and a pressure of 60 g per bump is applied to the ceramic substrate for 5 seconds to apply pressure at one time. Connected all pads. In this connection, a reaction layer is formed by a solid phase diffusion reaction at the gold bump / aluminum pad interface, and the connection is made electrically and mechanically.
At this time, the low melting point bonding metal bump was moved to the side surface of the gold bump, but since the gold bump shape was hourglass-shaped, there was no short-circuit with an adjacent pad, and there was no other electrical connection failure.

Next, as a reliability test, -40 ° C. and 120
A thermal shock test was carried out at 1000C for 1000 minutes for 30 minutes each. As a result, an extremely stable electrical connection was obtained.

Next, the method of forming the low melting point bonding metal bump will be described in detail. 14 to 16 are views for explaining the process used for forming the low melting point bonding metal bump. As shown in FIG. 14, a barrier metal layer 72 is formed on the semiconductor element 71 by a sputtering method, and a resist 74 is formed thereon by photolithography. The gold bump 73 is formed by electroplating. As shown in FIG. 15, resist is removed, and then barrier metal etching is performed as shown in FIG. Next, a low melting point bonding metal layer 75 is formed on the gold bump 73 by vapor deposition using a metal mask, and the process is completed. The low melting point bonding metal layer 75 is an alloy containing Pb-Zn-In as a main component, Zn-Sb as a secondary additive, and Si as a trace additive.

FIG. 17 is a sectional view showing a part of a third example of the semiconductor device according to the present invention. As shown in FIG. 17, a gold bump 232 is formed on the semiconductor element 231 by plating, and the bump size is 20 μm square and the bump pitch is 3 μm.
The bump height was 0 μm and the bump height was 20 μm. This gold bump was formed to have a drum shape.

Next, a low melting point bonding metal bump 235 was formed on the gold bump 232 by plating. The gold bump,
The patterning of the low melting point bonding metal bump was performed by a photolithography technique. In the low melting point bonding metal bump, Bi-In is a main component, Zn-Sb is a secondary additive, and Be.
Is an alloy containing a small amount of. As the glass substrate 233, a wiring substrate having a stacked structure of molybdenum / aluminum was used. Molybdenum / aluminum wiring 34
Is formed on the substrate by sputtering and molybdenum
Aluminum of 7000A was formed on top of 00A of aluminum.

In the first bonding step (temporary connection), the semiconductor element side is heated to 100 ° C. and the glass substrate is heated to 80 ° C.
5 ℃ while applying a load of 20g per bump while heating to ℃
Pressed for seconds and connected all pads at once. This connection is made at the low melting point metal bump / aluminum pad interface and is not collapsed to the extent that the gold bump reaches the aluminum pad interface. This joining force was mechanical strength sufficient to withstand handling, and there was no connection failure by electrical inspection. Here, assuming that the semiconductor element is defective, the semiconductor element side was heated to 300 ° C. and held for 5 seconds without applying a load. Since the low melting point bonding metal bumps diffused into the gold bumps, the mechanical bonding force disappeared and they were removed using a simple jig. The part to be peeled off is the low melting point bonding metal, gold / aluminum pad interface. A part of the low melting point bonding metal remained on the surface of the aluminum pad, but it was washed and removed by the same method as described above. Then, another semiconductor element was connected in the same manner.

The above repair process was carried out 5 times, but no connection failure was found by electrical inspection. Next, in the second joining step (main connection), the semiconductor element side is heated to 320 ° C. and the glass substrate is heated to 60 ° C.
While applying a load of 0 g, pressure was applied for 5 seconds to connect all the pads at once. In this connection, a reaction layer is formed by a solid phase diffusion reaction at the gold bump / aluminum pad interface, and the connection is made electrically and mechanically. At this time, since the low-melting-point bonding metal bumps were diffused inside the gold bumps, there was no short-circuit with an adjacent pad, and there was no other electrical connection failure.

Next, as a reliability test, -40 ° C. and 1
When a thermal shock test was conducted at 20 ° C. for 30 minutes each for 1000 cycles, an extremely stable electrical connection was obtained. Next, a method of forming the low melting point bonding metal bump will be described in detail. 18 to 20 are explanatory views of the manufacturing process of the third example of the semiconductor device according to the present invention. FIG.
8, the barrier metal layer 7 is formed on the semiconductor element 71.
2 is formed into a film by a sputtering method, and a resist 74 is formed thereon by photolithography. The gold bump 73 is formed by electroplating. Thereafter, as shown in FIG. 19, a low melting point bonding metal layer 75 is formed thereon by electroplating, resist removal and barrier metal etching are performed as shown in FIG. 20, and the process is completed. The low melting point bonding metal layer 7
5 is an alloy containing Zn-Bi-In as a main component, Zn-Sb as a secondary additive, and Be as a trace additive.

The melting temperature T _a of the low melting point bonding metal in the temporary connection and the solid phase reaction temperature T _b of the gold bump in the main bonding have a relationship represented by Ta <Tb. Further, the thickness of the low melting point bonding metal layer is preferably 1 μm or more and 4 μm or less in the case of melting without diffusion into the low melting point bonding metal bump during the main bonding, for example, when the gold bump is 20 μm thick. If it is less than 1 μm, the connection is difficult, and if it exceeds 4 μm, a short circuit tends to occur easily.

A preferable upper limit of the low melting point bonding metal layer is derived as follows, for example. 21 to 23 show
It is a model figure showing the mode of deformation of the bump by connection.

It is assumed that the solder 79 is first formed on the gold bump 78 as shown in FIG. In the temporary connection, the state shown in FIG. 22 is obtained, and in the main connection, it moves to the side surface of the gold bump as shown in FIG.

Here, assuming that the total volume of the gold bump 78 and the solder 79 in FIG. 23 is V ₁ and the volume of the truncated cone of the dotted line is V ₂ , V ₁ = πh / 6 {h ² +3 (r ₀ ² + r ² ). } V ₂ = πh / 3 (r ₀ ² + r ₀ r + r ² ) The volume V of the solder bump on the side surface is V = V ₁ −V ₂ = πh / 6 {h ² + (r ₀ −r) ² }, and V = Πr ² y ∴y = h / 6r ² {h ² + (r ₀ −r) ² } For example, h = 20 μm, r ₀ = 20 μm, r = 18 μm
In the case of y = 4.16 (μm) Since the bump pitch is 2r ₀ , this corresponds to a 40 μm pitch.

Therefore, when the gold bump is 20 μm thick, if the solder bump is 4.16 μm or more, there is a high possibility of a short circuit. FIG. 24 is a sectional view showing a part of the fourth example of the semiconductor device according to the present invention. As shown in FIG. 24, a gold bump 312 is formed on the semiconductor element 311 by plating, the bump size is 50 μm square, the bump pitch is 80 μm,
The bump height was 20 μm. As the ceramic substrate 313, a wiring having a laminated structure of molybdenum / aluminum / molybdenum was used. The molybdenum / aluminum / molybdenum wiring 314 is formed on the substrate by a sputtering method, 500A of molybdenum is formed, 5000A of aluminum is formed thereon, and 100A of molybdenum is formed thereon.
A formed. Next, annealing is performed at about 1000 ° C. to form a molybdenum-aluminum alloy layer 315 on the surface of the wiring 314.
Was formed.

In the bonding step, the semiconductor element side is heated to 300 ° C., the glass substrate is heated to 60 ° C., and a pressure of 50 g per bump is applied to the glass substrate for 3.5 seconds,
A gold-aluminum alloy layer 316 was formed to connect all pads at once. This bonding force is 2 per chip
It had a mechanical strength of ˜3 kgf and was able to withstand handling sufficiently, and there was no poor connection due to electrical inspection.

Here, assuming that the semiconductor element is defective, the semiconductor element was removed using a simple jig. The part to be peeled off is the gold bump / tungsten-aluminum alloy interface. At this time, the separated interface was good enough for the next connection. When the semiconductor element was replaced, and heating and pressure contact were performed in the same manner to perform connection, good connection was obtained. Finally, in order to protect the connection interface from the outside and to reinforce the mechanical strength, the connection interface was sealed with a thermosetting resin to reinforce the mechanical strength.

Next, as a reliability test, -40 ° C. and 12
A thermal shock test was carried out at 0 ° C. for 30 minutes each for 1000 cycles and a very stable electrical connection was obtained. AES of molybdenum-aluminum alloy layer 315
(Auger photoelectron spectroscopy) analysis showed that the alloy layer surface was molybdenum-rich in the depth direction analysis results, but it was confirmed that the composition changed to aluminum-rich as it progressed in the depth direction. .

Here, molybdenum is used as a metal that does not solid-phase diffuse with gold. At this time, the aluminum composition in the aluminum-molybdenum alloy is preferably 30 to 80 atm%.

FIG. 25 shows a fifth example of the semiconductor device according to the present invention.
It is sectional drawing which shows a part of example of FIG. As shown in FIG. 25, gold bumps 322 are formed on the semiconductor element 321 by plating, and the bump size is 30 μm square and the bump pitch is 4 μm.
The bump height was 0 μm and the bump height was 20 μm. Glass substrate 323
The upper wiring was formed on the substrate by the following sputtering method.

First, an aluminum plate having a purity of 99.999% and a tungsten plate having a purity of 99.999% are attached to predetermined positions as targets in an apparatus capable of simultaneously sputtering a plurality of targets, for example, a binary simultaneous ion beam sputtering apparatus. .

Next, the glass substrate 323 on which the wiring pattern 324 is formed in advance is covered with a stainless mask in which a predetermined pattern corresponding to the shape of the connecting portion is removed, and the glass substrate 323 is set at a predetermined position in the sputtering apparatus.

Next, targets of aluminum and tungsten are simultaneously sputtered by an argon ion beam or the like to form a thin film on the glass multilayer substrate 323 in which aluminum and tungsten are uniformly mixed (90% aluminum in atomic percent, 10% tungsten). Composition) is laminated to a film thickness of 0.5 μm. At this time, the glass multilayer substrate may be heated to about 100 ° C.

Thus, the tungsten-aluminum alloy wiring 325 having a predetermined pattern shape was selectively formed on the substrate. It is also possible to form the metal thin film layer without using a mask made of stainless steel, and then selectively etch by lithography using a predetermined mask to form the connection portion.

In the bonding step, the semiconductor element side is heated to 400 ° C., the glass substrate is heated to 60 ° C., and a pressure of 50 g per bump is applied to the glass substrate for 1.5 seconds.
A gold-aluminum alloy layer 326 was formed to connect all pads at once. This bonding force is 2 per chip
It had a mechanical strength of ˜3 kgf and was able to withstand handling sufficiently, and there was no poor connection due to electrical inspection.
Here, assuming that the semiconductor element is defective, the semiconductor element was removed using a simple jig. The part to be peeled off is the gold bump / tungsten-aluminum alloy interface. At this time, the separated interface was good enough for the next connection. When the semiconductor element was replaced, and heating and pressure contact were performed in the same manner to perform connection, good connection was obtained. Finally, in order to protect the connection interface from the outside and to reinforce the mechanical strength, the connection interface is sealed with a thermosetting resin,
Mechanical strength was reinforced.

Next, as a reliability test, at 40 ° C. and 120 ° C.
When a thermal shock test was carried out at 1000 ° C. for 30 minutes each and 1000 cycles, an extremely stable electrical connection was obtained. Here, tungsten is used as a metal that does not solid-phase diffuse with gold. At this time, the aluminum composition in the aluminum-tungsten alloy is 30 to 80 atm.
% Is preferable.

As described in detail above, according to the present invention, the wiring is an alloy composed of the first metal forming the reaction layer and the second metal not forming the reaction layer by the solid phase diffusion reaction with the bump. As a result, the mechanical strength of the alloy layer formed by the solid phase diffusion connection can be reduced, and the repairability of the semiconductor device is facilitated.

According to the sixth example of the present invention, it is possible to repair only the gold bumps without previously providing a repair function layer such as a house melting point bonding metal bump on the gold bumps. The sixth example will be described below.

Gold bumps were formed on the semiconductor element by plating, and aluminum wiring was formed on the substrate. In the bonding step, the semiconductor element side is heated to 200 ° C., the substrate is heated to 60 ° C., and pressure is applied for 2 seconds while applying a load of 50 g per bump to form a gold-aluminum alloy layer and all of them at once. The pad is connected. This bonding force was such that the mechanical strength per chip was 1 to 3 kgf, which was sufficient to withstand handling, and there was no connection failure due to electrical inspection.

Here, assuming that the semiconductor element is defective, the semiconductor element was removed using a simple jig. The part to be peeled off is the gold bump-aluminum alloy interface. At this time, the peeled interface was good enough for the next connection, although there was a reaction mark on the aluminum surface partially. Replace the semiconductor element and heat and press likewise,
When the connection was made, a good connection was obtained.

When the repair is not required, the Au-Al interface is heated to 300 to 300 by using a heat source such as a heater or infrared rays.
By heating to 400 ° C., the reaction layer of Au—Al can be made 1000 A or more. As a result, a stable connection can be obtained. Here, the reaction of Au—Al was promoted only by heat, but naturally heat and pressure may be used together. Finally,
In order to protect the connection interface from the outside and to reinforce the mechanical strength, the connection interface was sealed with a thermosetting resin to reinforce the mechanical strength.

[0062]

According to the semiconductor device connection structure of the present invention, a reaction containing a eutectic crystal, a solid solution, or an alloy such as a metal compound in the connection portion between the wiring layer and the connection means of the semiconductor element by solid phase diffusion. Even if a layer is formed, the repair work can be facilitated and a highly reliable connection can be obtained.

[Brief description of drawings]

FIG. 1 is a conceptual diagram for explaining a joining process used in the present invention.

FIG. 2 is a conceptual diagram for explaining a joining process used in the present invention.

FIG. 3 is a conceptual diagram for explaining a joining process used in the present invention.

FIG. 4 is a conceptual diagram for explaining a joining process used in the present invention.

FIG. 5 is a conceptual diagram for explaining a second joining step (main connection) used in the present invention.

FIG. 6 is a conceptual diagram for explaining a second joining step (main connection) used in the present invention.

FIG. 7 is a sectional view showing a part of a first example of a semiconductor device according to the present invention.

FIG. 8 is a diagram for explaining steps used in manufacturing the first example of the semiconductor device according to the invention.

FIG. 9 is a view for explaining a process used for manufacturing the first example of the semiconductor device according to the invention.

FIG. 10 is a view for explaining a process used for manufacturing the first example of the semiconductor device according to the invention.

FIG. 11 is a diagram for explaining a process used for manufacturing the first example of the semiconductor device according to the invention.

FIG. 12 is a view for explaining a process used for manufacturing the first example of the semiconductor device according to the invention.

FIG. 13 is a sectional view showing a part of a second example of a semiconductor device according to the present invention.

FIG. 14 is a view for explaining a process used for forming a low melting point bonding metal bump.

FIG. 15 is a view for explaining a process used for forming a low melting point bonding metal bump.

FIG. 16 is a view for explaining a process used for forming a low melting point bonding metal bump.

FIG. 17 is a sectional view showing a part of a third example of a semiconductor device according to the present invention.

FIG. 18 is an explanatory diagram of the manufacturing process of the third example of the semiconductor device according to the invention.

FIG. 19 is an explanatory diagram of the manufacturing process of the third example of the semiconductor device according to the invention.

FIG. 20 is an explanatory diagram of the manufacturing process of the third example of the semiconductor device according to the invention.

FIG. 21 is a model diagram showing how bumps are deformed by connection.

FIG. 22 is a model diagram showing how bumps are deformed by connection.

FIG. 23 is a model diagram showing how bumps are deformed by connection.

FIG. 24 is a sectional view showing a part of a fourth example of a semiconductor device according to the present invention.

FIG. 25 is a sectional view showing a part of a fifth example of a semiconductor device according to the present invention.

FIG. 26 is a view for explaining an example of a conventional semiconductor element connection structure.

FIG. 27 is a view for explaining another example of the conventional semiconductor element connection structure.

[Explanation of symbols]

45 ... Low melting point bonding metal 61, 71, 211, 231, 311, 321 ... Semiconductor element 62, 73, 78, 222, 232, 312, 322 ...
Gold bump 63 ... Insulating substrate 65, 215, 225, 235 ... Low melting point bonding metal bump 66, 316, 326 ... Reaction layer 72 ... Barrier metal layer 74 ... Resist 75 ... Low melting point bonding metal layer 76 ... Etching resistant resist metal 79 ... Solder 213, 233, 323 ... Glass substrate 214, 224 ... Aluminum wiring 223, 313 ... Ceramic substrate 314, 324, 325 ... Wiring 315 ... Alloy layer

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Masayuki Saito 33, Shinisogo-cho, Isogo-ku, Yokohama No. 1 Incorporated company Toshiba Research & Development Center

Claims (4)

[Claims] 1. A low melting point bonding metal is provided on at least one of a wiring layer containing aluminum formed on an insulating substrate and a bump-shaped connecting means containing gold provided on a flip-chip type semiconductor element. A step of forming a repair functional layer including, a step of aligning the wiring layer and the connecting means via the repair functional layer, and then a temperature of the wiring layer and the connecting means which are equal to or lower than the melting point of the low melting point bonding metal. A method of manufacturing a semiconductor device, comprising the steps of: heating the substrate to perform temporary bonding, and then performing solid-phase diffusion of the wiring layer and the connecting means to form a reaction layer, and thereby performing main bonding. 2. A step of aligning a wiring layer containing aluminum formed on an insulating substrate with a bump-shaped connecting means containing gold provided on a flip-chip type semiconductor element, and then the wiring. A step of partially solid-phase diffusing the layer and the connecting means by thermocompression bonding to form a reaction layer, whereby temporary bonding is performed, and then the wiring layer and the connecting means are solid-phase diffused by thermocompression bonding. A method for manufacturing a semiconductor device, which includes a step of forming a reaction layer and performing main bonding by using the reaction layer. 3. An insulating substrate, a wiring layer containing aluminum formed on the insulating substrate, and a bump-like bump containing gold bonded to the wiring layer by forming a reaction layer by a solid phase diffusion reaction. A semiconductor device comprising a connecting means and a flip-chip type semiconductor element provided on the connecting means,
A repair function layer containing a low melting point bonding metal is provided on at least one of the wiring layer and the connecting means,
The wiring layer and the connecting means are heated through the repair function layer at a temperature equal to or lower than the melting point of the low melting point bonding metal to perform preliminary bonding, and then thermocompression bonding is performed to flow and / or flow through the repair function layer. By diffusing into the connecting means,
A semiconductor device, wherein the wiring layer and the connecting means are connected by forming a reaction layer by solid phase diffusion. 4. An insulating substrate, a wiring layer formed on the insulating substrate, bump-shaped connecting means joined by forming an alloy with the wiring layer by a solid phase diffusion reaction, and provided on the connecting means. A semiconductor device including a flip-chip type semiconductor element, wherein the wiring layer is a first metal capable of forming a reaction layer by solid-phase diffusion with the connecting means, and the connecting means and solid-phase diffusion. The semiconductor device is essentially composed of a metal alloy with a second metal that does not form a reaction layer according to.