JPH08330902A - Electronic circuit - Google Patents

Abstract

PURPOSE: To suppress the distortion of output voltage against the change of input voltage of a MOS transistor TR. CONSTITUTION: An electronic circuit serves an attenuator which controls the ON resistance of a MOS TR by the gate voltage and varies the attenuation rate and consists of an NMOS TR 2 and a voltage setting device 4 which applies the voltage to the gate of the TR 2. The voltage that is secured by adding the fixed voltage (b) to the voltage secured by multiplying the input voltage Vin by (a) is applied to the gate of the TR 2. Then the voltage that is secured by adding the voltage secured by multiplying the voltage Vin by (c) is applied to the back gate of the TR 2 by a voltage setting device 5. Both (a) and (c) are set at the value excluding '1' for the output voltage V4(=aVin+ b) of the device 4 and the output voltage V5(=cVin+d) of the device 5. When both (c) and (d) are set at '1', Vgs and Vbs of the TR 2 are set at (b) and (d) and fixed respectively. However, Vds is equal to Vin×R1/(Ron+R1) and not constant, so that the input voltage dependence remains. Thereby, both (a) and (c) are set at the value excluding '1' and Vgs and Vbs are excessively compensated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic circuit in which a MOS (metal oxide semiconductor) transistor is incorporated as a switch or a variable resistor.

[0002]

2. Description of the Related Art Conventionally, a multiplex circuit or a variable gain circuit in which a MOS transistor is incorporated as a switch is known. Further, there is known an attenuator and an amplifier that control the gate voltage of a MOS transistor to make its ON resistance variable to control the attenuation ratio and the amplification ratio.

[0003]

However, in the above-mentioned conventional example, the gate and back gate voltages of the MOS transistor incorporated as a switch or a variable resistor are constant voltages independent of the input voltage.

For example, when the ON resistance is controlled by controlling the gate voltage of the MOS transistor and the attenuator is configured by combining with the fixed resistor, the amplitude of the input voltage is sufficiently larger than the amplitude of the gate control voltage. When it is very small, the voltage applied to the gate is often a value that does not depend on the input voltage. Therefore, the gate-source voltage and the gate-drain voltage of the MOS transistor depend on the input voltage, and as a result, the ON resistance of the MOS transistor depends on the input voltage. Therefore, the attenuation ratio of the attenuator also depends on the input voltage. There was a problem of doing.

Further, even when the gate voltage of the MOS transistor is set to a value obtained by adding a certain predetermined voltage to the input voltage,
Since the gate-drain voltage and the source-back gate voltage of the MOS transistor depend on the input voltage, the MO
The ON resistance of the S transistor has an input voltage dependency, and the attenuation ratio of the attenuator changes according to the input voltage.

The above problem will be specifically described. Figure 3 is MO
ON / OF by using S transistor as switch
It is a circuit diagram which shows the structure of the conventional variable gain amplifier which controls a gain by F. In the figure, 1a is an input terminal, 2a and 3a are NMOS transistors serving as switches, 6a is an amplifier, and 7a is an output terminal. NMOS
The back gates of the transistors 2a and 3a are connected to GND.

When the gate voltage of one NMOS transistor 2a is at H level and the gate voltage of the other MOS transistor 3a is at L level, the amplification factor of the amplifier is Rfa /
(R1a + Ron). Ron is the ON resistance of the MOS transistor.

However, when the input voltage applied to the input terminal 1a changes at this time, the gate-source voltage (hereinafter referred to as Vgs) of the MOS transistor 2a,
The source-drain voltage (hereinafter, referred to as Vsd) and the source-back gate voltage (hereinafter, referred to as Vbs) vary depending on the input voltage, and the ON resistance of the MOS transistor 2a also varies, so that the amplification factor Rfa / (R1a + Ron).
Also fluctuates, which causes distortion in the output of the amplifier.

Therefore, an object of the present invention is to provide an electronic circuit capable of suppressing the distortion of the output voltage with respect to the change of the input voltage of the MOS transistor.

[0010]

In order to achieve the above object, in an electronic circuit according to claim 1 of the present invention, a MOS transistor having a source terminal as an input is incorporated as a switch or a variable resistor controlled by gate voltage control. In the electronic circuit, there is provided voltage setting means for setting the gate-source voltage and the back-gate-source voltage of the MOS transistor to a value obtained by adding a voltage obtained by multiplying an input voltage by a predetermined constant and a predetermined constant voltage. .

In the electronic circuit according to a second aspect, in the electronic circuit according to the first aspect, the voltage obtained by multiplying the input voltage by a predetermined constant is a voltage obtained by multiplying the input voltage by the MOS transistor.
A transistor is incorporated in the attenuator as the variable resistor.

According to a third aspect of the present invention, in the electronic circuit according to the first aspect, a voltage obtained by multiplying the input voltage by a predetermined constant is a voltage obtained by multiplying the input voltage, and the MOS transistor is amplified by a resistance ratio. The variable resistor for determining the degree is incorporated in an amplifier.

[0013]

In the electronic circuit according to the first aspect of the present invention, when the MOS transistor having the source terminal as an input is incorporated as a switch or a variable resistor by controlling the gate voltage, the gate-source and the back of the MOS transistor are connected. The voltage between the gate and the source is set by the voltage setting means to a value obtained by adding a voltage obtained by multiplying the input voltage by a predetermined constant and a constant predetermined voltage.

[0014]

EXAMPLES Examples of electronic circuits according to the present invention will be described.

[First Embodiment] The electronic circuit of the first embodiment is M
This is an attenuator that controls the ON resistance of the OS transistor by the gate voltage to make the attenuation ratio variable.

FIG. 1 is a circuit diagram showing the configuration of the electronic circuit of the first embodiment. In the figure, 1 is an input terminal, 2 is an N-channel MOS (NMOS) transistor,
3 is an output terminal, 4 is a voltage setting device for applying a voltage to the gate of the NMOS transistor 2, and the voltage setting device 4 applies a constant voltage b to the gate of the NMOS transistor 2 to a voltage obtained by multiplying the input voltage Vin by a. Voltage is applied.

Reference numeral 5 denotes a voltage setting device for applying a voltage to the back gate of the NMOS transistor 2. By this voltage setting device 5, a constant voltage d is added to the back gate of the NMOS transistor 2 by multiplying the input voltage Vin by c. Voltage is applied.

Here, the output voltage V4 of the voltage setting device 4 =
At aVin + b and the output voltage V5 = cVin + d of the device 5, the values of a and c are set to values other than "1". The reason why the values of a and c are other than "1" is as follows.

In the attenuator shown in FIG. 1, the NMOS
The source voltage of the transistor 2 is Vin, but the drain voltage is Vin × R1 / (Ron + R1) when the ON resistance of the NMOS transistor is represented by Ron, which is a value different from the source voltage.

Therefore, when the values a and c in the formula of the output voltage of the voltage setting devices 4 and 5 are "1", the NMOS
Vgs of the transistor 2 is b and Vbs is d, which are constant, but Vds is not constant as Vin × R1 / (Ron + R1). Therefore, since the input voltage dependency of Vds is left, in order to reduce the input voltage dependency of Vds, the values of a and c are set to values other than “1”, and Vgs and Vbs of the NMOS transistor 2 are set. Is overcompensated. The values of a, b, c, and d are specifically determined by the characteristics of the NMOS transistor 2.

[Second Embodiment] Next, a second embodiment of the electronic circuit of the present invention will be described. The electronic circuit of this embodiment uses a MOS transistor as a switch and turns it on / off.
The FF operation makes the gain of the amplifier variable.

FIG. 2 is a circuit diagram showing the configuration of the electronic circuit of the second embodiment. In the figure, 11 and 12 are NMOS transistors, 13 is an output terminal of an amplifier, 14 is an amplifier, 1
Reference numerals 5, 16, 17, and 18 denote voltage setting devices for applying a voltage according to the input voltage to the gates and back gates of the NMOS transistors 11 and 12, respectively.

Next, the operation of the electronic circuit will be described. Output voltage V of the voltage setting device 15, 16, 17, 18
15, V16, V17 and V18 are equations 1, 2 and
Given in 3, 4.

[0024]

[Formula 1] V15 = aVin + b

[0025]

[Formula 2] V16 = cVin + d

[0026]

[Formula 3] V17 = eVin + f

[0027]

## EQU00004 ## V18 = gVin + h In Expression 1, the value of b is set to a voltage at which the NMOS transistor 11 is sufficiently turned on (hereinafter referred to as VH), and Expression 3
At the value of f, the NMOS transistor 12 is set to O
If the voltage for FF (hereinafter, referred to as VL) is set and the values of d and h in Expressions 2 and 4 are set to “0” (GND voltage), N
Since the MOS transistor 11 is turned on and the NMOS transistor 12 is turned off, if the ON resistance of the NMOS transistor 11 is Ron, the input voltage Vi of this amplifier is
The amplification degree for n is −Rf / (R11 + Ron).

When the value of b in Expression 1 is VL and the value of f in Expression 3 is VH, the NMOS transistor 11 is turned off,
Since the NMOS transistor 12 is turned on, the amplification degree is −
It becomes Rf / (R12 + Ron). Therefore, the gain of the amplifier 14 becomes variable.

Here, a in Expression 1, c in Expression 2, and Expression 3
When the value of e in Equation 4 is “1”, Vgs and Vbs of the NMOS transistors 11 and 12 are constant.
NMOS transistor 1 due to changes in Vgs and Vbs
The fluctuations of the ON resistances Ron of 1 and 12 disappear.

However, in this embodiment, since the drain voltages of the NMOS transistors 11 and 12 are not equal to Vin, Vds of the NMOS transistor changes with Vin, which causes a change in the ON resistance Ron to remain. Therefore, the values of the coefficients a, c, e, and g in Expressions 1 to 4 are set to values other than “1” in order to compensate for variations in the ON resistance Ron.

It is also effective to use the NMOS transistor as a variable resistance element by controlling the gate voltage instead of using it as a switch.

[0032]

According to the electronic circuit of the first aspect of the present invention, when a MOS transistor having a source terminal as an input is incorporated as a switch or a variable resistor controlled by gate voltage control, the gate-source of the MOS transistor is connected. By setting the voltage between the back gate and the source to a value obtained by adding a voltage obtained by multiplying the input voltage by a predetermined constant and a constant predetermined voltage by the voltage setting means, the input voltage dependency of the ON resistance of the MOS transistor can be determined. Attenuators and amplifiers with low distortion can be manufactured.

According to the electronic circuit of the second aspect, the voltage obtained by multiplying the input voltage by a predetermined constant is a voltage obtained by multiplying the input voltage, and the MOS transistor is incorporated in the attenuator as the variable resistor. As a result, a low strain attenuator can be manufactured.

According to the electronic circuit of the third aspect, the voltage obtained by multiplying the input voltage by a predetermined constant is a voltage obtained by multiplying the input voltage, and the MOS transistor determines the amplification degree by a resistance ratio. By incorporating it into the amplifier as a resistor, a low distortion amplifier can be manufactured.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of an electronic circuit of a first embodiment.

FIG. 2 is a circuit diagram showing a configuration of an electronic circuit of a second embodiment.

FIG. 3 is a circuit diagram showing a configuration of a conventional variable gain amplifier in which a MOS transistor is used as a switch and the gain is controlled by ON / OFF thereof.

[Explanation of symbols]

 2, 11, 12 MOS transistors 4, 5, 15, 16, 17, 18 Voltage setting device

Claims (3)

[Claims] 1. An electronic circuit in which a MOS transistor having a source terminal as an input is incorporated as a switch or a variable resistor by controlling a gate voltage, wherein a gate-source voltage and a back gate-source voltage of the MOS transistor are input. An electronic circuit comprising a voltage setting means for setting a value obtained by multiplying a voltage by a predetermined constant and a constant predetermined voltage. 2. The voltage obtained by multiplying the input voltage by a predetermined constant is a voltage obtained by multiplying the input voltage, and the MOS transistor is incorporated in the attenuator as the variable resistor. Electronic circuit described. 3. A voltage obtained by multiplying the input voltage by a predetermined constant is a voltage obtained by multiplying the input voltage, and the MOS transistor is incorporated in an amplifier as the variable resistor that determines the amplification degree by a resistance ratio. The electronic circuit according to claim 1, wherein: